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Bellido Nicolas038c5b62005-06-20 18:51:05 +01001/*
2 * linux/arch/arm/mach-aaec2000/core.c
3 *
4 * Code common to all AAEC-2000 machines
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/config.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
Bellido Nicolas4a91ca22005-10-28 16:51:42 +010016#include <linux/device.h>
Bellido Nicolas038c5b62005-06-20 18:51:05 +010017#include <linux/list.h>
18#include <linux/errno.h>
Bellido Nicolas049eb322005-10-28 16:51:44 +010019#include <linux/dma-mapping.h>
Bellido Nicolas038c5b62005-06-20 18:51:05 +010020#include <linux/interrupt.h>
21#include <linux/timex.h>
22#include <linux/signal.h>
23
24#include <asm/hardware.h>
25#include <asm/irq.h>
Bellido Nicolas049eb322005-10-28 16:51:44 +010026#include <asm/sizes.h>
27#include <asm/hardware/amba.h>
Bellido Nicolas038c5b62005-06-20 18:51:05 +010028
Bellido Nicolas4a91ca22005-10-28 16:51:42 +010029#include <asm/mach/flash.h>
Bellido Nicolas038c5b62005-06-20 18:51:05 +010030#include <asm/mach/irq.h>
31#include <asm/mach/time.h>
32#include <asm/mach/map.h>
33
Bellido Nicolas049eb322005-10-28 16:51:44 +010034#include "core.h"
35#include "clock.h"
36
Bellido Nicolas038c5b62005-06-20 18:51:05 +010037/*
38 * Common I/O mapping:
39 *
40 * Static virtual address mappings are as follow:
41 *
42 * 0xf8000000-0xf8001ffff: Devices connected to APB bus
43 * 0xf8002000-0xf8003ffff: Devices connected to AHB bus
44 *
45 * Below 0xe8000000 is reserved for vm allocation.
46 *
47 * The machine specific code must provide the extra mapping beside the
48 * default mapping provided here.
49 */
50static struct map_desc standard_io_desc[] __initdata = {
Deepak Saxenaf70cd652005-10-28 15:18:56 +010051 {
52 .virtual = VIO_APB_BASE,
53 .physical = __phys_to_pfn(PIO_APB_BASE),
54 .length = IO_APB_LENGTH,
55 .type = MT_DEVICE
56 }, {
57 .virtual = VIO_AHB_BASE,
58 .physical = __phys_to_pfn(PIO_AHB_BASE),
59 .length = IO_AHB_LENGTH,
60 .type = MT_DEVICE
61 }
Bellido Nicolas038c5b62005-06-20 18:51:05 +010062};
63
64void __init aaec2000_map_io(void)
65{
66 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
67}
68
69/*
70 * Interrupt handling routines
71 */
72static void aaec2000_int_ack(unsigned int irq)
73{
74 IRQ_INTSR = 1 << irq;
75}
76
77static void aaec2000_int_mask(unsigned int irq)
78{
79 IRQ_INTENC |= (1 << irq);
80}
81
82static void aaec2000_int_unmask(unsigned int irq)
83{
84 IRQ_INTENS |= (1 << irq);
85}
86
87static struct irqchip aaec2000_irq_chip = {
88 .ack = aaec2000_int_ack,
89 .mask = aaec2000_int_mask,
90 .unmask = aaec2000_int_unmask,
91};
92
93void __init aaec2000_init_irq(void)
94{
95 unsigned int i;
96
97 for (i = 0; i < NR_IRQS; i++) {
98 set_irq_handler(i, do_level_IRQ);
99 set_irq_chip(i, &aaec2000_irq_chip);
100 set_irq_flags(i, IRQF_VALID);
101 }
102
103 /* Disable all interrupts */
104 IRQ_INTENC = 0xffffffff;
105
106 /* Clear any pending interrupts */
107 IRQ_INTSR = IRQ_INTSR;
108}
109
110/*
111 * Time keeping
112 */
113/* IRQs are disabled before entering here from do_gettimeofday() */
114static unsigned long aaec2000_gettimeoffset(void)
115{
116 unsigned long ticks_to_match, elapsed, usec;
117
118 /* Get ticks before next timer match */
119 ticks_to_match = TIMER1_LOAD - TIMER1_VAL;
120
121 /* We need elapsed ticks since last match */
122 elapsed = LATCH - ticks_to_match;
123
124 /* Now, convert them to usec */
125 usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
126
127 return usec;
128}
129
130/* We enter here with IRQs enabled */
131static irqreturn_t
132aaec2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
133{
134 /* TODO: Check timer accuracy */
135 write_seqlock(&xtime_lock);
136
137 timer_tick(regs);
138 TIMER1_CLEAR = 1;
139
140 write_sequnlock(&xtime_lock);
141
142 return IRQ_HANDLED;
143}
144
145static struct irqaction aaec2000_timer_irq = {
146 .name = "AAEC-2000 Timer Tick",
Russell King09b8b5f2005-06-26 17:06:36 +0100147 .flags = SA_INTERRUPT | SA_TIMER,
148 .handler = aaec2000_timer_interrupt,
Bellido Nicolas038c5b62005-06-20 18:51:05 +0100149};
150
151static void __init aaec2000_timer_init(void)
152{
153 /* Disable timer 1 */
154 TIMER1_CTRL = 0;
155
156 /* We have somehow to generate a 100Hz clock.
157 * We then use the 508KHz timer in periodic mode.
158 */
159 TIMER1_LOAD = LATCH;
160 TIMER1_CLEAR = 1; /* Clear interrupt */
161
162 setup_irq(INT_TMR1_OFL, &aaec2000_timer_irq);
163
164 TIMER1_CTRL = TIMER_CTRL_ENABLE |
165 TIMER_CTRL_PERIODIC |
166 TIMER_CTRL_CLKSEL_508K;
167}
168
169struct sys_timer aaec2000_timer = {
170 .init = aaec2000_timer_init,
171 .offset = aaec2000_gettimeoffset,
172};
173
Bellido Nicolas049eb322005-10-28 16:51:44 +0100174static struct clcd_panel mach_clcd_panel;
175
176static int aaec2000_clcd_setup(struct clcd_fb *fb)
177{
178 dma_addr_t dma;
179
180 fb->panel = &mach_clcd_panel;
181
182 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, SZ_1M,
183 &dma, GFP_KERNEL);
184
185 if (!fb->fb.screen_base) {
186 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
187 return -ENOMEM;
188 }
189
190 fb->fb.fix.smem_start = dma;
191 fb->fb.fix.smem_len = SZ_1M;
192
193 return 0;
194}
195
196static int aaec2000_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
197{
198 return dma_mmap_writecombine(&fb->dev->dev, vma,
199 fb->fb.screen_base,
200 fb->fb.fix.smem_start,
201 fb->fb.fix.smem_len);
202}
203
204static void aaec2000_clcd_remove(struct clcd_fb *fb)
205{
206 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
207 fb->fb.screen_base, fb->fb.fix.smem_start);
208}
209
210static struct clcd_board clcd_plat_data = {
211 .name = "AAEC-2000",
212 .check = clcdfb_check,
213 .decode = clcdfb_decode,
214 .setup = aaec2000_clcd_setup,
215 .mmap = aaec2000_clcd_mmap,
216 .remove = aaec2000_clcd_remove,
217};
218
219static struct amba_device clcd_device = {
220 .dev = {
221 .bus_id = "mb:16",
222 .coherent_dma_mask = ~0,
223 .platform_data = &clcd_plat_data,
224 },
225 .res = {
226 .start = AAEC_CLCD_PHYS,
227 .end = AAEC_CLCD_PHYS + SZ_4K - 1,
228 .flags = IORESOURCE_MEM,
229 },
230 .irq = { INT_LCD, NO_IRQ },
231 .periphid = 0x41110,
232};
233
234static struct amba_device *amba_devs[] __initdata = {
235 &clcd_device,
236};
237
238static struct clk aaec2000_clcd_clk = {
239 .name = "CLCDCLK",
240};
241
242void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd)
243{
244 clcd_plat_data.enable = clcd->enable;
245 clcd_plat_data.disable = clcd->disable;
246 memcpy(&mach_clcd_panel, &clcd->panel, sizeof(struct clcd_panel));
247}
248
Bellido Nicolas4a91ca22005-10-28 16:51:42 +0100249static struct flash_platform_data aaec2000_flash_data = {
250 .map_name = "cfi_probe",
251 .width = 4,
252};
253
254static struct resource aaec2000_flash_resource = {
255 .start = AAEC_FLASH_BASE,
256 .end = AAEC_FLASH_BASE + AAEC_FLASH_SIZE,
257 .flags = IORESOURCE_MEM,
258};
259
260static struct platform_device aaec2000_flash_device = {
261 .name = "armflash",
262 .id = 0,
263 .dev = {
264 .platform_data = &aaec2000_flash_data,
265 },
266 .num_resources = 1,
267 .resource = &aaec2000_flash_resource,
268};
269
270static int __init aaec2000_init(void)
271{
Bellido Nicolas049eb322005-10-28 16:51:44 +0100272 int i;
273
274 clk_register(&aaec2000_clcd_clk);
275
276 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
277 struct amba_device *d = amba_devs[i];
278 amba_device_register(d, &iomem_resource);
279 }
280
Bellido Nicolas4a91ca22005-10-28 16:51:42 +0100281 platform_device_register(&aaec2000_flash_device);
282
283 return 0;
284};
285arch_initcall(aaec2000_init);
286