| Sascha Hauer | 8c25c36 | 2009-06-04 11:32:12 +0200 | [diff] [blame] | 1 | #ifndef __MACH_MX25_H__ |
| 2 | #define __MACH_MX25_H__ |
| 3 | |
| Uwe Kleine-König | c8e5db0 | 2009-11-12 21:51:55 +0100 | [diff] [blame] | 4 | #define MX25_AIPS1_BASE_ADDR 0x43f00000 |
| 5 | #define MX25_AIPS1_BASE_ADDR_VIRT 0xfc000000 |
| Sascha Hauer | 8c25c36 | 2009-06-04 11:32:12 +0200 | [diff] [blame] | 6 | #define MX25_AIPS1_SIZE SZ_1M |
| Uwe Kleine-König | c8e5db0 | 2009-11-12 21:51:55 +0100 | [diff] [blame] | 7 | #define MX25_AIPS2_BASE_ADDR 0x53f00000 |
| 8 | #define MX25_AIPS2_BASE_ADDR_VIRT 0xfc200000 |
| Sascha Hauer | 8c25c36 | 2009-06-04 11:32:12 +0200 | [diff] [blame] | 9 | #define MX25_AIPS2_SIZE SZ_1M |
| 10 | #define MX25_AVIC_BASE_ADDR 0x68000000 |
| Uwe Kleine-König | c8e5db0 | 2009-11-12 21:51:55 +0100 | [diff] [blame] | 11 | #define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000 |
| Sascha Hauer | 8c25c36 | 2009-06-04 11:32:12 +0200 | [diff] [blame] | 12 | #define MX25_AVIC_SIZE SZ_1M |
| 13 | |
| 14 | #define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000) |
| 15 | |
| 16 | #define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000) |
| 17 | #define MX25_GPT1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x90000) |
| 18 | #define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000) |
| 19 | |
| 20 | #define MX25_GPIO1_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xcc000) |
| 21 | #define MX25_GPIO2_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xd0000) |
| 22 | #define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000) |
| 23 | #define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000) |
| 24 | |
| Uwe Kleine-König | df9375f | 2009-12-16 19:07:04 +0100 | [diff] [blame] | 25 | #define MX25_IO_ADDRESS(x) ( \ |
| 26 | IMX_IO_ADDRESS(x, MX25_AIPS1) ?: \ |
| 27 | IMX_IO_ADDRESS(x, MX25_AIPS2) ?: \ |
| 28 | IMX_IO_ADDRESS(x, MX25_AVIC)) |
| Sascha Hauer | 8c25c36 | 2009-06-04 11:32:12 +0200 | [diff] [blame] | 29 | |
| Uwe Kleine-König | 66ac2f2 | 2010-01-25 17:55:16 +0100 | [diff] [blame] | 30 | #define MX25_UART1_BASE_ADDR 0x43f90000 |
| 31 | #define MX25_UART2_BASE_ADDR 0x43f94000 |
| Sascha Hauer | 8c25c36 | 2009-06-04 11:32:12 +0200 | [diff] [blame] | 32 | |
| Baruch Siach | a759544 | 2009-12-21 13:44:31 +0200 | [diff] [blame] | 33 | #define MX25_FEC_BASE_ADDR 0x50038000 |
| Baruch Siach | 27f5902 | 2010-01-14 11:24:14 +0200 | [diff] [blame] | 34 | #define MX25_NFC_BASE_ADDR 0xbb000000 |
| Baruch Siach | dcbabbc | 2010-01-27 15:00:48 +0200 | [diff] [blame] | 35 | #define MX25_DRYICE_BASE_ADDR 0x53ffc000 |
| Baruch Siach | 04a03e5 | 2010-02-17 12:33:24 +0200 | [diff] [blame^] | 36 | #define MX25_LCDC_BASE_ADDR 0x53fbc000 |
| Baruch Siach | a759544 | 2009-12-21 13:44:31 +0200 | [diff] [blame] | 37 | |
| Baruch Siach | dcbabbc | 2010-01-27 15:00:48 +0200 | [diff] [blame] | 38 | #define MX25_INT_DRYICE 25 |
| Baruch Siach | a759544 | 2009-12-21 13:44:31 +0200 | [diff] [blame] | 39 | #define MX25_INT_FEC 57 |
| Baruch Siach | 27f5902 | 2010-01-14 11:24:14 +0200 | [diff] [blame] | 40 | #define MX25_INT_NANDFC 33 |
| Baruch Siach | 04a03e5 | 2010-02-17 12:33:24 +0200 | [diff] [blame^] | 41 | #define MX25_INT_LCDC 39 |
| Baruch Siach | a759544 | 2009-12-21 13:44:31 +0200 | [diff] [blame] | 42 | |
| Uwe Kleine-König | 66ac2f2 | 2010-01-25 17:55:16 +0100 | [diff] [blame] | 43 | #if defined(IMX_NEEDS_DEPRECATED_SYMBOLS) |
| 44 | #define UART1_BASE_ADDR MX25_UART1_BASE_ADDR |
| 45 | #define UART2_BASE_ADDR MX25_UART2_BASE_ADDR |
| 46 | #endif |
| 47 | |
| Uwe Kleine-König | 3cdd544 | 2010-01-08 16:02:30 +0100 | [diff] [blame] | 48 | #endif /* ifndef __MACH_MX25_H__ */ |