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Dan Williams9bc89cd2007-01-02 11:10:44 -07001/*
2 * xor offload engine api
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
26#include <linux/kernel.h>
27#include <linux/interrupt.h>
28#include <linux/mm.h>
29#include <linux/dma-mapping.h>
30#include <linux/raid/xor.h>
31#include <linux/async_tx.h>
32
Dan Williams06164f32009-03-25 09:13:25 -070033/* do_async_xor - dma map the pages and perform the xor with an engine */
34static __async_inline struct dma_async_tx_descriptor *
Dan Williams1e55db22008-07-16 19:44:56 -070035do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list,
Dan Williams04ce9ab2009-06-03 14:22:28 -070036 unsigned int offset, int src_cnt, size_t len, dma_addr_t *dma_src,
Dan Williamsa08abd82009-06-03 11:43:59 -070037 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -070038{
Dan Williams1e55db22008-07-16 19:44:56 -070039 struct dma_device *dma = chan->device;
Dan Williams1e55db22008-07-16 19:44:56 -070040 struct dma_async_tx_descriptor *tx = NULL;
41 int src_off = 0;
Dan Williams9bc89cd2007-01-02 11:10:44 -070042 int i;
Dan Williamsa08abd82009-06-03 11:43:59 -070043 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
44 void *cb_param_orig = submit->cb_param;
45 enum async_tx_flags flags_orig = submit->flags;
Dan Williams1e55db22008-07-16 19:44:56 -070046 enum dma_ctrl_flags dma_flags;
47 int xor_src_cnt;
48 dma_addr_t dma_dest;
Dan Williams9bc89cd2007-01-02 11:10:44 -070049
Dan Williamsa06d5682008-12-08 13:46:00 -070050 /* map the dest bidrectional in case it is re-used as a source */
51 dma_dest = dma_map_page(dma->dev, dest, offset, len, DMA_BIDIRECTIONAL);
52 for (i = 0; i < src_cnt; i++) {
53 /* only map the dest once */
54 if (unlikely(src_list[i] == dest)) {
55 dma_src[i] = dma_dest;
56 continue;
57 }
Dan Williams1e55db22008-07-16 19:44:56 -070058 dma_src[i] = dma_map_page(dma->dev, src_list[i], offset,
Dan Williams00367312008-02-02 19:49:57 -070059 len, DMA_TO_DEVICE);
Dan Williamsa06d5682008-12-08 13:46:00 -070060 }
Dan Williams00367312008-02-02 19:49:57 -070061
Dan Williams1e55db22008-07-16 19:44:56 -070062 while (src_cnt) {
Dan Williamsa08abd82009-06-03 11:43:59 -070063 submit->flags = flags_orig;
Dan Williams1e55db22008-07-16 19:44:56 -070064 dma_flags = 0;
65 xor_src_cnt = min(src_cnt, dma->max_xor);
66 /* if we are submitting additional xors, leave the chain open,
67 * clear the callback parameters, and leave the destination
68 * buffer mapped
69 */
70 if (src_cnt > xor_src_cnt) {
Dan Williamsa08abd82009-06-03 11:43:59 -070071 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams1e55db22008-07-16 19:44:56 -070072 dma_flags = DMA_COMPL_SKIP_DEST_UNMAP;
Dan Williamsa08abd82009-06-03 11:43:59 -070073 submit->cb_fn = NULL;
74 submit->cb_param = NULL;
Dan Williams1e55db22008-07-16 19:44:56 -070075 } else {
Dan Williamsa08abd82009-06-03 11:43:59 -070076 submit->cb_fn = cb_fn_orig;
77 submit->cb_param = cb_param_orig;
Dan Williams1e55db22008-07-16 19:44:56 -070078 }
Dan Williamsa08abd82009-06-03 11:43:59 -070079 if (submit->cb_fn)
Dan Williams1e55db22008-07-16 19:44:56 -070080 dma_flags |= DMA_PREP_INTERRUPT;
81
82 /* Since we have clobbered the src_list we are committed
83 * to doing this asynchronously. Drivers force forward progress
84 * in case they can not provide a descriptor
85 */
86 tx = dma->device_prep_dma_xor(chan, dma_dest, &dma_src[src_off],
87 xor_src_cnt, len, dma_flags);
88
Dan Williams669ab0b2008-07-17 17:59:55 -070089 if (unlikely(!tx))
Dan Williamsa08abd82009-06-03 11:43:59 -070090 async_tx_quiesce(&submit->depend_tx);
Dan Williams00367312008-02-02 19:49:57 -070091
Dan Williams1e55db22008-07-16 19:44:56 -070092 /* spin wait for the preceeding transactions to complete */
Dan Williams669ab0b2008-07-17 17:59:55 -070093 while (unlikely(!tx)) {
94 dma_async_issue_pending(chan);
Dan Williams1e55db22008-07-16 19:44:56 -070095 tx = dma->device_prep_dma_xor(chan, dma_dest,
96 &dma_src[src_off],
97 xor_src_cnt, len,
98 dma_flags);
Dan Williams669ab0b2008-07-17 17:59:55 -070099 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700100
Dan Williamsa08abd82009-06-03 11:43:59 -0700101 async_tx_submit(chan, tx, submit);
102 submit->depend_tx = tx;
Dan Williams1e55db22008-07-16 19:44:56 -0700103
104 if (src_cnt > xor_src_cnt) {
105 /* drop completed sources */
106 src_cnt -= xor_src_cnt;
107 src_off += xor_src_cnt;
108
109 /* use the intermediate result a source */
110 dma_src[--src_off] = dma_dest;
111 src_cnt++;
112 } else
113 break;
114 }
Dan Williams00367312008-02-02 19:49:57 -0700115
116 return tx;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700117}
118
119static void
120do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsa08abd82009-06-03 11:43:59 -0700121 int src_cnt, size_t len, struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700122{
Dan Williams9bc89cd2007-01-02 11:10:44 -0700123 int i;
Dan Williams1e55db22008-07-16 19:44:56 -0700124 int xor_src_cnt;
125 int src_off = 0;
126 void *dest_buf;
Dan Williams04ce9ab2009-06-03 14:22:28 -0700127 void **srcs;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700128
Dan Williams04ce9ab2009-06-03 14:22:28 -0700129 if (submit->scribble)
130 srcs = submit->scribble;
131 else
132 srcs = (void **) src_list;
133
134 /* convert to buffer pointers */
Dan Williams9bc89cd2007-01-02 11:10:44 -0700135 for (i = 0; i < src_cnt; i++)
Dan Williams1e55db22008-07-16 19:44:56 -0700136 srcs[i] = page_address(src_list[i]) + offset;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700137
138 /* set destination address */
Dan Williams1e55db22008-07-16 19:44:56 -0700139 dest_buf = page_address(dest) + offset;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700140
Dan Williamsa08abd82009-06-03 11:43:59 -0700141 if (submit->flags & ASYNC_TX_XOR_ZERO_DST)
Dan Williams1e55db22008-07-16 19:44:56 -0700142 memset(dest_buf, 0, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700143
Dan Williams1e55db22008-07-16 19:44:56 -0700144 while (src_cnt > 0) {
145 /* process up to 'MAX_XOR_BLOCKS' sources */
146 xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS);
147 xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]);
148
149 /* drop completed sources */
150 src_cnt -= xor_src_cnt;
151 src_off += xor_src_cnt;
152 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700153
Dan Williamsa08abd82009-06-03 11:43:59 -0700154 async_tx_sync_epilog(submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700155}
156
157/**
158 * async_xor - attempt to xor a set of blocks with a dma engine.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700159 * @dest: destination page
Dan Williamsa08abd82009-06-03 11:43:59 -0700160 * @src_list: array of source pages
161 * @offset: common src/dst offset to start transaction
Dan Williams9bc89cd2007-01-02 11:10:44 -0700162 * @src_cnt: number of source pages
163 * @len: length in bytes
Dan Williamsa08abd82009-06-03 11:43:59 -0700164 * @submit: submission / completion modifiers
165 *
166 * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST
167 *
168 * xor_blocks always uses the dest as a source so the
169 * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in
170 * the calculation. The assumption with dma eninges is that they only
171 * use the destination buffer as a source when it is explicity specified
172 * in the source list.
173 *
174 * src_list note: if the dest is also a source it must be at index zero.
175 * The contents of this array will be overwritten if a scribble region
176 * is not specified.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700177 */
178struct dma_async_tx_descriptor *
179async_xor(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsa08abd82009-06-03 11:43:59 -0700180 int src_cnt, size_t len, struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700181{
Dan Williamsa08abd82009-06-03 11:43:59 -0700182 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
Dan Williams47437b22008-02-02 19:49:59 -0700183 &dest, 1, src_list,
184 src_cnt, len);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700185 dma_addr_t *dma_src = NULL;
186
Dan Williams9bc89cd2007-01-02 11:10:44 -0700187 BUG_ON(src_cnt <= 1);
188
Dan Williams04ce9ab2009-06-03 14:22:28 -0700189 if (submit->scribble)
190 dma_src = submit->scribble;
191 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
192 dma_src = (dma_addr_t *) src_list;
193
194 if (dma_src && chan) {
Dan Williams1e55db22008-07-16 19:44:56 -0700195 /* run the xor asynchronously */
196 pr_debug("%s (async): len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700197
Dan Williams1e55db22008-07-16 19:44:56 -0700198 return do_async_xor(chan, dest, src_list, offset, src_cnt, len,
Dan Williams04ce9ab2009-06-03 14:22:28 -0700199 dma_src, submit);
Dan Williams1e55db22008-07-16 19:44:56 -0700200 } else {
201 /* run the xor synchronously */
202 pr_debug("%s (sync): len: %zu\n", __func__, len);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700203 WARN_ONCE(chan, "%s: no space for dma address conversion\n",
204 __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700205
Dan Williams1e55db22008-07-16 19:44:56 -0700206 /* in the sync case the dest is an implied source
207 * (assumes the dest is the first source)
208 */
Dan Williamsa08abd82009-06-03 11:43:59 -0700209 if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
Dan Williams1e55db22008-07-16 19:44:56 -0700210 src_cnt--;
211 src_list++;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700212 }
213
Dan Williams1e55db22008-07-16 19:44:56 -0700214 /* wait for any prerequisite operations */
Dan Williamsa08abd82009-06-03 11:43:59 -0700215 async_tx_quiesce(&submit->depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700216
Dan Williamsa08abd82009-06-03 11:43:59 -0700217 do_sync_xor(dest, src_list, offset, src_cnt, len, submit);
Dan Williams1e55db22008-07-16 19:44:56 -0700218
219 return NULL;
220 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700221}
222EXPORT_SYMBOL_GPL(async_xor);
223
224static int page_is_zero(struct page *p, unsigned int offset, size_t len)
225{
226 char *a = page_address(p) + offset;
227 return ((*(u32 *) a) == 0 &&
228 memcmp(a, a + 4, len - 4) == 0);
229}
230
231/**
Dan Williams099f53c2009-04-08 14:28:37 -0700232 * async_xor_val - attempt a xor parity check with a dma engine.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700233 * @dest: destination page used if the xor is performed synchronously
Dan Williamsa08abd82009-06-03 11:43:59 -0700234 * @src_list: array of source pages
Dan Williams9bc89cd2007-01-02 11:10:44 -0700235 * @offset: offset in pages to start transaction
236 * @src_cnt: number of source pages
237 * @len: length in bytes
238 * @result: 0 if sum == 0 else non-zero
Dan Williamsa08abd82009-06-03 11:43:59 -0700239 * @submit: submission / completion modifiers
240 *
241 * honored flags: ASYNC_TX_ACK
242 *
243 * src_list note: if the dest is also a source it must be at index zero.
244 * The contents of this array will be overwritten if a scribble region
245 * is not specified.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700246 */
247struct dma_async_tx_descriptor *
Dan Williamsa08abd82009-06-03 11:43:59 -0700248async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
249 int src_cnt, size_t len, u32 *result,
250 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700251{
Dan Williamsa08abd82009-06-03 11:43:59 -0700252 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR_VAL,
Dan Williams47437b22008-02-02 19:49:59 -0700253 &dest, 1, src_list,
254 src_cnt, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700255 struct dma_device *device = chan ? chan->device : NULL;
Dan Williams00367312008-02-02 19:49:57 -0700256 struct dma_async_tx_descriptor *tx = NULL;
Dan Williams04ce9ab2009-06-03 14:22:28 -0700257 dma_addr_t *dma_src = NULL;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700258
259 BUG_ON(src_cnt <= 1);
260
Dan Williams04ce9ab2009-06-03 14:22:28 -0700261 if (submit->scribble)
262 dma_src = submit->scribble;
263 else if (sizeof(dma_addr_t) <= sizeof(struct page *))
264 dma_src = (dma_addr_t *) src_list;
265
266 if (dma_src && device && src_cnt <= device->max_xor) {
Dan Williamsa08abd82009-06-03 11:43:59 -0700267 unsigned long dma_prep_flags;
Dan Williams00367312008-02-02 19:49:57 -0700268 int i;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700269
Dan Williams3280ab3e2008-03-13 17:45:28 -0700270 pr_debug("%s: (async) len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700271
Dan Williamsa08abd82009-06-03 11:43:59 -0700272 dma_prep_flags = submit->cb_fn ? DMA_PREP_INTERRUPT : 0;
Dan Williams00367312008-02-02 19:49:57 -0700273 for (i = 0; i < src_cnt; i++)
274 dma_src[i] = dma_map_page(device->dev, src_list[i],
275 offset, len, DMA_TO_DEVICE);
276
Dan Williams099f53c2009-04-08 14:28:37 -0700277 tx = device->device_prep_dma_xor_val(chan, dma_src, src_cnt,
278 len, result,
279 dma_prep_flags);
Dan Williams669ab0b2008-07-17 17:59:55 -0700280 if (unlikely(!tx)) {
Dan Williamsa08abd82009-06-03 11:43:59 -0700281 async_tx_quiesce(&submit->depend_tx);
Dan Williams00367312008-02-02 19:49:57 -0700282
Dan Williamse34a8ae2008-08-05 10:22:05 -0700283 while (!tx) {
Dan Williams669ab0b2008-07-17 17:59:55 -0700284 dma_async_issue_pending(chan);
Dan Williams099f53c2009-04-08 14:28:37 -0700285 tx = device->device_prep_dma_xor_val(chan,
Dan Williams00367312008-02-02 19:49:57 -0700286 dma_src, src_cnt, len, result,
Dan Williamsd4c56f92008-02-02 19:49:58 -0700287 dma_prep_flags);
Dan Williamse34a8ae2008-08-05 10:22:05 -0700288 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700289 }
290
Dan Williamsa08abd82009-06-03 11:43:59 -0700291 async_tx_submit(chan, tx, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700292 } else {
Dan Williamsa08abd82009-06-03 11:43:59 -0700293 enum async_tx_flags flags_orig = submit->flags;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700294
Dan Williams3280ab3e2008-03-13 17:45:28 -0700295 pr_debug("%s: (sync) len: %zu\n", __func__, len);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700296 WARN_ONCE(device && src_cnt <= device->max_xor,
297 "%s: no space for dma address conversion\n",
298 __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700299
Dan Williamsa08abd82009-06-03 11:43:59 -0700300 submit->flags |= ASYNC_TX_XOR_DROP_DST;
301 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700302
Dan Williamsa08abd82009-06-03 11:43:59 -0700303 tx = async_xor(dest, src_list, offset, src_cnt, len, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700304
Dan Williamsd2c52b72008-07-17 17:59:55 -0700305 async_tx_quiesce(&tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700306
307 *result = page_is_zero(dest, offset, len) ? 0 : 1;
308
Dan Williamsa08abd82009-06-03 11:43:59 -0700309 async_tx_sync_epilog(submit);
310 submit->flags = flags_orig;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700311 }
312
313 return tx;
314}
Dan Williams099f53c2009-04-08 14:28:37 -0700315EXPORT_SYMBOL_GPL(async_xor_val);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700316
Dan Williams9bc89cd2007-01-02 11:10:44 -0700317MODULE_AUTHOR("Intel Corporation");
318MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
319MODULE_LICENSE("GPL");