Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the Chelsio T4 Ethernet driver for Linux. |
| 3 | * |
Anish Bhatt | ce100b8b | 2014-06-19 21:37:15 -0700 | [diff] [blame] | 4 | * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved. |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5 | * |
| 6 | * This software is available to you under a choice of one of two |
| 7 | * licenses. You may choose to be licensed under the terms of the GNU |
| 8 | * General Public License (GPL) Version 2, available from the file |
| 9 | * COPYING in the main directory of this source tree, or the |
| 10 | * OpenIB.org BSD license below: |
| 11 | * |
| 12 | * Redistribution and use in source and binary forms, with or |
| 13 | * without modification, are permitted provided that the following |
| 14 | * conditions are met: |
| 15 | * |
| 16 | * - Redistributions of source code must retain the above |
| 17 | * copyright notice, this list of conditions and the following |
| 18 | * disclaimer. |
| 19 | * |
| 20 | * - Redistributions in binary form must reproduce the above |
| 21 | * copyright notice, this list of conditions and the following |
| 22 | * disclaimer in the documentation and/or other materials |
| 23 | * provided with the distribution. |
| 24 | * |
| 25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 32 | * SOFTWARE. |
| 33 | */ |
| 34 | |
| 35 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 36 | |
| 37 | #include <linux/bitmap.h> |
| 38 | #include <linux/crc32.h> |
| 39 | #include <linux/ctype.h> |
| 40 | #include <linux/debugfs.h> |
| 41 | #include <linux/err.h> |
| 42 | #include <linux/etherdevice.h> |
| 43 | #include <linux/firmware.h> |
Jiri Pirko | 0178934 | 2011-08-16 06:29:00 +0000 | [diff] [blame] | 44 | #include <linux/if.h> |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 45 | #include <linux/if_vlan.h> |
| 46 | #include <linux/init.h> |
| 47 | #include <linux/log2.h> |
| 48 | #include <linux/mdio.h> |
| 49 | #include <linux/module.h> |
| 50 | #include <linux/moduleparam.h> |
| 51 | #include <linux/mutex.h> |
| 52 | #include <linux/netdevice.h> |
| 53 | #include <linux/pci.h> |
| 54 | #include <linux/aer.h> |
| 55 | #include <linux/rtnetlink.h> |
| 56 | #include <linux/sched.h> |
| 57 | #include <linux/seq_file.h> |
| 58 | #include <linux/sockios.h> |
| 59 | #include <linux/vmalloc.h> |
| 60 | #include <linux/workqueue.h> |
| 61 | #include <net/neighbour.h> |
| 62 | #include <net/netevent.h> |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 63 | #include <net/addrconf.h> |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 64 | #include <asm/uaccess.h> |
| 65 | |
| 66 | #include "cxgb4.h" |
| 67 | #include "t4_regs.h" |
| 68 | #include "t4_msg.h" |
| 69 | #include "t4fw_api.h" |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 70 | #include "cxgb4_dcb.h" |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 71 | #include "l2t.h" |
| 72 | |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 73 | #include <../drivers/net/bonding/bonding.h> |
| 74 | |
| 75 | #ifdef DRV_VERSION |
| 76 | #undef DRV_VERSION |
| 77 | #endif |
Santosh Rastapur | 3a7f855 | 2013-03-14 05:08:55 +0000 | [diff] [blame] | 78 | #define DRV_VERSION "2.0.0-ko" |
| 79 | #define DRV_DESC "Chelsio T4/T5 Network Driver" |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 80 | |
| 81 | /* |
| 82 | * Max interrupt hold-off timer value in us. Queues fall back to this value |
| 83 | * under extreme memory pressure so it's largish to give the system time to |
| 84 | * recover. |
| 85 | */ |
| 86 | #define MAX_SGE_TIMERVAL 200U |
| 87 | |
Casey Leedom | 7ee9ff9 | 2010-06-25 12:11:46 +0000 | [diff] [blame] | 88 | enum { |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 89 | /* |
| 90 | * Physical Function provisioning constants. |
| 91 | */ |
| 92 | PFRES_NVI = 4, /* # of Virtual Interfaces */ |
| 93 | PFRES_NETHCTRL = 128, /* # of EQs used for ETH or CTRL Qs */ |
| 94 | PFRES_NIQFLINT = 128, /* # of ingress Qs/w Free List(s)/intr |
| 95 | */ |
| 96 | PFRES_NEQ = 256, /* # of egress queues */ |
| 97 | PFRES_NIQ = 0, /* # of ingress queues */ |
| 98 | PFRES_TC = 0, /* PCI-E traffic class */ |
| 99 | PFRES_NEXACTF = 128, /* # of exact MPS filters */ |
| 100 | |
| 101 | PFRES_R_CAPS = FW_CMD_CAP_PF, |
| 102 | PFRES_WX_CAPS = FW_CMD_CAP_PF, |
| 103 | |
| 104 | #ifdef CONFIG_PCI_IOV |
| 105 | /* |
| 106 | * Virtual Function provisioning constants. We need two extra Ingress |
| 107 | * Queues with Interrupt capability to serve as the VF's Firmware |
| 108 | * Event Queue and Forwarded Interrupt Queue (when using MSI mode) -- |
| 109 | * neither will have Free Lists associated with them). For each |
| 110 | * Ethernet/Control Egress Queue and for each Free List, we need an |
| 111 | * Egress Context. |
| 112 | */ |
Casey Leedom | 7ee9ff9 | 2010-06-25 12:11:46 +0000 | [diff] [blame] | 113 | VFRES_NPORTS = 1, /* # of "ports" per VF */ |
| 114 | VFRES_NQSETS = 2, /* # of "Queue Sets" per VF */ |
| 115 | |
| 116 | VFRES_NVI = VFRES_NPORTS, /* # of Virtual Interfaces */ |
| 117 | VFRES_NETHCTRL = VFRES_NQSETS, /* # of EQs used for ETH or CTRL Qs */ |
| 118 | VFRES_NIQFLINT = VFRES_NQSETS+2,/* # of ingress Qs/w Free List(s)/intr */ |
Casey Leedom | 7ee9ff9 | 2010-06-25 12:11:46 +0000 | [diff] [blame] | 119 | VFRES_NEQ = VFRES_NQSETS*2, /* # of egress queues */ |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 120 | VFRES_NIQ = 0, /* # of non-fl/int ingress queues */ |
Casey Leedom | 7ee9ff9 | 2010-06-25 12:11:46 +0000 | [diff] [blame] | 121 | VFRES_TC = 0, /* PCI-E traffic class */ |
| 122 | VFRES_NEXACTF = 16, /* # of exact MPS filters */ |
| 123 | |
| 124 | VFRES_R_CAPS = FW_CMD_CAP_DMAQ|FW_CMD_CAP_VF|FW_CMD_CAP_PORT, |
| 125 | VFRES_WX_CAPS = FW_CMD_CAP_DMAQ|FW_CMD_CAP_VF, |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 126 | #endif |
Casey Leedom | 7ee9ff9 | 2010-06-25 12:11:46 +0000 | [diff] [blame] | 127 | }; |
| 128 | |
| 129 | /* |
| 130 | * Provide a Port Access Rights Mask for the specified PF/VF. This is very |
| 131 | * static and likely not to be useful in the long run. We really need to |
| 132 | * implement some form of persistent configuration which the firmware |
| 133 | * controls. |
| 134 | */ |
| 135 | static unsigned int pfvfres_pmask(struct adapter *adapter, |
| 136 | unsigned int pf, unsigned int vf) |
| 137 | { |
| 138 | unsigned int portn, portvec; |
| 139 | |
| 140 | /* |
| 141 | * Give PF's access to all of the ports. |
| 142 | */ |
| 143 | if (vf == 0) |
| 144 | return FW_PFVF_CMD_PMASK_MASK; |
| 145 | |
| 146 | /* |
| 147 | * For VFs, we'll assign them access to the ports based purely on the |
| 148 | * PF. We assign active ports in order, wrapping around if there are |
| 149 | * fewer active ports than PFs: e.g. active port[pf % nports]. |
| 150 | * Unfortunately the adapter's port_info structs haven't been |
| 151 | * initialized yet so we have to compute this. |
| 152 | */ |
| 153 | if (adapter->params.nports == 0) |
| 154 | return 0; |
| 155 | |
| 156 | portn = pf % adapter->params.nports; |
| 157 | portvec = adapter->params.portvec; |
| 158 | for (;;) { |
| 159 | /* |
| 160 | * Isolate the lowest set bit in the port vector. If we're at |
| 161 | * the port number that we want, return that as the pmask. |
| 162 | * otherwise mask that bit out of the port vector and |
| 163 | * decrement our port number ... |
| 164 | */ |
| 165 | unsigned int pmask = portvec ^ (portvec & (portvec-1)); |
| 166 | if (portn == 0) |
| 167 | return pmask; |
| 168 | portn--; |
| 169 | portvec &= ~pmask; |
| 170 | } |
| 171 | /*NOTREACHED*/ |
| 172 | } |
Casey Leedom | 7ee9ff9 | 2010-06-25 12:11:46 +0000 | [diff] [blame] | 173 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 174 | enum { |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 175 | MAX_TXQ_ENTRIES = 16384, |
| 176 | MAX_CTRL_TXQ_ENTRIES = 1024, |
| 177 | MAX_RSPQ_ENTRIES = 16384, |
| 178 | MAX_RX_BUFFERS = 16384, |
| 179 | MIN_TXQ_ENTRIES = 32, |
| 180 | MIN_CTRL_TXQ_ENTRIES = 32, |
| 181 | MIN_RSPQ_ENTRIES = 128, |
| 182 | MIN_FL_ENTRIES = 16 |
| 183 | }; |
| 184 | |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 185 | /* Host shadow copy of ingress filter entry. This is in host native format |
| 186 | * and doesn't match the ordering or bit order, etc. of the hardware of the |
| 187 | * firmware command. The use of bit-field structure elements is purely to |
| 188 | * remind ourselves of the field size limitations and save memory in the case |
| 189 | * where the filter table is large. |
| 190 | */ |
| 191 | struct filter_entry { |
| 192 | /* Administrative fields for filter. |
| 193 | */ |
| 194 | u32 valid:1; /* filter allocated and valid */ |
| 195 | u32 locked:1; /* filter is administratively locked */ |
| 196 | |
| 197 | u32 pending:1; /* filter action is pending firmware reply */ |
| 198 | u32 smtidx:8; /* Source MAC Table index for smac */ |
| 199 | struct l2t_entry *l2t; /* Layer Two Table entry for dmac */ |
| 200 | |
| 201 | /* The filter itself. Most of this is a straight copy of information |
| 202 | * provided by the extended ioctl(). Some fields are translated to |
| 203 | * internal forms -- for instance the Ingress Queue ID passed in from |
| 204 | * the ioctl() is translated into the Absolute Ingress Queue ID. |
| 205 | */ |
| 206 | struct ch_filter_specification fs; |
| 207 | }; |
| 208 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 209 | #define DFLT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \ |
| 210 | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |\ |
| 211 | NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR) |
| 212 | |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 213 | #define CH_DEVICE(devid, data) { PCI_VDEVICE(CHELSIO, devid), (data) } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 214 | |
| 215 | static DEFINE_PCI_DEVICE_TABLE(cxgb4_pci_tbl) = { |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 216 | CH_DEVICE(0xa000, 0), /* PE10K */ |
Dimitris Michailidis | ccea790 | 2010-08-23 17:21:01 +0000 | [diff] [blame] | 217 | CH_DEVICE(0x4001, -1), |
| 218 | CH_DEVICE(0x4002, -1), |
| 219 | CH_DEVICE(0x4003, -1), |
| 220 | CH_DEVICE(0x4004, -1), |
| 221 | CH_DEVICE(0x4005, -1), |
| 222 | CH_DEVICE(0x4006, -1), |
| 223 | CH_DEVICE(0x4007, -1), |
| 224 | CH_DEVICE(0x4008, -1), |
| 225 | CH_DEVICE(0x4009, -1), |
| 226 | CH_DEVICE(0x400a, -1), |
Hariprasad Shenai | fb1e933 | 2014-06-27 19:23:50 +0530 | [diff] [blame] | 227 | CH_DEVICE(0x400d, -1), |
| 228 | CH_DEVICE(0x400e, -1), |
| 229 | CH_DEVICE(0x4080, -1), |
| 230 | CH_DEVICE(0x4081, -1), |
| 231 | CH_DEVICE(0x4082, -1), |
| 232 | CH_DEVICE(0x4083, -1), |
| 233 | CH_DEVICE(0x4084, -1), |
| 234 | CH_DEVICE(0x4085, -1), |
| 235 | CH_DEVICE(0x4086, -1), |
| 236 | CH_DEVICE(0x4087, -1), |
| 237 | CH_DEVICE(0x4088, -1), |
Dimitris Michailidis | ccea790 | 2010-08-23 17:21:01 +0000 | [diff] [blame] | 238 | CH_DEVICE(0x4401, 4), |
| 239 | CH_DEVICE(0x4402, 4), |
| 240 | CH_DEVICE(0x4403, 4), |
| 241 | CH_DEVICE(0x4404, 4), |
| 242 | CH_DEVICE(0x4405, 4), |
| 243 | CH_DEVICE(0x4406, 4), |
| 244 | CH_DEVICE(0x4407, 4), |
| 245 | CH_DEVICE(0x4408, 4), |
| 246 | CH_DEVICE(0x4409, 4), |
| 247 | CH_DEVICE(0x440a, 4), |
Vipul Pandya | f637d57 | 2012-03-05 22:56:36 +0000 | [diff] [blame] | 248 | CH_DEVICE(0x440d, 4), |
| 249 | CH_DEVICE(0x440e, 4), |
Hariprasad Shenai | fb1e933 | 2014-06-27 19:23:50 +0530 | [diff] [blame] | 250 | CH_DEVICE(0x4480, 4), |
| 251 | CH_DEVICE(0x4481, 4), |
| 252 | CH_DEVICE(0x4482, 4), |
| 253 | CH_DEVICE(0x4483, 4), |
| 254 | CH_DEVICE(0x4484, 4), |
| 255 | CH_DEVICE(0x4485, 4), |
| 256 | CH_DEVICE(0x4486, 4), |
| 257 | CH_DEVICE(0x4487, 4), |
| 258 | CH_DEVICE(0x4488, 4), |
Vipul Pandya | 9ef603a | 2013-04-29 04:04:39 +0000 | [diff] [blame] | 259 | CH_DEVICE(0x5001, 4), |
| 260 | CH_DEVICE(0x5002, 4), |
| 261 | CH_DEVICE(0x5003, 4), |
| 262 | CH_DEVICE(0x5004, 4), |
| 263 | CH_DEVICE(0x5005, 4), |
| 264 | CH_DEVICE(0x5006, 4), |
| 265 | CH_DEVICE(0x5007, 4), |
| 266 | CH_DEVICE(0x5008, 4), |
| 267 | CH_DEVICE(0x5009, 4), |
| 268 | CH_DEVICE(0x500A, 4), |
| 269 | CH_DEVICE(0x500B, 4), |
| 270 | CH_DEVICE(0x500C, 4), |
| 271 | CH_DEVICE(0x500D, 4), |
| 272 | CH_DEVICE(0x500E, 4), |
| 273 | CH_DEVICE(0x500F, 4), |
| 274 | CH_DEVICE(0x5010, 4), |
| 275 | CH_DEVICE(0x5011, 4), |
| 276 | CH_DEVICE(0x5012, 4), |
| 277 | CH_DEVICE(0x5013, 4), |
Hariprasad Shenai | f0a8e6d | 2014-02-18 17:56:15 +0530 | [diff] [blame] | 278 | CH_DEVICE(0x5014, 4), |
| 279 | CH_DEVICE(0x5015, 4), |
Hariprasad Shenai | 0183aa6 | 2014-03-27 18:17:09 +0530 | [diff] [blame] | 280 | CH_DEVICE(0x5080, 4), |
| 281 | CH_DEVICE(0x5081, 4), |
| 282 | CH_DEVICE(0x5082, 4), |
| 283 | CH_DEVICE(0x5083, 4), |
| 284 | CH_DEVICE(0x5084, 4), |
| 285 | CH_DEVICE(0x5085, 4), |
Vipul Pandya | 9ef603a | 2013-04-29 04:04:39 +0000 | [diff] [blame] | 286 | CH_DEVICE(0x5401, 4), |
| 287 | CH_DEVICE(0x5402, 4), |
| 288 | CH_DEVICE(0x5403, 4), |
| 289 | CH_DEVICE(0x5404, 4), |
| 290 | CH_DEVICE(0x5405, 4), |
| 291 | CH_DEVICE(0x5406, 4), |
| 292 | CH_DEVICE(0x5407, 4), |
| 293 | CH_DEVICE(0x5408, 4), |
| 294 | CH_DEVICE(0x5409, 4), |
| 295 | CH_DEVICE(0x540A, 4), |
| 296 | CH_DEVICE(0x540B, 4), |
| 297 | CH_DEVICE(0x540C, 4), |
| 298 | CH_DEVICE(0x540D, 4), |
| 299 | CH_DEVICE(0x540E, 4), |
| 300 | CH_DEVICE(0x540F, 4), |
| 301 | CH_DEVICE(0x5410, 4), |
| 302 | CH_DEVICE(0x5411, 4), |
| 303 | CH_DEVICE(0x5412, 4), |
| 304 | CH_DEVICE(0x5413, 4), |
Hariprasad Shenai | f0a8e6d | 2014-02-18 17:56:15 +0530 | [diff] [blame] | 305 | CH_DEVICE(0x5414, 4), |
| 306 | CH_DEVICE(0x5415, 4), |
Hariprasad Shenai | 0183aa6 | 2014-03-27 18:17:09 +0530 | [diff] [blame] | 307 | CH_DEVICE(0x5480, 4), |
| 308 | CH_DEVICE(0x5481, 4), |
| 309 | CH_DEVICE(0x5482, 4), |
| 310 | CH_DEVICE(0x5483, 4), |
| 311 | CH_DEVICE(0x5484, 4), |
| 312 | CH_DEVICE(0x5485, 4), |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 313 | { 0, } |
| 314 | }; |
| 315 | |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 316 | #define FW4_FNAME "cxgb4/t4fw.bin" |
Santosh Rastapur | 0a57a53 | 2013-03-14 05:08:49 +0000 | [diff] [blame] | 317 | #define FW5_FNAME "cxgb4/t5fw.bin" |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 318 | #define FW4_CFNAME "cxgb4/t4-config.txt" |
Santosh Rastapur | 0a57a53 | 2013-03-14 05:08:49 +0000 | [diff] [blame] | 319 | #define FW5_CFNAME "cxgb4/t5-config.txt" |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 320 | |
| 321 | MODULE_DESCRIPTION(DRV_DESC); |
| 322 | MODULE_AUTHOR("Chelsio Communications"); |
| 323 | MODULE_LICENSE("Dual BSD/GPL"); |
| 324 | MODULE_VERSION(DRV_VERSION); |
| 325 | MODULE_DEVICE_TABLE(pci, cxgb4_pci_tbl); |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 326 | MODULE_FIRMWARE(FW4_FNAME); |
Santosh Rastapur | 0a57a53 | 2013-03-14 05:08:49 +0000 | [diff] [blame] | 327 | MODULE_FIRMWARE(FW5_FNAME); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 328 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 329 | /* |
| 330 | * Normally we're willing to become the firmware's Master PF but will be happy |
| 331 | * if another PF has already become the Master and initialized the adapter. |
| 332 | * Setting "force_init" will cause this driver to forcibly establish itself as |
| 333 | * the Master PF and initialize the adapter. |
| 334 | */ |
| 335 | static uint force_init; |
| 336 | |
| 337 | module_param(force_init, uint, 0644); |
| 338 | MODULE_PARM_DESC(force_init, "Forcibly become Master PF and initialize adapter"); |
| 339 | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 340 | /* |
| 341 | * Normally if the firmware we connect to has Configuration File support, we |
| 342 | * use that and only fall back to the old Driver-based initialization if the |
| 343 | * Configuration File fails for some reason. If force_old_init is set, then |
| 344 | * we'll always use the old Driver-based initialization sequence. |
| 345 | */ |
| 346 | static uint force_old_init; |
| 347 | |
| 348 | module_param(force_old_init, uint, 0644); |
| 349 | MODULE_PARM_DESC(force_old_init, "Force old initialization sequence"); |
| 350 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 351 | static int dflt_msg_enable = DFLT_MSG_ENABLE; |
| 352 | |
| 353 | module_param(dflt_msg_enable, int, 0644); |
| 354 | MODULE_PARM_DESC(dflt_msg_enable, "Chelsio T4 default message enable bitmap"); |
| 355 | |
| 356 | /* |
| 357 | * The driver uses the best interrupt scheme available on a platform in the |
| 358 | * order MSI-X, MSI, legacy INTx interrupts. This parameter determines which |
| 359 | * of these schemes the driver may consider as follows: |
| 360 | * |
| 361 | * msi = 2: choose from among all three options |
| 362 | * msi = 1: only consider MSI and INTx interrupts |
| 363 | * msi = 0: force INTx interrupts |
| 364 | */ |
| 365 | static int msi = 2; |
| 366 | |
| 367 | module_param(msi, int, 0644); |
| 368 | MODULE_PARM_DESC(msi, "whether to use INTx (0), MSI (1) or MSI-X (2)"); |
| 369 | |
| 370 | /* |
| 371 | * Queue interrupt hold-off timer values. Queues default to the first of these |
| 372 | * upon creation. |
| 373 | */ |
| 374 | static unsigned int intr_holdoff[SGE_NTIMERS - 1] = { 5, 10, 20, 50, 100 }; |
| 375 | |
| 376 | module_param_array(intr_holdoff, uint, NULL, 0644); |
| 377 | MODULE_PARM_DESC(intr_holdoff, "values for queue interrupt hold-off timers " |
| 378 | "0..4 in microseconds"); |
| 379 | |
| 380 | static unsigned int intr_cnt[SGE_NCOUNTERS - 1] = { 4, 8, 16 }; |
| 381 | |
| 382 | module_param_array(intr_cnt, uint, NULL, 0644); |
| 383 | MODULE_PARM_DESC(intr_cnt, |
| 384 | "thresholds 1..3 for queue interrupt packet counters"); |
| 385 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 386 | /* |
| 387 | * Normally we tell the chip to deliver Ingress Packets into our DMA buffers |
| 388 | * offset by 2 bytes in order to have the IP headers line up on 4-byte |
| 389 | * boundaries. This is a requirement for many architectures which will throw |
| 390 | * a machine check fault if an attempt is made to access one of the 4-byte IP |
| 391 | * header fields on a non-4-byte boundary. And it's a major performance issue |
| 392 | * even on some architectures which allow it like some implementations of the |
| 393 | * x86 ISA. However, some architectures don't mind this and for some very |
| 394 | * edge-case performance sensitive applications (like forwarding large volumes |
| 395 | * of small packets), setting this DMA offset to 0 will decrease the number of |
| 396 | * PCI-E Bus transfers enough to measurably affect performance. |
| 397 | */ |
| 398 | static int rx_dma_offset = 2; |
| 399 | |
Rusty Russell | eb93992 | 2011-12-19 14:08:01 +0000 | [diff] [blame] | 400 | static bool vf_acls; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 401 | |
| 402 | #ifdef CONFIG_PCI_IOV |
| 403 | module_param(vf_acls, bool, 0644); |
| 404 | MODULE_PARM_DESC(vf_acls, "if set enable virtualization L2 ACL enforcement"); |
| 405 | |
Santosh Rastapur | 7d6727c | 2013-03-14 05:08:56 +0000 | [diff] [blame] | 406 | /* Configure the number of PCI-E Virtual Function which are to be instantiated |
| 407 | * on SR-IOV Capable Physical Functions. |
Santosh Rastapur | 0a57a53 | 2013-03-14 05:08:49 +0000 | [diff] [blame] | 408 | */ |
Santosh Rastapur | 7d6727c | 2013-03-14 05:08:56 +0000 | [diff] [blame] | 409 | static unsigned int num_vf[NUM_OF_PF_WITH_SRIOV]; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 410 | |
| 411 | module_param_array(num_vf, uint, NULL, 0644); |
Santosh Rastapur | 7d6727c | 2013-03-14 05:08:56 +0000 | [diff] [blame] | 412 | MODULE_PARM_DESC(num_vf, "number of VFs for each of PFs 0-3"); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 413 | #endif |
| 414 | |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 415 | /* TX Queue select used to determine what algorithm to use for selecting TX |
| 416 | * queue. Select between the kernel provided function (select_queue=0) or user |
| 417 | * cxgb_select_queue function (select_queue=1) |
| 418 | * |
| 419 | * Default: select_queue=0 |
| 420 | */ |
| 421 | static int select_queue; |
| 422 | module_param(select_queue, int, 0644); |
| 423 | MODULE_PARM_DESC(select_queue, |
| 424 | "Select between kernel provided method of selecting or driver method of selecting TX queue. Default is kernel method."); |
| 425 | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 426 | /* |
| 427 | * The filter TCAM has a fixed portion and a variable portion. The fixed |
| 428 | * portion can match on source/destination IP IPv4/IPv6 addresses and TCP/UDP |
| 429 | * ports. The variable portion is 36 bits which can include things like Exact |
| 430 | * Match MAC Index (9 bits), Ether Type (16 bits), IP Protocol (8 bits), |
| 431 | * [Inner] VLAN Tag (17 bits), etc. which, if all were somehow selected, would |
| 432 | * far exceed the 36-bit budget for this "compressed" header portion of the |
| 433 | * filter. Thus, we have a scarce resource which must be carefully managed. |
| 434 | * |
| 435 | * By default we set this up to mostly match the set of filter matching |
| 436 | * capabilities of T3 but with accommodations for some of T4's more |
| 437 | * interesting features: |
| 438 | * |
| 439 | * { IP Fragment (1), MPS Match Type (3), IP Protocol (8), |
| 440 | * [Inner] VLAN (17), Port (3), FCoE (1) } |
| 441 | */ |
| 442 | enum { |
| 443 | TP_VLAN_PRI_MAP_DEFAULT = HW_TPL_FR_MT_PR_IV_P_FC, |
| 444 | TP_VLAN_PRI_MAP_FIRST = FCOE_SHIFT, |
| 445 | TP_VLAN_PRI_MAP_LAST = FRAGMENTATION_SHIFT, |
| 446 | }; |
| 447 | |
| 448 | static unsigned int tp_vlan_pri_map = TP_VLAN_PRI_MAP_DEFAULT; |
| 449 | |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 450 | module_param(tp_vlan_pri_map, uint, 0644); |
| 451 | MODULE_PARM_DESC(tp_vlan_pri_map, "global compressed filter configuration"); |
| 452 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 453 | static struct dentry *cxgb4_debugfs_root; |
| 454 | |
| 455 | static LIST_HEAD(adapter_list); |
| 456 | static DEFINE_MUTEX(uld_mutex); |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 457 | /* Adapter list to be accessed from atomic context */ |
| 458 | static LIST_HEAD(adap_rcu_list); |
| 459 | static DEFINE_SPINLOCK(adap_rcu_lock); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 460 | static struct cxgb4_uld_info ulds[CXGB4_ULD_MAX]; |
| 461 | static const char *uld_str[] = { "RDMA", "iSCSI" }; |
| 462 | |
| 463 | static void link_report(struct net_device *dev) |
| 464 | { |
| 465 | if (!netif_carrier_ok(dev)) |
| 466 | netdev_info(dev, "link down\n"); |
| 467 | else { |
| 468 | static const char *fc[] = { "no", "Rx", "Tx", "Tx/Rx" }; |
| 469 | |
| 470 | const char *s = "10Mbps"; |
| 471 | const struct port_info *p = netdev_priv(dev); |
| 472 | |
| 473 | switch (p->link_cfg.speed) { |
Ben Hutchings | e8b3901 | 2014-02-23 00:03:24 +0000 | [diff] [blame] | 474 | case 10000: |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 475 | s = "10Gbps"; |
| 476 | break; |
Ben Hutchings | e8b3901 | 2014-02-23 00:03:24 +0000 | [diff] [blame] | 477 | case 1000: |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 478 | s = "1000Mbps"; |
| 479 | break; |
Ben Hutchings | e8b3901 | 2014-02-23 00:03:24 +0000 | [diff] [blame] | 480 | case 100: |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 481 | s = "100Mbps"; |
| 482 | break; |
Ben Hutchings | e8b3901 | 2014-02-23 00:03:24 +0000 | [diff] [blame] | 483 | case 40000: |
Kumar Sanghvi | 72aca4b | 2014-02-18 17:56:08 +0530 | [diff] [blame] | 484 | s = "40Gbps"; |
| 485 | break; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 486 | } |
| 487 | |
| 488 | netdev_info(dev, "link up, %s, full-duplex, %s PAUSE\n", s, |
| 489 | fc[p->link_cfg.fc]); |
| 490 | } |
| 491 | } |
| 492 | |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 493 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 494 | /* Set up/tear down Data Center Bridging Priority mapping for a net device. */ |
| 495 | static void dcb_tx_queue_prio_enable(struct net_device *dev, int enable) |
| 496 | { |
| 497 | struct port_info *pi = netdev_priv(dev); |
| 498 | struct adapter *adap = pi->adapter; |
| 499 | struct sge_eth_txq *txq = &adap->sge.ethtxq[pi->first_qset]; |
| 500 | int i; |
| 501 | |
| 502 | /* We use a simple mapping of Port TX Queue Index to DCB |
| 503 | * Priority when we're enabling DCB. |
| 504 | */ |
| 505 | for (i = 0; i < pi->nqsets; i++, txq++) { |
| 506 | u32 name, value; |
| 507 | int err; |
| 508 | |
| 509 | name = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) | |
| 510 | FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_EQ_DCBPRIO_ETH) | |
| 511 | FW_PARAMS_PARAM_YZ(txq->q.cntxt_id)); |
| 512 | value = enable ? i : 0xffffffff; |
| 513 | |
| 514 | /* Since we can be called while atomic (from "interrupt |
| 515 | * level") we need to issue the Set Parameters Commannd |
| 516 | * without sleeping (timeout < 0). |
| 517 | */ |
| 518 | err = t4_set_params_nosleep(adap, adap->mbox, adap->fn, 0, 1, |
| 519 | &name, &value); |
| 520 | |
| 521 | if (err) |
| 522 | dev_err(adap->pdev_dev, |
| 523 | "Can't %s DCB Priority on port %d, TX Queue %d: err=%d\n", |
| 524 | enable ? "set" : "unset", pi->port_id, i, -err); |
| 525 | } |
| 526 | } |
| 527 | #endif /* CONFIG_CHELSIO_T4_DCB */ |
| 528 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 529 | void t4_os_link_changed(struct adapter *adapter, int port_id, int link_stat) |
| 530 | { |
| 531 | struct net_device *dev = adapter->port[port_id]; |
| 532 | |
| 533 | /* Skip changes from disabled ports. */ |
| 534 | if (netif_running(dev) && link_stat != netif_carrier_ok(dev)) { |
| 535 | if (link_stat) |
| 536 | netif_carrier_on(dev); |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 537 | else { |
| 538 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 539 | cxgb4_dcb_state_init(dev); |
| 540 | dcb_tx_queue_prio_enable(dev, false); |
| 541 | #endif /* CONFIG_CHELSIO_T4_DCB */ |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 542 | netif_carrier_off(dev); |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 543 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 544 | |
| 545 | link_report(dev); |
| 546 | } |
| 547 | } |
| 548 | |
| 549 | void t4_os_portmod_changed(const struct adapter *adap, int port_id) |
| 550 | { |
| 551 | static const char *mod_str[] = { |
Dimitris Michailidis | a0881ca | 2010-06-18 10:05:34 +0000 | [diff] [blame] | 552 | NULL, "LR", "SR", "ER", "passive DA", "active DA", "LRM" |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 553 | }; |
| 554 | |
| 555 | const struct net_device *dev = adap->port[port_id]; |
| 556 | const struct port_info *pi = netdev_priv(dev); |
| 557 | |
| 558 | if (pi->mod_type == FW_PORT_MOD_TYPE_NONE) |
| 559 | netdev_info(dev, "port module unplugged\n"); |
Dimitris Michailidis | a0881ca | 2010-06-18 10:05:34 +0000 | [diff] [blame] | 560 | else if (pi->mod_type < ARRAY_SIZE(mod_str)) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 561 | netdev_info(dev, "%s module inserted\n", mod_str[pi->mod_type]); |
| 562 | } |
| 563 | |
| 564 | /* |
| 565 | * Configure the exact and hash address filters to handle a port's multicast |
| 566 | * and secondary unicast MAC addresses. |
| 567 | */ |
| 568 | static int set_addr_filters(const struct net_device *dev, bool sleep) |
| 569 | { |
| 570 | u64 mhash = 0; |
| 571 | u64 uhash = 0; |
| 572 | bool free = true; |
| 573 | u16 filt_idx[7]; |
| 574 | const u8 *addr[7]; |
| 575 | int ret, naddr = 0; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 576 | const struct netdev_hw_addr *ha; |
| 577 | int uc_cnt = netdev_uc_count(dev); |
David S. Miller | 4a35ecf | 2010-04-06 23:53:30 -0700 | [diff] [blame] | 578 | int mc_cnt = netdev_mc_count(dev); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 579 | const struct port_info *pi = netdev_priv(dev); |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 580 | unsigned int mb = pi->adapter->fn; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 581 | |
| 582 | /* first do the secondary unicast addresses */ |
| 583 | netdev_for_each_uc_addr(ha, dev) { |
| 584 | addr[naddr++] = ha->addr; |
| 585 | if (--uc_cnt == 0 || naddr >= ARRAY_SIZE(addr)) { |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 586 | ret = t4_alloc_mac_filt(pi->adapter, mb, pi->viid, free, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 587 | naddr, addr, filt_idx, &uhash, sleep); |
| 588 | if (ret < 0) |
| 589 | return ret; |
| 590 | |
| 591 | free = false; |
| 592 | naddr = 0; |
| 593 | } |
| 594 | } |
| 595 | |
| 596 | /* next set up the multicast addresses */ |
David S. Miller | 4a35ecf | 2010-04-06 23:53:30 -0700 | [diff] [blame] | 597 | netdev_for_each_mc_addr(ha, dev) { |
| 598 | addr[naddr++] = ha->addr; |
| 599 | if (--mc_cnt == 0 || naddr >= ARRAY_SIZE(addr)) { |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 600 | ret = t4_alloc_mac_filt(pi->adapter, mb, pi->viid, free, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 601 | naddr, addr, filt_idx, &mhash, sleep); |
| 602 | if (ret < 0) |
| 603 | return ret; |
| 604 | |
| 605 | free = false; |
| 606 | naddr = 0; |
| 607 | } |
| 608 | } |
| 609 | |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 610 | return t4_set_addr_hash(pi->adapter, mb, pi->viid, uhash != 0, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 611 | uhash | mhash, sleep); |
| 612 | } |
| 613 | |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 614 | int dbfifo_int_thresh = 10; /* 10 == 640 entry threshold */ |
| 615 | module_param(dbfifo_int_thresh, int, 0644); |
| 616 | MODULE_PARM_DESC(dbfifo_int_thresh, "doorbell fifo interrupt threshold"); |
| 617 | |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 618 | /* |
| 619 | * usecs to sleep while draining the dbfifo |
| 620 | */ |
| 621 | static int dbfifo_drain_delay = 1000; |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 622 | module_param(dbfifo_drain_delay, int, 0644); |
| 623 | MODULE_PARM_DESC(dbfifo_drain_delay, |
| 624 | "usecs to sleep while draining the dbfifo"); |
| 625 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 626 | /* |
| 627 | * Set Rx properties of a port, such as promiscruity, address filters, and MTU. |
| 628 | * If @mtu is -1 it is left unchanged. |
| 629 | */ |
| 630 | static int set_rxmode(struct net_device *dev, int mtu, bool sleep_ok) |
| 631 | { |
| 632 | int ret; |
| 633 | struct port_info *pi = netdev_priv(dev); |
| 634 | |
| 635 | ret = set_addr_filters(dev, sleep_ok); |
| 636 | if (ret == 0) |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 637 | ret = t4_set_rxmode(pi->adapter, pi->adapter->fn, pi->viid, mtu, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 638 | (dev->flags & IFF_PROMISC) ? 1 : 0, |
Dimitris Michailidis | f8f5aaf | 2010-05-10 15:58:07 +0000 | [diff] [blame] | 639 | (dev->flags & IFF_ALLMULTI) ? 1 : 0, 1, -1, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 640 | sleep_ok); |
| 641 | return ret; |
| 642 | } |
| 643 | |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 644 | static struct workqueue_struct *workq; |
| 645 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 646 | /** |
| 647 | * link_start - enable a port |
| 648 | * @dev: the port to enable |
| 649 | * |
| 650 | * Performs the MAC and PHY actions needed to enable a port. |
| 651 | */ |
| 652 | static int link_start(struct net_device *dev) |
| 653 | { |
| 654 | int ret; |
| 655 | struct port_info *pi = netdev_priv(dev); |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 656 | unsigned int mb = pi->adapter->fn; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 657 | |
| 658 | /* |
| 659 | * We do not set address filters and promiscuity here, the stack does |
| 660 | * that step explicitly. |
| 661 | */ |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 662 | ret = t4_set_rxmode(pi->adapter, mb, pi->viid, dev->mtu, -1, -1, -1, |
Patrick McHardy | f646968 | 2013-04-19 02:04:27 +0000 | [diff] [blame] | 663 | !!(dev->features & NETIF_F_HW_VLAN_CTAG_RX), true); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 664 | if (ret == 0) { |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 665 | ret = t4_change_mac(pi->adapter, mb, pi->viid, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 666 | pi->xact_addr_filt, dev->dev_addr, true, |
Dimitris Michailidis | b6bd29e | 2010-05-18 10:07:11 +0000 | [diff] [blame] | 667 | true); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 668 | if (ret >= 0) { |
| 669 | pi->xact_addr_filt = ret; |
| 670 | ret = 0; |
| 671 | } |
| 672 | } |
| 673 | if (ret == 0) |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 674 | ret = t4_link_start(pi->adapter, mb, pi->tx_chan, |
| 675 | &pi->link_cfg); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 676 | if (ret == 0) |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 677 | ret = t4_enable_vi_params(pi->adapter, mb, pi->viid, true, |
| 678 | true, CXGB4_DCB_ENABLED); |
| 679 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 680 | return ret; |
| 681 | } |
| 682 | |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 683 | int cxgb4_dcb_enabled(const struct net_device *dev) |
| 684 | { |
| 685 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 686 | struct port_info *pi = netdev_priv(dev); |
| 687 | |
| 688 | return pi->dcb.state == CXGB4_DCB_STATE_FW_ALLSYNCED; |
| 689 | #else |
| 690 | return 0; |
| 691 | #endif |
| 692 | } |
| 693 | EXPORT_SYMBOL(cxgb4_dcb_enabled); |
| 694 | |
| 695 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 696 | /* Handle a Data Center Bridging update message from the firmware. */ |
| 697 | static void dcb_rpl(struct adapter *adap, const struct fw_port_cmd *pcmd) |
| 698 | { |
| 699 | int port = FW_PORT_CMD_PORTID_GET(ntohl(pcmd->op_to_portid)); |
| 700 | struct net_device *dev = adap->port[port]; |
| 701 | int old_dcb_enabled = cxgb4_dcb_enabled(dev); |
| 702 | int new_dcb_enabled; |
| 703 | |
| 704 | cxgb4_dcb_handle_fw_update(adap, pcmd); |
| 705 | new_dcb_enabled = cxgb4_dcb_enabled(dev); |
| 706 | |
| 707 | /* If the DCB has become enabled or disabled on the port then we're |
| 708 | * going to need to set up/tear down DCB Priority parameters for the |
| 709 | * TX Queues associated with the port. |
| 710 | */ |
| 711 | if (new_dcb_enabled != old_dcb_enabled) |
| 712 | dcb_tx_queue_prio_enable(dev, new_dcb_enabled); |
| 713 | } |
| 714 | #endif /* CONFIG_CHELSIO_T4_DCB */ |
| 715 | |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 716 | /* Clear a filter and release any of its resources that we own. This also |
| 717 | * clears the filter's "pending" status. |
| 718 | */ |
| 719 | static void clear_filter(struct adapter *adap, struct filter_entry *f) |
| 720 | { |
| 721 | /* If the new or old filter have loopback rewriteing rules then we'll |
| 722 | * need to free any existing Layer Two Table (L2T) entries of the old |
| 723 | * filter rule. The firmware will handle freeing up any Source MAC |
| 724 | * Table (SMT) entries used for rewriting Source MAC Addresses in |
| 725 | * loopback rules. |
| 726 | */ |
| 727 | if (f->l2t) |
| 728 | cxgb4_l2t_release(f->l2t); |
| 729 | |
| 730 | /* The zeroing of the filter rule below clears the filter valid, |
| 731 | * pending, locked flags, l2t pointer, etc. so it's all we need for |
| 732 | * this operation. |
| 733 | */ |
| 734 | memset(f, 0, sizeof(*f)); |
| 735 | } |
| 736 | |
| 737 | /* Handle a filter write/deletion reply. |
| 738 | */ |
| 739 | static void filter_rpl(struct adapter *adap, const struct cpl_set_tcb_rpl *rpl) |
| 740 | { |
| 741 | unsigned int idx = GET_TID(rpl); |
| 742 | unsigned int nidx = idx - adap->tids.ftid_base; |
| 743 | unsigned int ret; |
| 744 | struct filter_entry *f; |
| 745 | |
| 746 | if (idx >= adap->tids.ftid_base && nidx < |
| 747 | (adap->tids.nftids + adap->tids.nsftids)) { |
| 748 | idx = nidx; |
| 749 | ret = GET_TCB_COOKIE(rpl->cookie); |
| 750 | f = &adap->tids.ftid_tab[idx]; |
| 751 | |
| 752 | if (ret == FW_FILTER_WR_FLT_DELETED) { |
| 753 | /* Clear the filter when we get confirmation from the |
| 754 | * hardware that the filter has been deleted. |
| 755 | */ |
| 756 | clear_filter(adap, f); |
| 757 | } else if (ret == FW_FILTER_WR_SMT_TBL_FULL) { |
| 758 | dev_err(adap->pdev_dev, "filter %u setup failed due to full SMT\n", |
| 759 | idx); |
| 760 | clear_filter(adap, f); |
| 761 | } else if (ret == FW_FILTER_WR_FLT_ADDED) { |
| 762 | f->smtidx = (be64_to_cpu(rpl->oldval) >> 24) & 0xff; |
| 763 | f->pending = 0; /* asynchronous setup completed */ |
| 764 | f->valid = 1; |
| 765 | } else { |
| 766 | /* Something went wrong. Issue a warning about the |
| 767 | * problem and clear everything out. |
| 768 | */ |
| 769 | dev_err(adap->pdev_dev, "filter %u setup failed with error %u\n", |
| 770 | idx, ret); |
| 771 | clear_filter(adap, f); |
| 772 | } |
| 773 | } |
| 774 | } |
| 775 | |
| 776 | /* Response queue handler for the FW event queue. |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 777 | */ |
| 778 | static int fwevtq_handler(struct sge_rspq *q, const __be64 *rsp, |
| 779 | const struct pkt_gl *gl) |
| 780 | { |
| 781 | u8 opcode = ((const struct rss_header *)rsp)->opcode; |
| 782 | |
| 783 | rsp++; /* skip RSS header */ |
Vipul Pandya | b407a4a | 2013-04-29 04:04:40 +0000 | [diff] [blame] | 784 | |
| 785 | /* FW can send EGR_UPDATEs encapsulated in a CPL_FW4_MSG. |
| 786 | */ |
| 787 | if (unlikely(opcode == CPL_FW4_MSG && |
| 788 | ((const struct cpl_fw4_msg *)rsp)->type == FW_TYPE_RSSCPL)) { |
| 789 | rsp++; |
| 790 | opcode = ((const struct rss_header *)rsp)->opcode; |
| 791 | rsp++; |
| 792 | if (opcode != CPL_SGE_EGR_UPDATE) { |
| 793 | dev_err(q->adap->pdev_dev, "unexpected FW4/CPL %#x on FW event queue\n" |
| 794 | , opcode); |
| 795 | goto out; |
| 796 | } |
| 797 | } |
| 798 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 799 | if (likely(opcode == CPL_SGE_EGR_UPDATE)) { |
| 800 | const struct cpl_sge_egr_update *p = (void *)rsp; |
| 801 | unsigned int qid = EGR_QID(ntohl(p->opcode_qid)); |
Dimitris Michailidis | e46dab4 | 2010-08-23 17:20:58 +0000 | [diff] [blame] | 802 | struct sge_txq *txq; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 803 | |
Dimitris Michailidis | e46dab4 | 2010-08-23 17:20:58 +0000 | [diff] [blame] | 804 | txq = q->adap->sge.egr_map[qid - q->adap->sge.egr_start]; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 805 | txq->restarts++; |
Dimitris Michailidis | e46dab4 | 2010-08-23 17:20:58 +0000 | [diff] [blame] | 806 | if ((u8 *)txq < (u8 *)q->adap->sge.ofldtxq) { |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 807 | struct sge_eth_txq *eq; |
| 808 | |
| 809 | eq = container_of(txq, struct sge_eth_txq, q); |
| 810 | netif_tx_wake_queue(eq->txq); |
| 811 | } else { |
| 812 | struct sge_ofld_txq *oq; |
| 813 | |
| 814 | oq = container_of(txq, struct sge_ofld_txq, q); |
| 815 | tasklet_schedule(&oq->qresume_tsk); |
| 816 | } |
| 817 | } else if (opcode == CPL_FW6_MSG || opcode == CPL_FW4_MSG) { |
| 818 | const struct cpl_fw6_msg *p = (void *)rsp; |
| 819 | |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 820 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 821 | const struct fw_port_cmd *pcmd = (const void *)p->data; |
| 822 | unsigned int cmd = FW_CMD_OP_GET(ntohl(pcmd->op_to_portid)); |
| 823 | unsigned int action = |
| 824 | FW_PORT_CMD_ACTION_GET(ntohl(pcmd->action_to_len16)); |
| 825 | |
| 826 | if (cmd == FW_PORT_CMD && |
| 827 | action == FW_PORT_ACTION_GET_PORT_INFO) { |
| 828 | int port = FW_PORT_CMD_PORTID_GET( |
| 829 | be32_to_cpu(pcmd->op_to_portid)); |
| 830 | struct net_device *dev = q->adap->port[port]; |
| 831 | int state_input = ((pcmd->u.info.dcbxdis_pkd & |
| 832 | FW_PORT_CMD_DCBXDIS) |
| 833 | ? CXGB4_DCB_INPUT_FW_DISABLED |
| 834 | : CXGB4_DCB_INPUT_FW_ENABLED); |
| 835 | |
| 836 | cxgb4_dcb_state_fsm(dev, state_input); |
| 837 | } |
| 838 | |
| 839 | if (cmd == FW_PORT_CMD && |
| 840 | action == FW_PORT_ACTION_L2_DCB_CFG) |
| 841 | dcb_rpl(q->adap, pcmd); |
| 842 | else |
| 843 | #endif |
| 844 | if (p->type == 0) |
| 845 | t4_handle_fw_rpl(q->adap, p->data); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 846 | } else if (opcode == CPL_L2T_WRITE_RPL) { |
| 847 | const struct cpl_l2t_write_rpl *p = (void *)rsp; |
| 848 | |
| 849 | do_l2t_write_rpl(q->adap, p); |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 850 | } else if (opcode == CPL_SET_TCB_RPL) { |
| 851 | const struct cpl_set_tcb_rpl *p = (void *)rsp; |
| 852 | |
| 853 | filter_rpl(q->adap, p); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 854 | } else |
| 855 | dev_err(q->adap->pdev_dev, |
| 856 | "unexpected CPL %#x on FW event queue\n", opcode); |
Vipul Pandya | b407a4a | 2013-04-29 04:04:40 +0000 | [diff] [blame] | 857 | out: |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 858 | return 0; |
| 859 | } |
| 860 | |
| 861 | /** |
| 862 | * uldrx_handler - response queue handler for ULD queues |
| 863 | * @q: the response queue that received the packet |
| 864 | * @rsp: the response queue descriptor holding the offload message |
| 865 | * @gl: the gather list of packet fragments |
| 866 | * |
| 867 | * Deliver an ingress offload packet to a ULD. All processing is done by |
| 868 | * the ULD, we just maintain statistics. |
| 869 | */ |
| 870 | static int uldrx_handler(struct sge_rspq *q, const __be64 *rsp, |
| 871 | const struct pkt_gl *gl) |
| 872 | { |
| 873 | struct sge_ofld_rxq *rxq = container_of(q, struct sge_ofld_rxq, rspq); |
| 874 | |
Vipul Pandya | b407a4a | 2013-04-29 04:04:40 +0000 | [diff] [blame] | 875 | /* FW can send CPLs encapsulated in a CPL_FW4_MSG. |
| 876 | */ |
| 877 | if (((const struct rss_header *)rsp)->opcode == CPL_FW4_MSG && |
| 878 | ((const struct cpl_fw4_msg *)(rsp + 1))->type == FW_TYPE_RSSCPL) |
| 879 | rsp += 2; |
| 880 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 881 | if (ulds[q->uld].rx_handler(q->adap->uld_handle[q->uld], rsp, gl)) { |
| 882 | rxq->stats.nomem++; |
| 883 | return -1; |
| 884 | } |
| 885 | if (gl == NULL) |
| 886 | rxq->stats.imm++; |
| 887 | else if (gl == CXGB4_MSG_AN) |
| 888 | rxq->stats.an++; |
| 889 | else |
| 890 | rxq->stats.pkts++; |
| 891 | return 0; |
| 892 | } |
| 893 | |
| 894 | static void disable_msi(struct adapter *adapter) |
| 895 | { |
| 896 | if (adapter->flags & USING_MSIX) { |
| 897 | pci_disable_msix(adapter->pdev); |
| 898 | adapter->flags &= ~USING_MSIX; |
| 899 | } else if (adapter->flags & USING_MSI) { |
| 900 | pci_disable_msi(adapter->pdev); |
| 901 | adapter->flags &= ~USING_MSI; |
| 902 | } |
| 903 | } |
| 904 | |
| 905 | /* |
| 906 | * Interrupt handler for non-data events used with MSI-X. |
| 907 | */ |
| 908 | static irqreturn_t t4_nondata_intr(int irq, void *cookie) |
| 909 | { |
| 910 | struct adapter *adap = cookie; |
| 911 | |
| 912 | u32 v = t4_read_reg(adap, MYPF_REG(PL_PF_INT_CAUSE)); |
| 913 | if (v & PFSW) { |
| 914 | adap->swintr = 1; |
| 915 | t4_write_reg(adap, MYPF_REG(PL_PF_INT_CAUSE), v); |
| 916 | } |
| 917 | t4_slow_intr_handler(adap); |
| 918 | return IRQ_HANDLED; |
| 919 | } |
| 920 | |
| 921 | /* |
| 922 | * Name the MSI-X interrupts. |
| 923 | */ |
| 924 | static void name_msix_vecs(struct adapter *adap) |
| 925 | { |
Dimitris Michailidis | ba27816 | 2010-12-14 21:36:50 +0000 | [diff] [blame] | 926 | int i, j, msi_idx = 2, n = sizeof(adap->msix_info[0].desc); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 927 | |
| 928 | /* non-data interrupts */ |
Dimitris Michailidis | b1a3c2b | 2010-12-14 21:36:51 +0000 | [diff] [blame] | 929 | snprintf(adap->msix_info[0].desc, n, "%s", adap->port[0]->name); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 930 | |
| 931 | /* FW events */ |
Dimitris Michailidis | b1a3c2b | 2010-12-14 21:36:51 +0000 | [diff] [blame] | 932 | snprintf(adap->msix_info[1].desc, n, "%s-FWeventq", |
| 933 | adap->port[0]->name); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 934 | |
| 935 | /* Ethernet queues */ |
| 936 | for_each_port(adap, j) { |
| 937 | struct net_device *d = adap->port[j]; |
| 938 | const struct port_info *pi = netdev_priv(d); |
| 939 | |
Dimitris Michailidis | ba27816 | 2010-12-14 21:36:50 +0000 | [diff] [blame] | 940 | for (i = 0; i < pi->nqsets; i++, msi_idx++) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 941 | snprintf(adap->msix_info[msi_idx].desc, n, "%s-Rx%d", |
| 942 | d->name, i); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 943 | } |
| 944 | |
| 945 | /* offload queues */ |
Dimitris Michailidis | ba27816 | 2010-12-14 21:36:50 +0000 | [diff] [blame] | 946 | for_each_ofldrxq(&adap->sge, i) |
| 947 | snprintf(adap->msix_info[msi_idx++].desc, n, "%s-ofld%d", |
Dimitris Michailidis | b1a3c2b | 2010-12-14 21:36:51 +0000 | [diff] [blame] | 948 | adap->port[0]->name, i); |
Dimitris Michailidis | ba27816 | 2010-12-14 21:36:50 +0000 | [diff] [blame] | 949 | |
| 950 | for_each_rdmarxq(&adap->sge, i) |
| 951 | snprintf(adap->msix_info[msi_idx++].desc, n, "%s-rdma%d", |
Dimitris Michailidis | b1a3c2b | 2010-12-14 21:36:51 +0000 | [diff] [blame] | 952 | adap->port[0]->name, i); |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 953 | |
| 954 | for_each_rdmaciq(&adap->sge, i) |
| 955 | snprintf(adap->msix_info[msi_idx++].desc, n, "%s-rdma-ciq%d", |
| 956 | adap->port[0]->name, i); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 957 | } |
| 958 | |
| 959 | static int request_msix_queue_irqs(struct adapter *adap) |
| 960 | { |
| 961 | struct sge *s = &adap->sge; |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 962 | int err, ethqidx, ofldqidx = 0, rdmaqidx = 0, rdmaciqqidx = 0; |
| 963 | int msi_index = 2; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 964 | |
| 965 | err = request_irq(adap->msix_info[1].vec, t4_sge_intr_msix, 0, |
| 966 | adap->msix_info[1].desc, &s->fw_evtq); |
| 967 | if (err) |
| 968 | return err; |
| 969 | |
| 970 | for_each_ethrxq(s, ethqidx) { |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 971 | err = request_irq(adap->msix_info[msi_index].vec, |
| 972 | t4_sge_intr_msix, 0, |
| 973 | adap->msix_info[msi_index].desc, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 974 | &s->ethrxq[ethqidx].rspq); |
| 975 | if (err) |
| 976 | goto unwind; |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 977 | msi_index++; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 978 | } |
| 979 | for_each_ofldrxq(s, ofldqidx) { |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 980 | err = request_irq(adap->msix_info[msi_index].vec, |
| 981 | t4_sge_intr_msix, 0, |
| 982 | adap->msix_info[msi_index].desc, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 983 | &s->ofldrxq[ofldqidx].rspq); |
| 984 | if (err) |
| 985 | goto unwind; |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 986 | msi_index++; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 987 | } |
| 988 | for_each_rdmarxq(s, rdmaqidx) { |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 989 | err = request_irq(adap->msix_info[msi_index].vec, |
| 990 | t4_sge_intr_msix, 0, |
| 991 | adap->msix_info[msi_index].desc, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 992 | &s->rdmarxq[rdmaqidx].rspq); |
| 993 | if (err) |
| 994 | goto unwind; |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 995 | msi_index++; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 996 | } |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 997 | for_each_rdmaciq(s, rdmaciqqidx) { |
| 998 | err = request_irq(adap->msix_info[msi_index].vec, |
| 999 | t4_sge_intr_msix, 0, |
| 1000 | adap->msix_info[msi_index].desc, |
| 1001 | &s->rdmaciq[rdmaciqqidx].rspq); |
| 1002 | if (err) |
| 1003 | goto unwind; |
| 1004 | msi_index++; |
| 1005 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1006 | return 0; |
| 1007 | |
| 1008 | unwind: |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 1009 | while (--rdmaciqqidx >= 0) |
| 1010 | free_irq(adap->msix_info[--msi_index].vec, |
| 1011 | &s->rdmaciq[rdmaciqqidx].rspq); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1012 | while (--rdmaqidx >= 0) |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 1013 | free_irq(adap->msix_info[--msi_index].vec, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1014 | &s->rdmarxq[rdmaqidx].rspq); |
| 1015 | while (--ofldqidx >= 0) |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 1016 | free_irq(adap->msix_info[--msi_index].vec, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1017 | &s->ofldrxq[ofldqidx].rspq); |
| 1018 | while (--ethqidx >= 0) |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 1019 | free_irq(adap->msix_info[--msi_index].vec, |
| 1020 | &s->ethrxq[ethqidx].rspq); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1021 | free_irq(adap->msix_info[1].vec, &s->fw_evtq); |
| 1022 | return err; |
| 1023 | } |
| 1024 | |
| 1025 | static void free_msix_queue_irqs(struct adapter *adap) |
| 1026 | { |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 1027 | int i, msi_index = 2; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1028 | struct sge *s = &adap->sge; |
| 1029 | |
| 1030 | free_irq(adap->msix_info[1].vec, &s->fw_evtq); |
| 1031 | for_each_ethrxq(s, i) |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 1032 | free_irq(adap->msix_info[msi_index++].vec, &s->ethrxq[i].rspq); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1033 | for_each_ofldrxq(s, i) |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 1034 | free_irq(adap->msix_info[msi_index++].vec, &s->ofldrxq[i].rspq); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1035 | for_each_rdmarxq(s, i) |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 1036 | free_irq(adap->msix_info[msi_index++].vec, &s->rdmarxq[i].rspq); |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 1037 | for_each_rdmaciq(s, i) |
| 1038 | free_irq(adap->msix_info[msi_index++].vec, &s->rdmaciq[i].rspq); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1039 | } |
| 1040 | |
| 1041 | /** |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 1042 | * write_rss - write the RSS table for a given port |
| 1043 | * @pi: the port |
| 1044 | * @queues: array of queue indices for RSS |
| 1045 | * |
| 1046 | * Sets up the portion of the HW RSS table for the port's VI to distribute |
| 1047 | * packets to the Rx queues in @queues. |
| 1048 | */ |
| 1049 | static int write_rss(const struct port_info *pi, const u16 *queues) |
| 1050 | { |
| 1051 | u16 *rss; |
| 1052 | int i, err; |
| 1053 | const struct sge_eth_rxq *q = &pi->adapter->sge.ethrxq[pi->first_qset]; |
| 1054 | |
| 1055 | rss = kmalloc(pi->rss_size * sizeof(u16), GFP_KERNEL); |
| 1056 | if (!rss) |
| 1057 | return -ENOMEM; |
| 1058 | |
| 1059 | /* map the queue indices to queue ids */ |
| 1060 | for (i = 0; i < pi->rss_size; i++, queues++) |
| 1061 | rss[i] = q[*queues].rspq.abs_id; |
| 1062 | |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 1063 | err = t4_config_rss_range(pi->adapter, pi->adapter->fn, pi->viid, 0, |
| 1064 | pi->rss_size, rss, pi->rss_size); |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 1065 | kfree(rss); |
| 1066 | return err; |
| 1067 | } |
| 1068 | |
| 1069 | /** |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1070 | * setup_rss - configure RSS |
| 1071 | * @adap: the adapter |
| 1072 | * |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 1073 | * Sets up RSS for each port. |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1074 | */ |
| 1075 | static int setup_rss(struct adapter *adap) |
| 1076 | { |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 1077 | int i, err; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1078 | |
| 1079 | for_each_port(adap, i) { |
| 1080 | const struct port_info *pi = adap2pinfo(adap, i); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1081 | |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 1082 | err = write_rss(pi, pi->rss); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1083 | if (err) |
| 1084 | return err; |
| 1085 | } |
| 1086 | return 0; |
| 1087 | } |
| 1088 | |
| 1089 | /* |
Dimitris Michailidis | e46dab4 | 2010-08-23 17:20:58 +0000 | [diff] [blame] | 1090 | * Return the channel of the ingress queue with the given qid. |
| 1091 | */ |
| 1092 | static unsigned int rxq_to_chan(const struct sge *p, unsigned int qid) |
| 1093 | { |
| 1094 | qid -= p->ingr_start; |
| 1095 | return netdev2pinfo(p->ingr_map[qid]->netdev)->tx_chan; |
| 1096 | } |
| 1097 | |
| 1098 | /* |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1099 | * Wait until all NAPI handlers are descheduled. |
| 1100 | */ |
| 1101 | static void quiesce_rx(struct adapter *adap) |
| 1102 | { |
| 1103 | int i; |
| 1104 | |
| 1105 | for (i = 0; i < ARRAY_SIZE(adap->sge.ingr_map); i++) { |
| 1106 | struct sge_rspq *q = adap->sge.ingr_map[i]; |
| 1107 | |
| 1108 | if (q && q->handler) |
| 1109 | napi_disable(&q->napi); |
| 1110 | } |
| 1111 | } |
| 1112 | |
| 1113 | /* |
| 1114 | * Enable NAPI scheduling and interrupt generation for all Rx queues. |
| 1115 | */ |
| 1116 | static void enable_rx(struct adapter *adap) |
| 1117 | { |
| 1118 | int i; |
| 1119 | |
| 1120 | for (i = 0; i < ARRAY_SIZE(adap->sge.ingr_map); i++) { |
| 1121 | struct sge_rspq *q = adap->sge.ingr_map[i]; |
| 1122 | |
| 1123 | if (!q) |
| 1124 | continue; |
| 1125 | if (q->handler) |
| 1126 | napi_enable(&q->napi); |
| 1127 | /* 0-increment GTS to start the timer and enable interrupts */ |
| 1128 | t4_write_reg(adap, MYPF_REG(SGE_PF_GTS), |
| 1129 | SEINTARM(q->intr_params) | |
| 1130 | INGRESSQID(q->cntxt_id)); |
| 1131 | } |
| 1132 | } |
| 1133 | |
| 1134 | /** |
| 1135 | * setup_sge_queues - configure SGE Tx/Rx/response queues |
| 1136 | * @adap: the adapter |
| 1137 | * |
| 1138 | * Determines how many sets of SGE queues to use and initializes them. |
| 1139 | * We support multiple queue sets per port if we have MSI-X, otherwise |
| 1140 | * just one queue set per port. |
| 1141 | */ |
| 1142 | static int setup_sge_queues(struct adapter *adap) |
| 1143 | { |
| 1144 | int err, msi_idx, i, j; |
| 1145 | struct sge *s = &adap->sge; |
| 1146 | |
| 1147 | bitmap_zero(s->starving_fl, MAX_EGRQ); |
| 1148 | bitmap_zero(s->txq_maperr, MAX_EGRQ); |
| 1149 | |
| 1150 | if (adap->flags & USING_MSIX) |
| 1151 | msi_idx = 1; /* vector 0 is for non-queue interrupts */ |
| 1152 | else { |
| 1153 | err = t4_sge_alloc_rxq(adap, &s->intrq, false, adap->port[0], 0, |
| 1154 | NULL, NULL); |
| 1155 | if (err) |
| 1156 | return err; |
| 1157 | msi_idx = -((int)s->intrq.abs_id + 1); |
| 1158 | } |
| 1159 | |
| 1160 | err = t4_sge_alloc_rxq(adap, &s->fw_evtq, true, adap->port[0], |
| 1161 | msi_idx, NULL, fwevtq_handler); |
| 1162 | if (err) { |
| 1163 | freeout: t4_free_sge_resources(adap); |
| 1164 | return err; |
| 1165 | } |
| 1166 | |
| 1167 | for_each_port(adap, i) { |
| 1168 | struct net_device *dev = adap->port[i]; |
| 1169 | struct port_info *pi = netdev_priv(dev); |
| 1170 | struct sge_eth_rxq *q = &s->ethrxq[pi->first_qset]; |
| 1171 | struct sge_eth_txq *t = &s->ethtxq[pi->first_qset]; |
| 1172 | |
| 1173 | for (j = 0; j < pi->nqsets; j++, q++) { |
| 1174 | if (msi_idx > 0) |
| 1175 | msi_idx++; |
| 1176 | err = t4_sge_alloc_rxq(adap, &q->rspq, false, dev, |
| 1177 | msi_idx, &q->fl, |
| 1178 | t4_ethrx_handler); |
| 1179 | if (err) |
| 1180 | goto freeout; |
| 1181 | q->rspq.idx = j; |
| 1182 | memset(&q->stats, 0, sizeof(q->stats)); |
| 1183 | } |
| 1184 | for (j = 0; j < pi->nqsets; j++, t++) { |
| 1185 | err = t4_sge_alloc_eth_txq(adap, t, dev, |
| 1186 | netdev_get_tx_queue(dev, j), |
| 1187 | s->fw_evtq.cntxt_id); |
| 1188 | if (err) |
| 1189 | goto freeout; |
| 1190 | } |
| 1191 | } |
| 1192 | |
| 1193 | j = s->ofldqsets / adap->params.nports; /* ofld queues per channel */ |
| 1194 | for_each_ofldrxq(s, i) { |
| 1195 | struct sge_ofld_rxq *q = &s->ofldrxq[i]; |
| 1196 | struct net_device *dev = adap->port[i / j]; |
| 1197 | |
| 1198 | if (msi_idx > 0) |
| 1199 | msi_idx++; |
| 1200 | err = t4_sge_alloc_rxq(adap, &q->rspq, false, dev, msi_idx, |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 1201 | q->fl.size ? &q->fl : NULL, |
| 1202 | uldrx_handler); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1203 | if (err) |
| 1204 | goto freeout; |
| 1205 | memset(&q->stats, 0, sizeof(q->stats)); |
| 1206 | s->ofld_rxq[i] = q->rspq.abs_id; |
| 1207 | err = t4_sge_alloc_ofld_txq(adap, &s->ofldtxq[i], dev, |
| 1208 | s->fw_evtq.cntxt_id); |
| 1209 | if (err) |
| 1210 | goto freeout; |
| 1211 | } |
| 1212 | |
| 1213 | for_each_rdmarxq(s, i) { |
| 1214 | struct sge_ofld_rxq *q = &s->rdmarxq[i]; |
| 1215 | |
| 1216 | if (msi_idx > 0) |
| 1217 | msi_idx++; |
| 1218 | err = t4_sge_alloc_rxq(adap, &q->rspq, false, adap->port[i], |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 1219 | msi_idx, q->fl.size ? &q->fl : NULL, |
| 1220 | uldrx_handler); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1221 | if (err) |
| 1222 | goto freeout; |
| 1223 | memset(&q->stats, 0, sizeof(q->stats)); |
| 1224 | s->rdma_rxq[i] = q->rspq.abs_id; |
| 1225 | } |
| 1226 | |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 1227 | for_each_rdmaciq(s, i) { |
| 1228 | struct sge_ofld_rxq *q = &s->rdmaciq[i]; |
| 1229 | |
| 1230 | if (msi_idx > 0) |
| 1231 | msi_idx++; |
| 1232 | err = t4_sge_alloc_rxq(adap, &q->rspq, false, adap->port[i], |
| 1233 | msi_idx, q->fl.size ? &q->fl : NULL, |
| 1234 | uldrx_handler); |
| 1235 | if (err) |
| 1236 | goto freeout; |
| 1237 | memset(&q->stats, 0, sizeof(q->stats)); |
| 1238 | s->rdma_ciq[i] = q->rspq.abs_id; |
| 1239 | } |
| 1240 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1241 | for_each_port(adap, i) { |
| 1242 | /* |
| 1243 | * Note that ->rdmarxq[i].rspq.cntxt_id below is 0 if we don't |
| 1244 | * have RDMA queues, and that's the right value. |
| 1245 | */ |
| 1246 | err = t4_sge_alloc_ctrl_txq(adap, &s->ctrlq[i], adap->port[i], |
| 1247 | s->fw_evtq.cntxt_id, |
| 1248 | s->rdmarxq[i].rspq.cntxt_id); |
| 1249 | if (err) |
| 1250 | goto freeout; |
| 1251 | } |
| 1252 | |
| 1253 | t4_write_reg(adap, MPS_TRC_RSS_CONTROL, |
| 1254 | RSSCONTROL(netdev2pinfo(adap->port[0])->tx_chan) | |
| 1255 | QUEUENUMBER(s->ethrxq[0].rspq.abs_id)); |
| 1256 | return 0; |
| 1257 | } |
| 1258 | |
| 1259 | /* |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1260 | * Allocate a chunk of memory using kmalloc or, if that fails, vmalloc. |
| 1261 | * The allocated memory is cleared. |
| 1262 | */ |
| 1263 | void *t4_alloc_mem(size_t size) |
| 1264 | { |
Joe Perches | 8be04b9 | 2013-06-19 12:15:53 -0700 | [diff] [blame] | 1265 | void *p = kzalloc(size, GFP_KERNEL | __GFP_NOWARN); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1266 | |
| 1267 | if (!p) |
Eric Dumazet | 89bf67f | 2010-11-22 00:15:06 +0000 | [diff] [blame] | 1268 | p = vzalloc(size); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1269 | return p; |
| 1270 | } |
| 1271 | |
| 1272 | /* |
| 1273 | * Free memory allocated through alloc_mem(). |
| 1274 | */ |
stephen hemminger | 31b9c19 | 2010-10-18 05:39:18 +0000 | [diff] [blame] | 1275 | static void t4_free_mem(void *addr) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1276 | { |
| 1277 | if (is_vmalloc_addr(addr)) |
| 1278 | vfree(addr); |
| 1279 | else |
| 1280 | kfree(addr); |
| 1281 | } |
| 1282 | |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 1283 | /* Send a Work Request to write the filter at a specified index. We construct |
| 1284 | * a Firmware Filter Work Request to have the work done and put the indicated |
| 1285 | * filter into "pending" mode which will prevent any further actions against |
| 1286 | * it till we get a reply from the firmware on the completion status of the |
| 1287 | * request. |
| 1288 | */ |
| 1289 | static int set_filter_wr(struct adapter *adapter, int fidx) |
| 1290 | { |
| 1291 | struct filter_entry *f = &adapter->tids.ftid_tab[fidx]; |
| 1292 | struct sk_buff *skb; |
| 1293 | struct fw_filter_wr *fwr; |
| 1294 | unsigned int ftid; |
| 1295 | |
| 1296 | /* If the new filter requires loopback Destination MAC and/or VLAN |
| 1297 | * rewriting then we need to allocate a Layer 2 Table (L2T) entry for |
| 1298 | * the filter. |
| 1299 | */ |
| 1300 | if (f->fs.newdmac || f->fs.newvlan) { |
| 1301 | /* allocate L2T entry for new filter */ |
| 1302 | f->l2t = t4_l2t_alloc_switching(adapter->l2t); |
| 1303 | if (f->l2t == NULL) |
| 1304 | return -EAGAIN; |
| 1305 | if (t4_l2t_set_switching(adapter, f->l2t, f->fs.vlan, |
| 1306 | f->fs.eport, f->fs.dmac)) { |
| 1307 | cxgb4_l2t_release(f->l2t); |
| 1308 | f->l2t = NULL; |
| 1309 | return -ENOMEM; |
| 1310 | } |
| 1311 | } |
| 1312 | |
| 1313 | ftid = adapter->tids.ftid_base + fidx; |
| 1314 | |
| 1315 | skb = alloc_skb(sizeof(*fwr), GFP_KERNEL | __GFP_NOFAIL); |
| 1316 | fwr = (struct fw_filter_wr *)__skb_put(skb, sizeof(*fwr)); |
| 1317 | memset(fwr, 0, sizeof(*fwr)); |
| 1318 | |
| 1319 | /* It would be nice to put most of the following in t4_hw.c but most |
| 1320 | * of the work is translating the cxgbtool ch_filter_specification |
| 1321 | * into the Work Request and the definition of that structure is |
| 1322 | * currently in cxgbtool.h which isn't appropriate to pull into the |
| 1323 | * common code. We may eventually try to come up with a more neutral |
| 1324 | * filter specification structure but for now it's easiest to simply |
| 1325 | * put this fairly direct code in line ... |
| 1326 | */ |
| 1327 | fwr->op_pkd = htonl(FW_WR_OP(FW_FILTER_WR)); |
| 1328 | fwr->len16_pkd = htonl(FW_WR_LEN16(sizeof(*fwr)/16)); |
| 1329 | fwr->tid_to_iq = |
| 1330 | htonl(V_FW_FILTER_WR_TID(ftid) | |
| 1331 | V_FW_FILTER_WR_RQTYPE(f->fs.type) | |
| 1332 | V_FW_FILTER_WR_NOREPLY(0) | |
| 1333 | V_FW_FILTER_WR_IQ(f->fs.iq)); |
| 1334 | fwr->del_filter_to_l2tix = |
| 1335 | htonl(V_FW_FILTER_WR_RPTTID(f->fs.rpttid) | |
| 1336 | V_FW_FILTER_WR_DROP(f->fs.action == FILTER_DROP) | |
| 1337 | V_FW_FILTER_WR_DIRSTEER(f->fs.dirsteer) | |
| 1338 | V_FW_FILTER_WR_MASKHASH(f->fs.maskhash) | |
| 1339 | V_FW_FILTER_WR_DIRSTEERHASH(f->fs.dirsteerhash) | |
| 1340 | V_FW_FILTER_WR_LPBK(f->fs.action == FILTER_SWITCH) | |
| 1341 | V_FW_FILTER_WR_DMAC(f->fs.newdmac) | |
| 1342 | V_FW_FILTER_WR_SMAC(f->fs.newsmac) | |
| 1343 | V_FW_FILTER_WR_INSVLAN(f->fs.newvlan == VLAN_INSERT || |
| 1344 | f->fs.newvlan == VLAN_REWRITE) | |
| 1345 | V_FW_FILTER_WR_RMVLAN(f->fs.newvlan == VLAN_REMOVE || |
| 1346 | f->fs.newvlan == VLAN_REWRITE) | |
| 1347 | V_FW_FILTER_WR_HITCNTS(f->fs.hitcnts) | |
| 1348 | V_FW_FILTER_WR_TXCHAN(f->fs.eport) | |
| 1349 | V_FW_FILTER_WR_PRIO(f->fs.prio) | |
| 1350 | V_FW_FILTER_WR_L2TIX(f->l2t ? f->l2t->idx : 0)); |
| 1351 | fwr->ethtype = htons(f->fs.val.ethtype); |
| 1352 | fwr->ethtypem = htons(f->fs.mask.ethtype); |
| 1353 | fwr->frag_to_ovlan_vldm = |
| 1354 | (V_FW_FILTER_WR_FRAG(f->fs.val.frag) | |
| 1355 | V_FW_FILTER_WR_FRAGM(f->fs.mask.frag) | |
| 1356 | V_FW_FILTER_WR_IVLAN_VLD(f->fs.val.ivlan_vld) | |
| 1357 | V_FW_FILTER_WR_OVLAN_VLD(f->fs.val.ovlan_vld) | |
| 1358 | V_FW_FILTER_WR_IVLAN_VLDM(f->fs.mask.ivlan_vld) | |
| 1359 | V_FW_FILTER_WR_OVLAN_VLDM(f->fs.mask.ovlan_vld)); |
| 1360 | fwr->smac_sel = 0; |
| 1361 | fwr->rx_chan_rx_rpl_iq = |
| 1362 | htons(V_FW_FILTER_WR_RX_CHAN(0) | |
| 1363 | V_FW_FILTER_WR_RX_RPL_IQ(adapter->sge.fw_evtq.abs_id)); |
| 1364 | fwr->maci_to_matchtypem = |
| 1365 | htonl(V_FW_FILTER_WR_MACI(f->fs.val.macidx) | |
| 1366 | V_FW_FILTER_WR_MACIM(f->fs.mask.macidx) | |
| 1367 | V_FW_FILTER_WR_FCOE(f->fs.val.fcoe) | |
| 1368 | V_FW_FILTER_WR_FCOEM(f->fs.mask.fcoe) | |
| 1369 | V_FW_FILTER_WR_PORT(f->fs.val.iport) | |
| 1370 | V_FW_FILTER_WR_PORTM(f->fs.mask.iport) | |
| 1371 | V_FW_FILTER_WR_MATCHTYPE(f->fs.val.matchtype) | |
| 1372 | V_FW_FILTER_WR_MATCHTYPEM(f->fs.mask.matchtype)); |
| 1373 | fwr->ptcl = f->fs.val.proto; |
| 1374 | fwr->ptclm = f->fs.mask.proto; |
| 1375 | fwr->ttyp = f->fs.val.tos; |
| 1376 | fwr->ttypm = f->fs.mask.tos; |
| 1377 | fwr->ivlan = htons(f->fs.val.ivlan); |
| 1378 | fwr->ivlanm = htons(f->fs.mask.ivlan); |
| 1379 | fwr->ovlan = htons(f->fs.val.ovlan); |
| 1380 | fwr->ovlanm = htons(f->fs.mask.ovlan); |
| 1381 | memcpy(fwr->lip, f->fs.val.lip, sizeof(fwr->lip)); |
| 1382 | memcpy(fwr->lipm, f->fs.mask.lip, sizeof(fwr->lipm)); |
| 1383 | memcpy(fwr->fip, f->fs.val.fip, sizeof(fwr->fip)); |
| 1384 | memcpy(fwr->fipm, f->fs.mask.fip, sizeof(fwr->fipm)); |
| 1385 | fwr->lp = htons(f->fs.val.lport); |
| 1386 | fwr->lpm = htons(f->fs.mask.lport); |
| 1387 | fwr->fp = htons(f->fs.val.fport); |
| 1388 | fwr->fpm = htons(f->fs.mask.fport); |
| 1389 | if (f->fs.newsmac) |
| 1390 | memcpy(fwr->sma, f->fs.smac, sizeof(fwr->sma)); |
| 1391 | |
| 1392 | /* Mark the filter as "pending" and ship off the Filter Work Request. |
| 1393 | * When we get the Work Request Reply we'll clear the pending status. |
| 1394 | */ |
| 1395 | f->pending = 1; |
| 1396 | set_wr_txq(skb, CPL_PRIORITY_CONTROL, f->fs.val.iport & 0x3); |
| 1397 | t4_ofld_send(adapter, skb); |
| 1398 | return 0; |
| 1399 | } |
| 1400 | |
| 1401 | /* Delete the filter at a specified index. |
| 1402 | */ |
| 1403 | static int del_filter_wr(struct adapter *adapter, int fidx) |
| 1404 | { |
| 1405 | struct filter_entry *f = &adapter->tids.ftid_tab[fidx]; |
| 1406 | struct sk_buff *skb; |
| 1407 | struct fw_filter_wr *fwr; |
| 1408 | unsigned int len, ftid; |
| 1409 | |
| 1410 | len = sizeof(*fwr); |
| 1411 | ftid = adapter->tids.ftid_base + fidx; |
| 1412 | |
| 1413 | skb = alloc_skb(len, GFP_KERNEL | __GFP_NOFAIL); |
| 1414 | fwr = (struct fw_filter_wr *)__skb_put(skb, len); |
| 1415 | t4_mk_filtdelwr(ftid, fwr, adapter->sge.fw_evtq.abs_id); |
| 1416 | |
| 1417 | /* Mark the filter as "pending" and ship off the Filter Work Request. |
| 1418 | * When we get the Work Request Reply we'll clear the pending status. |
| 1419 | */ |
| 1420 | f->pending = 1; |
| 1421 | t4_mgmt_tx(adapter, skb); |
| 1422 | return 0; |
| 1423 | } |
| 1424 | |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 1425 | static u16 cxgb_select_queue(struct net_device *dev, struct sk_buff *skb, |
| 1426 | void *accel_priv, select_queue_fallback_t fallback) |
| 1427 | { |
| 1428 | int txq; |
| 1429 | |
| 1430 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 1431 | /* If a Data Center Bridging has been successfully negotiated on this |
| 1432 | * link then we'll use the skb's priority to map it to a TX Queue. |
| 1433 | * The skb's priority is determined via the VLAN Tag Priority Code |
| 1434 | * Point field. |
| 1435 | */ |
| 1436 | if (cxgb4_dcb_enabled(dev)) { |
| 1437 | u16 vlan_tci; |
| 1438 | int err; |
| 1439 | |
| 1440 | err = vlan_get_tag(skb, &vlan_tci); |
| 1441 | if (unlikely(err)) { |
| 1442 | if (net_ratelimit()) |
| 1443 | netdev_warn(dev, |
| 1444 | "TX Packet without VLAN Tag on DCB Link\n"); |
| 1445 | txq = 0; |
| 1446 | } else { |
| 1447 | txq = (vlan_tci & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT; |
| 1448 | } |
| 1449 | return txq; |
| 1450 | } |
| 1451 | #endif /* CONFIG_CHELSIO_T4_DCB */ |
| 1452 | |
| 1453 | if (select_queue) { |
| 1454 | txq = (skb_rx_queue_recorded(skb) |
| 1455 | ? skb_get_rx_queue(skb) |
| 1456 | : smp_processor_id()); |
| 1457 | |
| 1458 | while (unlikely(txq >= dev->real_num_tx_queues)) |
| 1459 | txq -= dev->real_num_tx_queues; |
| 1460 | |
| 1461 | return txq; |
| 1462 | } |
| 1463 | |
| 1464 | return fallback(dev, skb) % dev->real_num_tx_queues; |
| 1465 | } |
| 1466 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1467 | static inline int is_offload(const struct adapter *adap) |
| 1468 | { |
| 1469 | return adap->params.offload; |
| 1470 | } |
| 1471 | |
| 1472 | /* |
| 1473 | * Implementation of ethtool operations. |
| 1474 | */ |
| 1475 | |
| 1476 | static u32 get_msglevel(struct net_device *dev) |
| 1477 | { |
| 1478 | return netdev2adap(dev)->msg_enable; |
| 1479 | } |
| 1480 | |
| 1481 | static void set_msglevel(struct net_device *dev, u32 val) |
| 1482 | { |
| 1483 | netdev2adap(dev)->msg_enable = val; |
| 1484 | } |
| 1485 | |
| 1486 | static char stats_strings[][ETH_GSTRING_LEN] = { |
| 1487 | "TxOctetsOK ", |
| 1488 | "TxFramesOK ", |
| 1489 | "TxBroadcastFrames ", |
| 1490 | "TxMulticastFrames ", |
| 1491 | "TxUnicastFrames ", |
| 1492 | "TxErrorFrames ", |
| 1493 | |
| 1494 | "TxFrames64 ", |
| 1495 | "TxFrames65To127 ", |
| 1496 | "TxFrames128To255 ", |
| 1497 | "TxFrames256To511 ", |
| 1498 | "TxFrames512To1023 ", |
| 1499 | "TxFrames1024To1518 ", |
| 1500 | "TxFrames1519ToMax ", |
| 1501 | |
| 1502 | "TxFramesDropped ", |
| 1503 | "TxPauseFrames ", |
| 1504 | "TxPPP0Frames ", |
| 1505 | "TxPPP1Frames ", |
| 1506 | "TxPPP2Frames ", |
| 1507 | "TxPPP3Frames ", |
| 1508 | "TxPPP4Frames ", |
| 1509 | "TxPPP5Frames ", |
| 1510 | "TxPPP6Frames ", |
| 1511 | "TxPPP7Frames ", |
| 1512 | |
| 1513 | "RxOctetsOK ", |
| 1514 | "RxFramesOK ", |
| 1515 | "RxBroadcastFrames ", |
| 1516 | "RxMulticastFrames ", |
| 1517 | "RxUnicastFrames ", |
| 1518 | |
| 1519 | "RxFramesTooLong ", |
| 1520 | "RxJabberErrors ", |
| 1521 | "RxFCSErrors ", |
| 1522 | "RxLengthErrors ", |
| 1523 | "RxSymbolErrors ", |
| 1524 | "RxRuntFrames ", |
| 1525 | |
| 1526 | "RxFrames64 ", |
| 1527 | "RxFrames65To127 ", |
| 1528 | "RxFrames128To255 ", |
| 1529 | "RxFrames256To511 ", |
| 1530 | "RxFrames512To1023 ", |
| 1531 | "RxFrames1024To1518 ", |
| 1532 | "RxFrames1519ToMax ", |
| 1533 | |
| 1534 | "RxPauseFrames ", |
| 1535 | "RxPPP0Frames ", |
| 1536 | "RxPPP1Frames ", |
| 1537 | "RxPPP2Frames ", |
| 1538 | "RxPPP3Frames ", |
| 1539 | "RxPPP4Frames ", |
| 1540 | "RxPPP5Frames ", |
| 1541 | "RxPPP6Frames ", |
| 1542 | "RxPPP7Frames ", |
| 1543 | |
| 1544 | "RxBG0FramesDropped ", |
| 1545 | "RxBG1FramesDropped ", |
| 1546 | "RxBG2FramesDropped ", |
| 1547 | "RxBG3FramesDropped ", |
| 1548 | "RxBG0FramesTrunc ", |
| 1549 | "RxBG1FramesTrunc ", |
| 1550 | "RxBG2FramesTrunc ", |
| 1551 | "RxBG3FramesTrunc ", |
| 1552 | |
| 1553 | "TSO ", |
| 1554 | "TxCsumOffload ", |
| 1555 | "RxCsumGood ", |
| 1556 | "VLANextractions ", |
| 1557 | "VLANinsertions ", |
Dimitris Michailidis | 4a6346d | 2010-05-10 15:58:09 +0000 | [diff] [blame] | 1558 | "GROpackets ", |
| 1559 | "GROmerged ", |
Santosh Rastapur | 22adfe0 | 2013-03-14 05:08:51 +0000 | [diff] [blame] | 1560 | "WriteCoalSuccess ", |
| 1561 | "WriteCoalFail ", |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1562 | }; |
| 1563 | |
| 1564 | static int get_sset_count(struct net_device *dev, int sset) |
| 1565 | { |
| 1566 | switch (sset) { |
| 1567 | case ETH_SS_STATS: |
| 1568 | return ARRAY_SIZE(stats_strings); |
| 1569 | default: |
| 1570 | return -EOPNOTSUPP; |
| 1571 | } |
| 1572 | } |
| 1573 | |
| 1574 | #define T4_REGMAP_SIZE (160 * 1024) |
Santosh Rastapur | 251f9e8 | 2013-03-14 05:08:50 +0000 | [diff] [blame] | 1575 | #define T5_REGMAP_SIZE (332 * 1024) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1576 | |
| 1577 | static int get_regs_len(struct net_device *dev) |
| 1578 | { |
Santosh Rastapur | 251f9e8 | 2013-03-14 05:08:50 +0000 | [diff] [blame] | 1579 | struct adapter *adap = netdev2adap(dev); |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 1580 | if (is_t4(adap->params.chip)) |
Santosh Rastapur | 251f9e8 | 2013-03-14 05:08:50 +0000 | [diff] [blame] | 1581 | return T4_REGMAP_SIZE; |
| 1582 | else |
| 1583 | return T5_REGMAP_SIZE; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1584 | } |
| 1585 | |
| 1586 | static int get_eeprom_len(struct net_device *dev) |
| 1587 | { |
| 1588 | return EEPROMSIZE; |
| 1589 | } |
| 1590 | |
| 1591 | static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
| 1592 | { |
| 1593 | struct adapter *adapter = netdev2adap(dev); |
| 1594 | |
Rick Jones | 23020ab | 2011-11-09 09:58:07 +0000 | [diff] [blame] | 1595 | strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); |
| 1596 | strlcpy(info->version, DRV_VERSION, sizeof(info->version)); |
| 1597 | strlcpy(info->bus_info, pci_name(adapter->pdev), |
| 1598 | sizeof(info->bus_info)); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1599 | |
Rick Jones | 84b4050 | 2011-11-21 10:54:05 +0000 | [diff] [blame] | 1600 | if (adapter->params.fw_vers) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1601 | snprintf(info->fw_version, sizeof(info->fw_version), |
| 1602 | "%u.%u.%u.%u, TP %u.%u.%u.%u", |
| 1603 | FW_HDR_FW_VER_MAJOR_GET(adapter->params.fw_vers), |
| 1604 | FW_HDR_FW_VER_MINOR_GET(adapter->params.fw_vers), |
| 1605 | FW_HDR_FW_VER_MICRO_GET(adapter->params.fw_vers), |
| 1606 | FW_HDR_FW_VER_BUILD_GET(adapter->params.fw_vers), |
| 1607 | FW_HDR_FW_VER_MAJOR_GET(adapter->params.tp_vers), |
| 1608 | FW_HDR_FW_VER_MINOR_GET(adapter->params.tp_vers), |
| 1609 | FW_HDR_FW_VER_MICRO_GET(adapter->params.tp_vers), |
| 1610 | FW_HDR_FW_VER_BUILD_GET(adapter->params.tp_vers)); |
| 1611 | } |
| 1612 | |
| 1613 | static void get_strings(struct net_device *dev, u32 stringset, u8 *data) |
| 1614 | { |
| 1615 | if (stringset == ETH_SS_STATS) |
| 1616 | memcpy(data, stats_strings, sizeof(stats_strings)); |
| 1617 | } |
| 1618 | |
| 1619 | /* |
| 1620 | * port stats maintained per queue of the port. They should be in the same |
| 1621 | * order as in stats_strings above. |
| 1622 | */ |
| 1623 | struct queue_port_stats { |
| 1624 | u64 tso; |
| 1625 | u64 tx_csum; |
| 1626 | u64 rx_csum; |
| 1627 | u64 vlan_ex; |
| 1628 | u64 vlan_ins; |
Dimitris Michailidis | 4a6346d | 2010-05-10 15:58:09 +0000 | [diff] [blame] | 1629 | u64 gro_pkts; |
| 1630 | u64 gro_merged; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1631 | }; |
| 1632 | |
| 1633 | static void collect_sge_port_stats(const struct adapter *adap, |
| 1634 | const struct port_info *p, struct queue_port_stats *s) |
| 1635 | { |
| 1636 | int i; |
| 1637 | const struct sge_eth_txq *tx = &adap->sge.ethtxq[p->first_qset]; |
| 1638 | const struct sge_eth_rxq *rx = &adap->sge.ethrxq[p->first_qset]; |
| 1639 | |
| 1640 | memset(s, 0, sizeof(*s)); |
| 1641 | for (i = 0; i < p->nqsets; i++, rx++, tx++) { |
| 1642 | s->tso += tx->tso; |
| 1643 | s->tx_csum += tx->tx_cso; |
| 1644 | s->rx_csum += rx->stats.rx_cso; |
| 1645 | s->vlan_ex += rx->stats.vlan_ex; |
| 1646 | s->vlan_ins += tx->vlan_ins; |
Dimitris Michailidis | 4a6346d | 2010-05-10 15:58:09 +0000 | [diff] [blame] | 1647 | s->gro_pkts += rx->stats.lro_pkts; |
| 1648 | s->gro_merged += rx->stats.lro_merged; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1649 | } |
| 1650 | } |
| 1651 | |
| 1652 | static void get_stats(struct net_device *dev, struct ethtool_stats *stats, |
| 1653 | u64 *data) |
| 1654 | { |
| 1655 | struct port_info *pi = netdev_priv(dev); |
| 1656 | struct adapter *adapter = pi->adapter; |
Santosh Rastapur | 22adfe0 | 2013-03-14 05:08:51 +0000 | [diff] [blame] | 1657 | u32 val1, val2; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1658 | |
| 1659 | t4_get_port_stats(adapter, pi->tx_chan, (struct port_stats *)data); |
| 1660 | |
| 1661 | data += sizeof(struct port_stats) / sizeof(u64); |
| 1662 | collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data); |
Santosh Rastapur | 22adfe0 | 2013-03-14 05:08:51 +0000 | [diff] [blame] | 1663 | data += sizeof(struct queue_port_stats) / sizeof(u64); |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 1664 | if (!is_t4(adapter->params.chip)) { |
Santosh Rastapur | 22adfe0 | 2013-03-14 05:08:51 +0000 | [diff] [blame] | 1665 | t4_write_reg(adapter, SGE_STAT_CFG, STATSOURCE_T5(7)); |
| 1666 | val1 = t4_read_reg(adapter, SGE_STAT_TOTAL); |
| 1667 | val2 = t4_read_reg(adapter, SGE_STAT_MATCH); |
| 1668 | *data = val1 - val2; |
| 1669 | data++; |
| 1670 | *data = val2; |
| 1671 | data++; |
| 1672 | } else { |
| 1673 | memset(data, 0, 2 * sizeof(u64)); |
| 1674 | *data += 2; |
| 1675 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1676 | } |
| 1677 | |
| 1678 | /* |
| 1679 | * Return a version number to identify the type of adapter. The scheme is: |
| 1680 | * - bits 0..9: chip version |
| 1681 | * - bits 10..15: chip revision |
Dimitris Michailidis | 835bb60 | 2010-07-11 17:33:48 -0700 | [diff] [blame] | 1682 | * - bits 16..23: register dump version |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1683 | */ |
| 1684 | static inline unsigned int mk_adap_vers(const struct adapter *ap) |
| 1685 | { |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 1686 | return CHELSIO_CHIP_VERSION(ap->params.chip) | |
| 1687 | (CHELSIO_CHIP_RELEASE(ap->params.chip) << 10) | (1 << 16); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1688 | } |
| 1689 | |
| 1690 | static void reg_block_dump(struct adapter *ap, void *buf, unsigned int start, |
| 1691 | unsigned int end) |
| 1692 | { |
| 1693 | u32 *p = buf + start; |
| 1694 | |
| 1695 | for ( ; start <= end; start += sizeof(u32)) |
| 1696 | *p++ = t4_read_reg(ap, start); |
| 1697 | } |
| 1698 | |
| 1699 | static void get_regs(struct net_device *dev, struct ethtool_regs *regs, |
| 1700 | void *buf) |
| 1701 | { |
Santosh Rastapur | 251f9e8 | 2013-03-14 05:08:50 +0000 | [diff] [blame] | 1702 | static const unsigned int t4_reg_ranges[] = { |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1703 | 0x1008, 0x1108, |
| 1704 | 0x1180, 0x11b4, |
| 1705 | 0x11fc, 0x123c, |
| 1706 | 0x1300, 0x173c, |
| 1707 | 0x1800, 0x18fc, |
| 1708 | 0x3000, 0x30d8, |
| 1709 | 0x30e0, 0x5924, |
| 1710 | 0x5960, 0x59d4, |
| 1711 | 0x5a00, 0x5af8, |
| 1712 | 0x6000, 0x6098, |
| 1713 | 0x6100, 0x6150, |
| 1714 | 0x6200, 0x6208, |
| 1715 | 0x6240, 0x6248, |
| 1716 | 0x6280, 0x6338, |
| 1717 | 0x6370, 0x638c, |
| 1718 | 0x6400, 0x643c, |
| 1719 | 0x6500, 0x6524, |
| 1720 | 0x6a00, 0x6a38, |
| 1721 | 0x6a60, 0x6a78, |
| 1722 | 0x6b00, 0x6b84, |
| 1723 | 0x6bf0, 0x6c84, |
| 1724 | 0x6cf0, 0x6d84, |
| 1725 | 0x6df0, 0x6e84, |
| 1726 | 0x6ef0, 0x6f84, |
| 1727 | 0x6ff0, 0x7084, |
| 1728 | 0x70f0, 0x7184, |
| 1729 | 0x71f0, 0x7284, |
| 1730 | 0x72f0, 0x7384, |
| 1731 | 0x73f0, 0x7450, |
| 1732 | 0x7500, 0x7530, |
| 1733 | 0x7600, 0x761c, |
| 1734 | 0x7680, 0x76cc, |
| 1735 | 0x7700, 0x7798, |
| 1736 | 0x77c0, 0x77fc, |
| 1737 | 0x7900, 0x79fc, |
| 1738 | 0x7b00, 0x7c38, |
| 1739 | 0x7d00, 0x7efc, |
| 1740 | 0x8dc0, 0x8e1c, |
| 1741 | 0x8e30, 0x8e78, |
| 1742 | 0x8ea0, 0x8f6c, |
| 1743 | 0x8fc0, 0x9074, |
| 1744 | 0x90fc, 0x90fc, |
| 1745 | 0x9400, 0x9458, |
| 1746 | 0x9600, 0x96bc, |
| 1747 | 0x9800, 0x9808, |
| 1748 | 0x9820, 0x983c, |
| 1749 | 0x9850, 0x9864, |
| 1750 | 0x9c00, 0x9c6c, |
| 1751 | 0x9c80, 0x9cec, |
| 1752 | 0x9d00, 0x9d6c, |
| 1753 | 0x9d80, 0x9dec, |
| 1754 | 0x9e00, 0x9e6c, |
| 1755 | 0x9e80, 0x9eec, |
| 1756 | 0x9f00, 0x9f6c, |
| 1757 | 0x9f80, 0x9fec, |
| 1758 | 0xd004, 0xd03c, |
| 1759 | 0xdfc0, 0xdfe0, |
| 1760 | 0xe000, 0xea7c, |
| 1761 | 0xf000, 0x11190, |
Dimitris Michailidis | 835bb60 | 2010-07-11 17:33:48 -0700 | [diff] [blame] | 1762 | 0x19040, 0x1906c, |
| 1763 | 0x19078, 0x19080, |
| 1764 | 0x1908c, 0x19124, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1765 | 0x19150, 0x191b0, |
| 1766 | 0x191d0, 0x191e8, |
| 1767 | 0x19238, 0x1924c, |
| 1768 | 0x193f8, 0x19474, |
| 1769 | 0x19490, 0x194f8, |
| 1770 | 0x19800, 0x19f30, |
| 1771 | 0x1a000, 0x1a06c, |
| 1772 | 0x1a0b0, 0x1a120, |
| 1773 | 0x1a128, 0x1a138, |
| 1774 | 0x1a190, 0x1a1c4, |
| 1775 | 0x1a1fc, 0x1a1fc, |
| 1776 | 0x1e040, 0x1e04c, |
Dimitris Michailidis | 835bb60 | 2010-07-11 17:33:48 -0700 | [diff] [blame] | 1777 | 0x1e284, 0x1e28c, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1778 | 0x1e2c0, 0x1e2c0, |
| 1779 | 0x1e2e0, 0x1e2e0, |
| 1780 | 0x1e300, 0x1e384, |
| 1781 | 0x1e3c0, 0x1e3c8, |
| 1782 | 0x1e440, 0x1e44c, |
Dimitris Michailidis | 835bb60 | 2010-07-11 17:33:48 -0700 | [diff] [blame] | 1783 | 0x1e684, 0x1e68c, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1784 | 0x1e6c0, 0x1e6c0, |
| 1785 | 0x1e6e0, 0x1e6e0, |
| 1786 | 0x1e700, 0x1e784, |
| 1787 | 0x1e7c0, 0x1e7c8, |
| 1788 | 0x1e840, 0x1e84c, |
Dimitris Michailidis | 835bb60 | 2010-07-11 17:33:48 -0700 | [diff] [blame] | 1789 | 0x1ea84, 0x1ea8c, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1790 | 0x1eac0, 0x1eac0, |
| 1791 | 0x1eae0, 0x1eae0, |
| 1792 | 0x1eb00, 0x1eb84, |
| 1793 | 0x1ebc0, 0x1ebc8, |
| 1794 | 0x1ec40, 0x1ec4c, |
Dimitris Michailidis | 835bb60 | 2010-07-11 17:33:48 -0700 | [diff] [blame] | 1795 | 0x1ee84, 0x1ee8c, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1796 | 0x1eec0, 0x1eec0, |
| 1797 | 0x1eee0, 0x1eee0, |
| 1798 | 0x1ef00, 0x1ef84, |
| 1799 | 0x1efc0, 0x1efc8, |
| 1800 | 0x1f040, 0x1f04c, |
Dimitris Michailidis | 835bb60 | 2010-07-11 17:33:48 -0700 | [diff] [blame] | 1801 | 0x1f284, 0x1f28c, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1802 | 0x1f2c0, 0x1f2c0, |
| 1803 | 0x1f2e0, 0x1f2e0, |
| 1804 | 0x1f300, 0x1f384, |
| 1805 | 0x1f3c0, 0x1f3c8, |
| 1806 | 0x1f440, 0x1f44c, |
Dimitris Michailidis | 835bb60 | 2010-07-11 17:33:48 -0700 | [diff] [blame] | 1807 | 0x1f684, 0x1f68c, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1808 | 0x1f6c0, 0x1f6c0, |
| 1809 | 0x1f6e0, 0x1f6e0, |
| 1810 | 0x1f700, 0x1f784, |
| 1811 | 0x1f7c0, 0x1f7c8, |
| 1812 | 0x1f840, 0x1f84c, |
Dimitris Michailidis | 835bb60 | 2010-07-11 17:33:48 -0700 | [diff] [blame] | 1813 | 0x1fa84, 0x1fa8c, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1814 | 0x1fac0, 0x1fac0, |
| 1815 | 0x1fae0, 0x1fae0, |
| 1816 | 0x1fb00, 0x1fb84, |
| 1817 | 0x1fbc0, 0x1fbc8, |
| 1818 | 0x1fc40, 0x1fc4c, |
Dimitris Michailidis | 835bb60 | 2010-07-11 17:33:48 -0700 | [diff] [blame] | 1819 | 0x1fe84, 0x1fe8c, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 1820 | 0x1fec0, 0x1fec0, |
| 1821 | 0x1fee0, 0x1fee0, |
| 1822 | 0x1ff00, 0x1ff84, |
| 1823 | 0x1ffc0, 0x1ffc8, |
| 1824 | 0x20000, 0x2002c, |
| 1825 | 0x20100, 0x2013c, |
| 1826 | 0x20190, 0x201c8, |
| 1827 | 0x20200, 0x20318, |
| 1828 | 0x20400, 0x20528, |
| 1829 | 0x20540, 0x20614, |
| 1830 | 0x21000, 0x21040, |
| 1831 | 0x2104c, 0x21060, |
| 1832 | 0x210c0, 0x210ec, |
| 1833 | 0x21200, 0x21268, |
| 1834 | 0x21270, 0x21284, |
| 1835 | 0x212fc, 0x21388, |
| 1836 | 0x21400, 0x21404, |
| 1837 | 0x21500, 0x21518, |
| 1838 | 0x2152c, 0x2153c, |
| 1839 | 0x21550, 0x21554, |
| 1840 | 0x21600, 0x21600, |
| 1841 | 0x21608, 0x21628, |
| 1842 | 0x21630, 0x2163c, |
| 1843 | 0x21700, 0x2171c, |
| 1844 | 0x21780, 0x2178c, |
| 1845 | 0x21800, 0x21c38, |
| 1846 | 0x21c80, 0x21d7c, |
| 1847 | 0x21e00, 0x21e04, |
| 1848 | 0x22000, 0x2202c, |
| 1849 | 0x22100, 0x2213c, |
| 1850 | 0x22190, 0x221c8, |
| 1851 | 0x22200, 0x22318, |
| 1852 | 0x22400, 0x22528, |
| 1853 | 0x22540, 0x22614, |
| 1854 | 0x23000, 0x23040, |
| 1855 | 0x2304c, 0x23060, |
| 1856 | 0x230c0, 0x230ec, |
| 1857 | 0x23200, 0x23268, |
| 1858 | 0x23270, 0x23284, |
| 1859 | 0x232fc, 0x23388, |
| 1860 | 0x23400, 0x23404, |
| 1861 | 0x23500, 0x23518, |
| 1862 | 0x2352c, 0x2353c, |
| 1863 | 0x23550, 0x23554, |
| 1864 | 0x23600, 0x23600, |
| 1865 | 0x23608, 0x23628, |
| 1866 | 0x23630, 0x2363c, |
| 1867 | 0x23700, 0x2371c, |
| 1868 | 0x23780, 0x2378c, |
| 1869 | 0x23800, 0x23c38, |
| 1870 | 0x23c80, 0x23d7c, |
| 1871 | 0x23e00, 0x23e04, |
| 1872 | 0x24000, 0x2402c, |
| 1873 | 0x24100, 0x2413c, |
| 1874 | 0x24190, 0x241c8, |
| 1875 | 0x24200, 0x24318, |
| 1876 | 0x24400, 0x24528, |
| 1877 | 0x24540, 0x24614, |
| 1878 | 0x25000, 0x25040, |
| 1879 | 0x2504c, 0x25060, |
| 1880 | 0x250c0, 0x250ec, |
| 1881 | 0x25200, 0x25268, |
| 1882 | 0x25270, 0x25284, |
| 1883 | 0x252fc, 0x25388, |
| 1884 | 0x25400, 0x25404, |
| 1885 | 0x25500, 0x25518, |
| 1886 | 0x2552c, 0x2553c, |
| 1887 | 0x25550, 0x25554, |
| 1888 | 0x25600, 0x25600, |
| 1889 | 0x25608, 0x25628, |
| 1890 | 0x25630, 0x2563c, |
| 1891 | 0x25700, 0x2571c, |
| 1892 | 0x25780, 0x2578c, |
| 1893 | 0x25800, 0x25c38, |
| 1894 | 0x25c80, 0x25d7c, |
| 1895 | 0x25e00, 0x25e04, |
| 1896 | 0x26000, 0x2602c, |
| 1897 | 0x26100, 0x2613c, |
| 1898 | 0x26190, 0x261c8, |
| 1899 | 0x26200, 0x26318, |
| 1900 | 0x26400, 0x26528, |
| 1901 | 0x26540, 0x26614, |
| 1902 | 0x27000, 0x27040, |
| 1903 | 0x2704c, 0x27060, |
| 1904 | 0x270c0, 0x270ec, |
| 1905 | 0x27200, 0x27268, |
| 1906 | 0x27270, 0x27284, |
| 1907 | 0x272fc, 0x27388, |
| 1908 | 0x27400, 0x27404, |
| 1909 | 0x27500, 0x27518, |
| 1910 | 0x2752c, 0x2753c, |
| 1911 | 0x27550, 0x27554, |
| 1912 | 0x27600, 0x27600, |
| 1913 | 0x27608, 0x27628, |
| 1914 | 0x27630, 0x2763c, |
| 1915 | 0x27700, 0x2771c, |
| 1916 | 0x27780, 0x2778c, |
| 1917 | 0x27800, 0x27c38, |
| 1918 | 0x27c80, 0x27d7c, |
| 1919 | 0x27e00, 0x27e04 |
| 1920 | }; |
| 1921 | |
Santosh Rastapur | 251f9e8 | 2013-03-14 05:08:50 +0000 | [diff] [blame] | 1922 | static const unsigned int t5_reg_ranges[] = { |
| 1923 | 0x1008, 0x1148, |
| 1924 | 0x1180, 0x11b4, |
| 1925 | 0x11fc, 0x123c, |
| 1926 | 0x1280, 0x173c, |
| 1927 | 0x1800, 0x18fc, |
| 1928 | 0x3000, 0x3028, |
| 1929 | 0x3060, 0x30d8, |
| 1930 | 0x30e0, 0x30fc, |
| 1931 | 0x3140, 0x357c, |
| 1932 | 0x35a8, 0x35cc, |
| 1933 | 0x35ec, 0x35ec, |
| 1934 | 0x3600, 0x5624, |
| 1935 | 0x56cc, 0x575c, |
| 1936 | 0x580c, 0x5814, |
| 1937 | 0x5890, 0x58bc, |
| 1938 | 0x5940, 0x59dc, |
| 1939 | 0x59fc, 0x5a18, |
| 1940 | 0x5a60, 0x5a9c, |
| 1941 | 0x5b9c, 0x5bfc, |
| 1942 | 0x6000, 0x6040, |
| 1943 | 0x6058, 0x614c, |
| 1944 | 0x7700, 0x7798, |
| 1945 | 0x77c0, 0x78fc, |
| 1946 | 0x7b00, 0x7c54, |
| 1947 | 0x7d00, 0x7efc, |
| 1948 | 0x8dc0, 0x8de0, |
| 1949 | 0x8df8, 0x8e84, |
| 1950 | 0x8ea0, 0x8f84, |
| 1951 | 0x8fc0, 0x90f8, |
| 1952 | 0x9400, 0x9470, |
| 1953 | 0x9600, 0x96f4, |
| 1954 | 0x9800, 0x9808, |
| 1955 | 0x9820, 0x983c, |
| 1956 | 0x9850, 0x9864, |
| 1957 | 0x9c00, 0x9c6c, |
| 1958 | 0x9c80, 0x9cec, |
| 1959 | 0x9d00, 0x9d6c, |
| 1960 | 0x9d80, 0x9dec, |
| 1961 | 0x9e00, 0x9e6c, |
| 1962 | 0x9e80, 0x9eec, |
| 1963 | 0x9f00, 0x9f6c, |
| 1964 | 0x9f80, 0xa020, |
| 1965 | 0xd004, 0xd03c, |
| 1966 | 0xdfc0, 0xdfe0, |
| 1967 | 0xe000, 0x11088, |
| 1968 | 0x1109c, 0x1117c, |
| 1969 | 0x11190, 0x11204, |
| 1970 | 0x19040, 0x1906c, |
| 1971 | 0x19078, 0x19080, |
| 1972 | 0x1908c, 0x19124, |
| 1973 | 0x19150, 0x191b0, |
| 1974 | 0x191d0, 0x191e8, |
| 1975 | 0x19238, 0x19290, |
| 1976 | 0x193f8, 0x19474, |
| 1977 | 0x19490, 0x194cc, |
| 1978 | 0x194f0, 0x194f8, |
| 1979 | 0x19c00, 0x19c60, |
| 1980 | 0x19c94, 0x19e10, |
| 1981 | 0x19e50, 0x19f34, |
| 1982 | 0x19f40, 0x19f50, |
| 1983 | 0x19f90, 0x19fe4, |
| 1984 | 0x1a000, 0x1a06c, |
| 1985 | 0x1a0b0, 0x1a120, |
| 1986 | 0x1a128, 0x1a138, |
| 1987 | 0x1a190, 0x1a1c4, |
| 1988 | 0x1a1fc, 0x1a1fc, |
| 1989 | 0x1e008, 0x1e00c, |
| 1990 | 0x1e040, 0x1e04c, |
| 1991 | 0x1e284, 0x1e290, |
| 1992 | 0x1e2c0, 0x1e2c0, |
| 1993 | 0x1e2e0, 0x1e2e0, |
| 1994 | 0x1e300, 0x1e384, |
| 1995 | 0x1e3c0, 0x1e3c8, |
| 1996 | 0x1e408, 0x1e40c, |
| 1997 | 0x1e440, 0x1e44c, |
| 1998 | 0x1e684, 0x1e690, |
| 1999 | 0x1e6c0, 0x1e6c0, |
| 2000 | 0x1e6e0, 0x1e6e0, |
| 2001 | 0x1e700, 0x1e784, |
| 2002 | 0x1e7c0, 0x1e7c8, |
| 2003 | 0x1e808, 0x1e80c, |
| 2004 | 0x1e840, 0x1e84c, |
| 2005 | 0x1ea84, 0x1ea90, |
| 2006 | 0x1eac0, 0x1eac0, |
| 2007 | 0x1eae0, 0x1eae0, |
| 2008 | 0x1eb00, 0x1eb84, |
| 2009 | 0x1ebc0, 0x1ebc8, |
| 2010 | 0x1ec08, 0x1ec0c, |
| 2011 | 0x1ec40, 0x1ec4c, |
| 2012 | 0x1ee84, 0x1ee90, |
| 2013 | 0x1eec0, 0x1eec0, |
| 2014 | 0x1eee0, 0x1eee0, |
| 2015 | 0x1ef00, 0x1ef84, |
| 2016 | 0x1efc0, 0x1efc8, |
| 2017 | 0x1f008, 0x1f00c, |
| 2018 | 0x1f040, 0x1f04c, |
| 2019 | 0x1f284, 0x1f290, |
| 2020 | 0x1f2c0, 0x1f2c0, |
| 2021 | 0x1f2e0, 0x1f2e0, |
| 2022 | 0x1f300, 0x1f384, |
| 2023 | 0x1f3c0, 0x1f3c8, |
| 2024 | 0x1f408, 0x1f40c, |
| 2025 | 0x1f440, 0x1f44c, |
| 2026 | 0x1f684, 0x1f690, |
| 2027 | 0x1f6c0, 0x1f6c0, |
| 2028 | 0x1f6e0, 0x1f6e0, |
| 2029 | 0x1f700, 0x1f784, |
| 2030 | 0x1f7c0, 0x1f7c8, |
| 2031 | 0x1f808, 0x1f80c, |
| 2032 | 0x1f840, 0x1f84c, |
| 2033 | 0x1fa84, 0x1fa90, |
| 2034 | 0x1fac0, 0x1fac0, |
| 2035 | 0x1fae0, 0x1fae0, |
| 2036 | 0x1fb00, 0x1fb84, |
| 2037 | 0x1fbc0, 0x1fbc8, |
| 2038 | 0x1fc08, 0x1fc0c, |
| 2039 | 0x1fc40, 0x1fc4c, |
| 2040 | 0x1fe84, 0x1fe90, |
| 2041 | 0x1fec0, 0x1fec0, |
| 2042 | 0x1fee0, 0x1fee0, |
| 2043 | 0x1ff00, 0x1ff84, |
| 2044 | 0x1ffc0, 0x1ffc8, |
| 2045 | 0x30000, 0x30030, |
| 2046 | 0x30100, 0x30144, |
| 2047 | 0x30190, 0x301d0, |
| 2048 | 0x30200, 0x30318, |
| 2049 | 0x30400, 0x3052c, |
| 2050 | 0x30540, 0x3061c, |
| 2051 | 0x30800, 0x30834, |
| 2052 | 0x308c0, 0x30908, |
| 2053 | 0x30910, 0x309ac, |
| 2054 | 0x30a00, 0x30a04, |
| 2055 | 0x30a0c, 0x30a2c, |
| 2056 | 0x30a44, 0x30a50, |
| 2057 | 0x30a74, 0x30c24, |
| 2058 | 0x30d08, 0x30d14, |
| 2059 | 0x30d1c, 0x30d20, |
| 2060 | 0x30d3c, 0x30d50, |
| 2061 | 0x31200, 0x3120c, |
| 2062 | 0x31220, 0x31220, |
| 2063 | 0x31240, 0x31240, |
| 2064 | 0x31600, 0x31600, |
| 2065 | 0x31608, 0x3160c, |
| 2066 | 0x31a00, 0x31a1c, |
| 2067 | 0x31e04, 0x31e20, |
| 2068 | 0x31e38, 0x31e3c, |
| 2069 | 0x31e80, 0x31e80, |
| 2070 | 0x31e88, 0x31ea8, |
| 2071 | 0x31eb0, 0x31eb4, |
| 2072 | 0x31ec8, 0x31ed4, |
| 2073 | 0x31fb8, 0x32004, |
| 2074 | 0x32208, 0x3223c, |
| 2075 | 0x32600, 0x32630, |
| 2076 | 0x32a00, 0x32abc, |
| 2077 | 0x32b00, 0x32b70, |
| 2078 | 0x33000, 0x33048, |
| 2079 | 0x33060, 0x3309c, |
| 2080 | 0x330f0, 0x33148, |
| 2081 | 0x33160, 0x3319c, |
| 2082 | 0x331f0, 0x332e4, |
| 2083 | 0x332f8, 0x333e4, |
| 2084 | 0x333f8, 0x33448, |
| 2085 | 0x33460, 0x3349c, |
| 2086 | 0x334f0, 0x33548, |
| 2087 | 0x33560, 0x3359c, |
| 2088 | 0x335f0, 0x336e4, |
| 2089 | 0x336f8, 0x337e4, |
| 2090 | 0x337f8, 0x337fc, |
| 2091 | 0x33814, 0x33814, |
| 2092 | 0x3382c, 0x3382c, |
| 2093 | 0x33880, 0x3388c, |
| 2094 | 0x338e8, 0x338ec, |
| 2095 | 0x33900, 0x33948, |
| 2096 | 0x33960, 0x3399c, |
| 2097 | 0x339f0, 0x33ae4, |
| 2098 | 0x33af8, 0x33b10, |
| 2099 | 0x33b28, 0x33b28, |
| 2100 | 0x33b3c, 0x33b50, |
| 2101 | 0x33bf0, 0x33c10, |
| 2102 | 0x33c28, 0x33c28, |
| 2103 | 0x33c3c, 0x33c50, |
| 2104 | 0x33cf0, 0x33cfc, |
| 2105 | 0x34000, 0x34030, |
| 2106 | 0x34100, 0x34144, |
| 2107 | 0x34190, 0x341d0, |
| 2108 | 0x34200, 0x34318, |
| 2109 | 0x34400, 0x3452c, |
| 2110 | 0x34540, 0x3461c, |
| 2111 | 0x34800, 0x34834, |
| 2112 | 0x348c0, 0x34908, |
| 2113 | 0x34910, 0x349ac, |
| 2114 | 0x34a00, 0x34a04, |
| 2115 | 0x34a0c, 0x34a2c, |
| 2116 | 0x34a44, 0x34a50, |
| 2117 | 0x34a74, 0x34c24, |
| 2118 | 0x34d08, 0x34d14, |
| 2119 | 0x34d1c, 0x34d20, |
| 2120 | 0x34d3c, 0x34d50, |
| 2121 | 0x35200, 0x3520c, |
| 2122 | 0x35220, 0x35220, |
| 2123 | 0x35240, 0x35240, |
| 2124 | 0x35600, 0x35600, |
| 2125 | 0x35608, 0x3560c, |
| 2126 | 0x35a00, 0x35a1c, |
| 2127 | 0x35e04, 0x35e20, |
| 2128 | 0x35e38, 0x35e3c, |
| 2129 | 0x35e80, 0x35e80, |
| 2130 | 0x35e88, 0x35ea8, |
| 2131 | 0x35eb0, 0x35eb4, |
| 2132 | 0x35ec8, 0x35ed4, |
| 2133 | 0x35fb8, 0x36004, |
| 2134 | 0x36208, 0x3623c, |
| 2135 | 0x36600, 0x36630, |
| 2136 | 0x36a00, 0x36abc, |
| 2137 | 0x36b00, 0x36b70, |
| 2138 | 0x37000, 0x37048, |
| 2139 | 0x37060, 0x3709c, |
| 2140 | 0x370f0, 0x37148, |
| 2141 | 0x37160, 0x3719c, |
| 2142 | 0x371f0, 0x372e4, |
| 2143 | 0x372f8, 0x373e4, |
| 2144 | 0x373f8, 0x37448, |
| 2145 | 0x37460, 0x3749c, |
| 2146 | 0x374f0, 0x37548, |
| 2147 | 0x37560, 0x3759c, |
| 2148 | 0x375f0, 0x376e4, |
| 2149 | 0x376f8, 0x377e4, |
| 2150 | 0x377f8, 0x377fc, |
| 2151 | 0x37814, 0x37814, |
| 2152 | 0x3782c, 0x3782c, |
| 2153 | 0x37880, 0x3788c, |
| 2154 | 0x378e8, 0x378ec, |
| 2155 | 0x37900, 0x37948, |
| 2156 | 0x37960, 0x3799c, |
| 2157 | 0x379f0, 0x37ae4, |
| 2158 | 0x37af8, 0x37b10, |
| 2159 | 0x37b28, 0x37b28, |
| 2160 | 0x37b3c, 0x37b50, |
| 2161 | 0x37bf0, 0x37c10, |
| 2162 | 0x37c28, 0x37c28, |
| 2163 | 0x37c3c, 0x37c50, |
| 2164 | 0x37cf0, 0x37cfc, |
| 2165 | 0x38000, 0x38030, |
| 2166 | 0x38100, 0x38144, |
| 2167 | 0x38190, 0x381d0, |
| 2168 | 0x38200, 0x38318, |
| 2169 | 0x38400, 0x3852c, |
| 2170 | 0x38540, 0x3861c, |
| 2171 | 0x38800, 0x38834, |
| 2172 | 0x388c0, 0x38908, |
| 2173 | 0x38910, 0x389ac, |
| 2174 | 0x38a00, 0x38a04, |
| 2175 | 0x38a0c, 0x38a2c, |
| 2176 | 0x38a44, 0x38a50, |
| 2177 | 0x38a74, 0x38c24, |
| 2178 | 0x38d08, 0x38d14, |
| 2179 | 0x38d1c, 0x38d20, |
| 2180 | 0x38d3c, 0x38d50, |
| 2181 | 0x39200, 0x3920c, |
| 2182 | 0x39220, 0x39220, |
| 2183 | 0x39240, 0x39240, |
| 2184 | 0x39600, 0x39600, |
| 2185 | 0x39608, 0x3960c, |
| 2186 | 0x39a00, 0x39a1c, |
| 2187 | 0x39e04, 0x39e20, |
| 2188 | 0x39e38, 0x39e3c, |
| 2189 | 0x39e80, 0x39e80, |
| 2190 | 0x39e88, 0x39ea8, |
| 2191 | 0x39eb0, 0x39eb4, |
| 2192 | 0x39ec8, 0x39ed4, |
| 2193 | 0x39fb8, 0x3a004, |
| 2194 | 0x3a208, 0x3a23c, |
| 2195 | 0x3a600, 0x3a630, |
| 2196 | 0x3aa00, 0x3aabc, |
| 2197 | 0x3ab00, 0x3ab70, |
| 2198 | 0x3b000, 0x3b048, |
| 2199 | 0x3b060, 0x3b09c, |
| 2200 | 0x3b0f0, 0x3b148, |
| 2201 | 0x3b160, 0x3b19c, |
| 2202 | 0x3b1f0, 0x3b2e4, |
| 2203 | 0x3b2f8, 0x3b3e4, |
| 2204 | 0x3b3f8, 0x3b448, |
| 2205 | 0x3b460, 0x3b49c, |
| 2206 | 0x3b4f0, 0x3b548, |
| 2207 | 0x3b560, 0x3b59c, |
| 2208 | 0x3b5f0, 0x3b6e4, |
| 2209 | 0x3b6f8, 0x3b7e4, |
| 2210 | 0x3b7f8, 0x3b7fc, |
| 2211 | 0x3b814, 0x3b814, |
| 2212 | 0x3b82c, 0x3b82c, |
| 2213 | 0x3b880, 0x3b88c, |
| 2214 | 0x3b8e8, 0x3b8ec, |
| 2215 | 0x3b900, 0x3b948, |
| 2216 | 0x3b960, 0x3b99c, |
| 2217 | 0x3b9f0, 0x3bae4, |
| 2218 | 0x3baf8, 0x3bb10, |
| 2219 | 0x3bb28, 0x3bb28, |
| 2220 | 0x3bb3c, 0x3bb50, |
| 2221 | 0x3bbf0, 0x3bc10, |
| 2222 | 0x3bc28, 0x3bc28, |
| 2223 | 0x3bc3c, 0x3bc50, |
| 2224 | 0x3bcf0, 0x3bcfc, |
| 2225 | 0x3c000, 0x3c030, |
| 2226 | 0x3c100, 0x3c144, |
| 2227 | 0x3c190, 0x3c1d0, |
| 2228 | 0x3c200, 0x3c318, |
| 2229 | 0x3c400, 0x3c52c, |
| 2230 | 0x3c540, 0x3c61c, |
| 2231 | 0x3c800, 0x3c834, |
| 2232 | 0x3c8c0, 0x3c908, |
| 2233 | 0x3c910, 0x3c9ac, |
| 2234 | 0x3ca00, 0x3ca04, |
| 2235 | 0x3ca0c, 0x3ca2c, |
| 2236 | 0x3ca44, 0x3ca50, |
| 2237 | 0x3ca74, 0x3cc24, |
| 2238 | 0x3cd08, 0x3cd14, |
| 2239 | 0x3cd1c, 0x3cd20, |
| 2240 | 0x3cd3c, 0x3cd50, |
| 2241 | 0x3d200, 0x3d20c, |
| 2242 | 0x3d220, 0x3d220, |
| 2243 | 0x3d240, 0x3d240, |
| 2244 | 0x3d600, 0x3d600, |
| 2245 | 0x3d608, 0x3d60c, |
| 2246 | 0x3da00, 0x3da1c, |
| 2247 | 0x3de04, 0x3de20, |
| 2248 | 0x3de38, 0x3de3c, |
| 2249 | 0x3de80, 0x3de80, |
| 2250 | 0x3de88, 0x3dea8, |
| 2251 | 0x3deb0, 0x3deb4, |
| 2252 | 0x3dec8, 0x3ded4, |
| 2253 | 0x3dfb8, 0x3e004, |
| 2254 | 0x3e208, 0x3e23c, |
| 2255 | 0x3e600, 0x3e630, |
| 2256 | 0x3ea00, 0x3eabc, |
| 2257 | 0x3eb00, 0x3eb70, |
| 2258 | 0x3f000, 0x3f048, |
| 2259 | 0x3f060, 0x3f09c, |
| 2260 | 0x3f0f0, 0x3f148, |
| 2261 | 0x3f160, 0x3f19c, |
| 2262 | 0x3f1f0, 0x3f2e4, |
| 2263 | 0x3f2f8, 0x3f3e4, |
| 2264 | 0x3f3f8, 0x3f448, |
| 2265 | 0x3f460, 0x3f49c, |
| 2266 | 0x3f4f0, 0x3f548, |
| 2267 | 0x3f560, 0x3f59c, |
| 2268 | 0x3f5f0, 0x3f6e4, |
| 2269 | 0x3f6f8, 0x3f7e4, |
| 2270 | 0x3f7f8, 0x3f7fc, |
| 2271 | 0x3f814, 0x3f814, |
| 2272 | 0x3f82c, 0x3f82c, |
| 2273 | 0x3f880, 0x3f88c, |
| 2274 | 0x3f8e8, 0x3f8ec, |
| 2275 | 0x3f900, 0x3f948, |
| 2276 | 0x3f960, 0x3f99c, |
| 2277 | 0x3f9f0, 0x3fae4, |
| 2278 | 0x3faf8, 0x3fb10, |
| 2279 | 0x3fb28, 0x3fb28, |
| 2280 | 0x3fb3c, 0x3fb50, |
| 2281 | 0x3fbf0, 0x3fc10, |
| 2282 | 0x3fc28, 0x3fc28, |
| 2283 | 0x3fc3c, 0x3fc50, |
| 2284 | 0x3fcf0, 0x3fcfc, |
| 2285 | 0x40000, 0x4000c, |
| 2286 | 0x40040, 0x40068, |
| 2287 | 0x40080, 0x40144, |
| 2288 | 0x40180, 0x4018c, |
| 2289 | 0x40200, 0x40298, |
| 2290 | 0x402ac, 0x4033c, |
| 2291 | 0x403f8, 0x403fc, |
Kumar Sanghvi | c1f49e3 | 2014-02-18 17:56:13 +0530 | [diff] [blame] | 2292 | 0x41304, 0x413c4, |
Santosh Rastapur | 251f9e8 | 2013-03-14 05:08:50 +0000 | [diff] [blame] | 2293 | 0x41400, 0x4141c, |
| 2294 | 0x41480, 0x414d0, |
| 2295 | 0x44000, 0x44078, |
| 2296 | 0x440c0, 0x44278, |
| 2297 | 0x442c0, 0x44478, |
| 2298 | 0x444c0, 0x44678, |
| 2299 | 0x446c0, 0x44878, |
| 2300 | 0x448c0, 0x449fc, |
| 2301 | 0x45000, 0x45068, |
| 2302 | 0x45080, 0x45084, |
| 2303 | 0x450a0, 0x450b0, |
| 2304 | 0x45200, 0x45268, |
| 2305 | 0x45280, 0x45284, |
| 2306 | 0x452a0, 0x452b0, |
| 2307 | 0x460c0, 0x460e4, |
| 2308 | 0x47000, 0x4708c, |
| 2309 | 0x47200, 0x47250, |
| 2310 | 0x47400, 0x47420, |
| 2311 | 0x47600, 0x47618, |
| 2312 | 0x47800, 0x47814, |
| 2313 | 0x48000, 0x4800c, |
| 2314 | 0x48040, 0x48068, |
| 2315 | 0x48080, 0x48144, |
| 2316 | 0x48180, 0x4818c, |
| 2317 | 0x48200, 0x48298, |
| 2318 | 0x482ac, 0x4833c, |
| 2319 | 0x483f8, 0x483fc, |
Kumar Sanghvi | c1f49e3 | 2014-02-18 17:56:13 +0530 | [diff] [blame] | 2320 | 0x49304, 0x493c4, |
Santosh Rastapur | 251f9e8 | 2013-03-14 05:08:50 +0000 | [diff] [blame] | 2321 | 0x49400, 0x4941c, |
| 2322 | 0x49480, 0x494d0, |
| 2323 | 0x4c000, 0x4c078, |
| 2324 | 0x4c0c0, 0x4c278, |
| 2325 | 0x4c2c0, 0x4c478, |
| 2326 | 0x4c4c0, 0x4c678, |
| 2327 | 0x4c6c0, 0x4c878, |
| 2328 | 0x4c8c0, 0x4c9fc, |
| 2329 | 0x4d000, 0x4d068, |
| 2330 | 0x4d080, 0x4d084, |
| 2331 | 0x4d0a0, 0x4d0b0, |
| 2332 | 0x4d200, 0x4d268, |
| 2333 | 0x4d280, 0x4d284, |
| 2334 | 0x4d2a0, 0x4d2b0, |
| 2335 | 0x4e0c0, 0x4e0e4, |
| 2336 | 0x4f000, 0x4f08c, |
| 2337 | 0x4f200, 0x4f250, |
| 2338 | 0x4f400, 0x4f420, |
| 2339 | 0x4f600, 0x4f618, |
| 2340 | 0x4f800, 0x4f814, |
| 2341 | 0x50000, 0x500cc, |
| 2342 | 0x50400, 0x50400, |
| 2343 | 0x50800, 0x508cc, |
| 2344 | 0x50c00, 0x50c00, |
| 2345 | 0x51000, 0x5101c, |
| 2346 | 0x51300, 0x51308, |
| 2347 | }; |
| 2348 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2349 | int i; |
| 2350 | struct adapter *ap = netdev2adap(dev); |
Santosh Rastapur | 251f9e8 | 2013-03-14 05:08:50 +0000 | [diff] [blame] | 2351 | static const unsigned int *reg_ranges; |
| 2352 | int arr_size = 0, buf_size = 0; |
| 2353 | |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 2354 | if (is_t4(ap->params.chip)) { |
Santosh Rastapur | 251f9e8 | 2013-03-14 05:08:50 +0000 | [diff] [blame] | 2355 | reg_ranges = &t4_reg_ranges[0]; |
| 2356 | arr_size = ARRAY_SIZE(t4_reg_ranges); |
| 2357 | buf_size = T4_REGMAP_SIZE; |
| 2358 | } else { |
| 2359 | reg_ranges = &t5_reg_ranges[0]; |
| 2360 | arr_size = ARRAY_SIZE(t5_reg_ranges); |
| 2361 | buf_size = T5_REGMAP_SIZE; |
| 2362 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2363 | |
| 2364 | regs->version = mk_adap_vers(ap); |
| 2365 | |
Santosh Rastapur | 251f9e8 | 2013-03-14 05:08:50 +0000 | [diff] [blame] | 2366 | memset(buf, 0, buf_size); |
| 2367 | for (i = 0; i < arr_size; i += 2) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2368 | reg_block_dump(ap, buf, reg_ranges[i], reg_ranges[i + 1]); |
| 2369 | } |
| 2370 | |
| 2371 | static int restart_autoneg(struct net_device *dev) |
| 2372 | { |
| 2373 | struct port_info *p = netdev_priv(dev); |
| 2374 | |
| 2375 | if (!netif_running(dev)) |
| 2376 | return -EAGAIN; |
| 2377 | if (p->link_cfg.autoneg != AUTONEG_ENABLE) |
| 2378 | return -EINVAL; |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 2379 | t4_restart_aneg(p->adapter, p->adapter->fn, p->tx_chan); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2380 | return 0; |
| 2381 | } |
| 2382 | |
Dimitris Michailidis | c5e0636 | 2011-04-08 13:06:25 -0700 | [diff] [blame] | 2383 | static int identify_port(struct net_device *dev, |
| 2384 | enum ethtool_phys_id_state state) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2385 | { |
Dimitris Michailidis | c5e0636 | 2011-04-08 13:06:25 -0700 | [diff] [blame] | 2386 | unsigned int val; |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 2387 | struct adapter *adap = netdev2adap(dev); |
| 2388 | |
Dimitris Michailidis | c5e0636 | 2011-04-08 13:06:25 -0700 | [diff] [blame] | 2389 | if (state == ETHTOOL_ID_ACTIVE) |
| 2390 | val = 0xffff; |
| 2391 | else if (state == ETHTOOL_ID_INACTIVE) |
| 2392 | val = 0; |
| 2393 | else |
| 2394 | return -EINVAL; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2395 | |
Dimitris Michailidis | c5e0636 | 2011-04-08 13:06:25 -0700 | [diff] [blame] | 2396 | return t4_identify_port(adap, adap->fn, netdev2pinfo(dev)->viid, val); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2397 | } |
| 2398 | |
| 2399 | static unsigned int from_fw_linkcaps(unsigned int type, unsigned int caps) |
| 2400 | { |
| 2401 | unsigned int v = 0; |
| 2402 | |
Dimitris Michailidis | a0881ca | 2010-06-18 10:05:34 +0000 | [diff] [blame] | 2403 | if (type == FW_PORT_TYPE_BT_SGMII || type == FW_PORT_TYPE_BT_XFI || |
| 2404 | type == FW_PORT_TYPE_BT_XAUI) { |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2405 | v |= SUPPORTED_TP; |
| 2406 | if (caps & FW_PORT_CAP_SPEED_100M) |
| 2407 | v |= SUPPORTED_100baseT_Full; |
| 2408 | if (caps & FW_PORT_CAP_SPEED_1G) |
| 2409 | v |= SUPPORTED_1000baseT_Full; |
| 2410 | if (caps & FW_PORT_CAP_SPEED_10G) |
| 2411 | v |= SUPPORTED_10000baseT_Full; |
| 2412 | } else if (type == FW_PORT_TYPE_KX4 || type == FW_PORT_TYPE_KX) { |
| 2413 | v |= SUPPORTED_Backplane; |
| 2414 | if (caps & FW_PORT_CAP_SPEED_1G) |
| 2415 | v |= SUPPORTED_1000baseKX_Full; |
| 2416 | if (caps & FW_PORT_CAP_SPEED_10G) |
| 2417 | v |= SUPPORTED_10000baseKX4_Full; |
| 2418 | } else if (type == FW_PORT_TYPE_KR) |
| 2419 | v |= SUPPORTED_Backplane | SUPPORTED_10000baseKR_Full; |
Dimitris Michailidis | a0881ca | 2010-06-18 10:05:34 +0000 | [diff] [blame] | 2420 | else if (type == FW_PORT_TYPE_BP_AP) |
Dimitris Michailidis | 7d5e77a | 2010-12-14 21:36:47 +0000 | [diff] [blame] | 2421 | v |= SUPPORTED_Backplane | SUPPORTED_10000baseR_FEC | |
| 2422 | SUPPORTED_10000baseKR_Full | SUPPORTED_1000baseKX_Full; |
| 2423 | else if (type == FW_PORT_TYPE_BP4_AP) |
| 2424 | v |= SUPPORTED_Backplane | SUPPORTED_10000baseR_FEC | |
| 2425 | SUPPORTED_10000baseKR_Full | SUPPORTED_1000baseKX_Full | |
| 2426 | SUPPORTED_10000baseKX4_Full; |
Dimitris Michailidis | a0881ca | 2010-06-18 10:05:34 +0000 | [diff] [blame] | 2427 | else if (type == FW_PORT_TYPE_FIBER_XFI || |
| 2428 | type == FW_PORT_TYPE_FIBER_XAUI || type == FW_PORT_TYPE_SFP) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2429 | v |= SUPPORTED_FIBRE; |
Kumar Sanghvi | 72aca4b | 2014-02-18 17:56:08 +0530 | [diff] [blame] | 2430 | else if (type == FW_PORT_TYPE_BP40_BA) |
| 2431 | v |= SUPPORTED_40000baseSR4_Full; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2432 | |
| 2433 | if (caps & FW_PORT_CAP_ANEG) |
| 2434 | v |= SUPPORTED_Autoneg; |
| 2435 | return v; |
| 2436 | } |
| 2437 | |
| 2438 | static unsigned int to_fw_linkcaps(unsigned int caps) |
| 2439 | { |
| 2440 | unsigned int v = 0; |
| 2441 | |
| 2442 | if (caps & ADVERTISED_100baseT_Full) |
| 2443 | v |= FW_PORT_CAP_SPEED_100M; |
| 2444 | if (caps & ADVERTISED_1000baseT_Full) |
| 2445 | v |= FW_PORT_CAP_SPEED_1G; |
| 2446 | if (caps & ADVERTISED_10000baseT_Full) |
| 2447 | v |= FW_PORT_CAP_SPEED_10G; |
Kumar Sanghvi | 72aca4b | 2014-02-18 17:56:08 +0530 | [diff] [blame] | 2448 | if (caps & ADVERTISED_40000baseSR4_Full) |
| 2449 | v |= FW_PORT_CAP_SPEED_40G; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2450 | return v; |
| 2451 | } |
| 2452 | |
| 2453 | static int get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 2454 | { |
| 2455 | const struct port_info *p = netdev_priv(dev); |
| 2456 | |
| 2457 | if (p->port_type == FW_PORT_TYPE_BT_SGMII || |
Dimitris Michailidis | a0881ca | 2010-06-18 10:05:34 +0000 | [diff] [blame] | 2458 | p->port_type == FW_PORT_TYPE_BT_XFI || |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2459 | p->port_type == FW_PORT_TYPE_BT_XAUI) |
| 2460 | cmd->port = PORT_TP; |
Dimitris Michailidis | a0881ca | 2010-06-18 10:05:34 +0000 | [diff] [blame] | 2461 | else if (p->port_type == FW_PORT_TYPE_FIBER_XFI || |
| 2462 | p->port_type == FW_PORT_TYPE_FIBER_XAUI) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2463 | cmd->port = PORT_FIBRE; |
Hariprasad Shenai | 3e00a50 | 2014-05-07 18:01:02 +0530 | [diff] [blame] | 2464 | else if (p->port_type == FW_PORT_TYPE_SFP || |
| 2465 | p->port_type == FW_PORT_TYPE_QSFP_10G || |
| 2466 | p->port_type == FW_PORT_TYPE_QSFP) { |
| 2467 | if (p->mod_type == FW_PORT_MOD_TYPE_LR || |
| 2468 | p->mod_type == FW_PORT_MOD_TYPE_SR || |
| 2469 | p->mod_type == FW_PORT_MOD_TYPE_ER || |
| 2470 | p->mod_type == FW_PORT_MOD_TYPE_LRM) |
| 2471 | cmd->port = PORT_FIBRE; |
| 2472 | else if (p->mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE || |
| 2473 | p->mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE) |
Dimitris Michailidis | a0881ca | 2010-06-18 10:05:34 +0000 | [diff] [blame] | 2474 | cmd->port = PORT_DA; |
| 2475 | else |
Hariprasad Shenai | 3e00a50 | 2014-05-07 18:01:02 +0530 | [diff] [blame] | 2476 | cmd->port = PORT_OTHER; |
Dimitris Michailidis | a0881ca | 2010-06-18 10:05:34 +0000 | [diff] [blame] | 2477 | } else |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2478 | cmd->port = PORT_OTHER; |
| 2479 | |
| 2480 | if (p->mdio_addr >= 0) { |
| 2481 | cmd->phy_address = p->mdio_addr; |
| 2482 | cmd->transceiver = XCVR_EXTERNAL; |
| 2483 | cmd->mdio_support = p->port_type == FW_PORT_TYPE_BT_SGMII ? |
| 2484 | MDIO_SUPPORTS_C22 : MDIO_SUPPORTS_C45; |
| 2485 | } else { |
| 2486 | cmd->phy_address = 0; /* not really, but no better option */ |
| 2487 | cmd->transceiver = XCVR_INTERNAL; |
| 2488 | cmd->mdio_support = 0; |
| 2489 | } |
| 2490 | |
| 2491 | cmd->supported = from_fw_linkcaps(p->port_type, p->link_cfg.supported); |
| 2492 | cmd->advertising = from_fw_linkcaps(p->port_type, |
| 2493 | p->link_cfg.advertising); |
David Decotigny | 7073949 | 2011-04-27 18:32:40 +0000 | [diff] [blame] | 2494 | ethtool_cmd_speed_set(cmd, |
| 2495 | netif_carrier_ok(dev) ? p->link_cfg.speed : 0); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2496 | cmd->duplex = DUPLEX_FULL; |
| 2497 | cmd->autoneg = p->link_cfg.autoneg; |
| 2498 | cmd->maxtxpkt = 0; |
| 2499 | cmd->maxrxpkt = 0; |
| 2500 | return 0; |
| 2501 | } |
| 2502 | |
| 2503 | static unsigned int speed_to_caps(int speed) |
| 2504 | { |
Ben Hutchings | e8b3901 | 2014-02-23 00:03:24 +0000 | [diff] [blame] | 2505 | if (speed == 100) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2506 | return FW_PORT_CAP_SPEED_100M; |
Ben Hutchings | e8b3901 | 2014-02-23 00:03:24 +0000 | [diff] [blame] | 2507 | if (speed == 1000) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2508 | return FW_PORT_CAP_SPEED_1G; |
Ben Hutchings | e8b3901 | 2014-02-23 00:03:24 +0000 | [diff] [blame] | 2509 | if (speed == 10000) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2510 | return FW_PORT_CAP_SPEED_10G; |
Ben Hutchings | e8b3901 | 2014-02-23 00:03:24 +0000 | [diff] [blame] | 2511 | if (speed == 40000) |
Kumar Sanghvi | 72aca4b | 2014-02-18 17:56:08 +0530 | [diff] [blame] | 2512 | return FW_PORT_CAP_SPEED_40G; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2513 | return 0; |
| 2514 | } |
| 2515 | |
| 2516 | static int set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 2517 | { |
| 2518 | unsigned int cap; |
| 2519 | struct port_info *p = netdev_priv(dev); |
| 2520 | struct link_config *lc = &p->link_cfg; |
David Decotigny | 25db033 | 2011-04-27 18:32:39 +0000 | [diff] [blame] | 2521 | u32 speed = ethtool_cmd_speed(cmd); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2522 | |
| 2523 | if (cmd->duplex != DUPLEX_FULL) /* only full-duplex supported */ |
| 2524 | return -EINVAL; |
| 2525 | |
| 2526 | if (!(lc->supported & FW_PORT_CAP_ANEG)) { |
| 2527 | /* |
| 2528 | * PHY offers a single speed. See if that's what's |
| 2529 | * being requested. |
| 2530 | */ |
| 2531 | if (cmd->autoneg == AUTONEG_DISABLE && |
David Decotigny | 25db033 | 2011-04-27 18:32:39 +0000 | [diff] [blame] | 2532 | (lc->supported & speed_to_caps(speed))) |
| 2533 | return 0; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2534 | return -EINVAL; |
| 2535 | } |
| 2536 | |
| 2537 | if (cmd->autoneg == AUTONEG_DISABLE) { |
David Decotigny | 25db033 | 2011-04-27 18:32:39 +0000 | [diff] [blame] | 2538 | cap = speed_to_caps(speed); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2539 | |
Kumar Sanghvi | 72aca4b | 2014-02-18 17:56:08 +0530 | [diff] [blame] | 2540 | if (!(lc->supported & cap) || |
Ben Hutchings | e8b3901 | 2014-02-23 00:03:24 +0000 | [diff] [blame] | 2541 | (speed == 1000) || |
| 2542 | (speed == 10000) || |
Kumar Sanghvi | 72aca4b | 2014-02-18 17:56:08 +0530 | [diff] [blame] | 2543 | (speed == 40000)) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2544 | return -EINVAL; |
| 2545 | lc->requested_speed = cap; |
| 2546 | lc->advertising = 0; |
| 2547 | } else { |
| 2548 | cap = to_fw_linkcaps(cmd->advertising); |
| 2549 | if (!(lc->supported & cap)) |
| 2550 | return -EINVAL; |
| 2551 | lc->requested_speed = 0; |
| 2552 | lc->advertising = cap | FW_PORT_CAP_ANEG; |
| 2553 | } |
| 2554 | lc->autoneg = cmd->autoneg; |
| 2555 | |
| 2556 | if (netif_running(dev)) |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 2557 | return t4_link_start(p->adapter, p->adapter->fn, p->tx_chan, |
| 2558 | lc); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2559 | return 0; |
| 2560 | } |
| 2561 | |
| 2562 | static void get_pauseparam(struct net_device *dev, |
| 2563 | struct ethtool_pauseparam *epause) |
| 2564 | { |
| 2565 | struct port_info *p = netdev_priv(dev); |
| 2566 | |
| 2567 | epause->autoneg = (p->link_cfg.requested_fc & PAUSE_AUTONEG) != 0; |
| 2568 | epause->rx_pause = (p->link_cfg.fc & PAUSE_RX) != 0; |
| 2569 | epause->tx_pause = (p->link_cfg.fc & PAUSE_TX) != 0; |
| 2570 | } |
| 2571 | |
| 2572 | static int set_pauseparam(struct net_device *dev, |
| 2573 | struct ethtool_pauseparam *epause) |
| 2574 | { |
| 2575 | struct port_info *p = netdev_priv(dev); |
| 2576 | struct link_config *lc = &p->link_cfg; |
| 2577 | |
| 2578 | if (epause->autoneg == AUTONEG_DISABLE) |
| 2579 | lc->requested_fc = 0; |
| 2580 | else if (lc->supported & FW_PORT_CAP_ANEG) |
| 2581 | lc->requested_fc = PAUSE_AUTONEG; |
| 2582 | else |
| 2583 | return -EINVAL; |
| 2584 | |
| 2585 | if (epause->rx_pause) |
| 2586 | lc->requested_fc |= PAUSE_RX; |
| 2587 | if (epause->tx_pause) |
| 2588 | lc->requested_fc |= PAUSE_TX; |
| 2589 | if (netif_running(dev)) |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 2590 | return t4_link_start(p->adapter, p->adapter->fn, p->tx_chan, |
| 2591 | lc); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2592 | return 0; |
| 2593 | } |
| 2594 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2595 | static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e) |
| 2596 | { |
| 2597 | const struct port_info *pi = netdev_priv(dev); |
| 2598 | const struct sge *s = &pi->adapter->sge; |
| 2599 | |
| 2600 | e->rx_max_pending = MAX_RX_BUFFERS; |
| 2601 | e->rx_mini_max_pending = MAX_RSPQ_ENTRIES; |
| 2602 | e->rx_jumbo_max_pending = 0; |
| 2603 | e->tx_max_pending = MAX_TXQ_ENTRIES; |
| 2604 | |
| 2605 | e->rx_pending = s->ethrxq[pi->first_qset].fl.size - 8; |
| 2606 | e->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size; |
| 2607 | e->rx_jumbo_pending = 0; |
| 2608 | e->tx_pending = s->ethtxq[pi->first_qset].q.size; |
| 2609 | } |
| 2610 | |
| 2611 | static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e) |
| 2612 | { |
| 2613 | int i; |
| 2614 | const struct port_info *pi = netdev_priv(dev); |
| 2615 | struct adapter *adapter = pi->adapter; |
| 2616 | struct sge *s = &adapter->sge; |
| 2617 | |
| 2618 | if (e->rx_pending > MAX_RX_BUFFERS || e->rx_jumbo_pending || |
| 2619 | e->tx_pending > MAX_TXQ_ENTRIES || |
| 2620 | e->rx_mini_pending > MAX_RSPQ_ENTRIES || |
| 2621 | e->rx_mini_pending < MIN_RSPQ_ENTRIES || |
| 2622 | e->rx_pending < MIN_FL_ENTRIES || e->tx_pending < MIN_TXQ_ENTRIES) |
| 2623 | return -EINVAL; |
| 2624 | |
| 2625 | if (adapter->flags & FULL_INIT_DONE) |
| 2626 | return -EBUSY; |
| 2627 | |
| 2628 | for (i = 0; i < pi->nqsets; ++i) { |
| 2629 | s->ethtxq[pi->first_qset + i].q.size = e->tx_pending; |
| 2630 | s->ethrxq[pi->first_qset + i].fl.size = e->rx_pending + 8; |
| 2631 | s->ethrxq[pi->first_qset + i].rspq.size = e->rx_mini_pending; |
| 2632 | } |
| 2633 | return 0; |
| 2634 | } |
| 2635 | |
| 2636 | static int closest_timer(const struct sge *s, int time) |
| 2637 | { |
| 2638 | int i, delta, match = 0, min_delta = INT_MAX; |
| 2639 | |
| 2640 | for (i = 0; i < ARRAY_SIZE(s->timer_val); i++) { |
| 2641 | delta = time - s->timer_val[i]; |
| 2642 | if (delta < 0) |
| 2643 | delta = -delta; |
| 2644 | if (delta < min_delta) { |
| 2645 | min_delta = delta; |
| 2646 | match = i; |
| 2647 | } |
| 2648 | } |
| 2649 | return match; |
| 2650 | } |
| 2651 | |
| 2652 | static int closest_thres(const struct sge *s, int thres) |
| 2653 | { |
| 2654 | int i, delta, match = 0, min_delta = INT_MAX; |
| 2655 | |
| 2656 | for (i = 0; i < ARRAY_SIZE(s->counter_val); i++) { |
| 2657 | delta = thres - s->counter_val[i]; |
| 2658 | if (delta < 0) |
| 2659 | delta = -delta; |
| 2660 | if (delta < min_delta) { |
| 2661 | min_delta = delta; |
| 2662 | match = i; |
| 2663 | } |
| 2664 | } |
| 2665 | return match; |
| 2666 | } |
| 2667 | |
| 2668 | /* |
| 2669 | * Return a queue's interrupt hold-off time in us. 0 means no timer. |
| 2670 | */ |
| 2671 | static unsigned int qtimer_val(const struct adapter *adap, |
| 2672 | const struct sge_rspq *q) |
| 2673 | { |
| 2674 | unsigned int idx = q->intr_params >> 1; |
| 2675 | |
| 2676 | return idx < SGE_NTIMERS ? adap->sge.timer_val[idx] : 0; |
| 2677 | } |
| 2678 | |
| 2679 | /** |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 2680 | * set_rspq_intr_params - set a queue's interrupt holdoff parameters |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2681 | * @q: the Rx queue |
| 2682 | * @us: the hold-off time in us, or 0 to disable timer |
| 2683 | * @cnt: the hold-off packet count, or 0 to disable counter |
| 2684 | * |
| 2685 | * Sets an Rx queue's interrupt hold-off time and packet count. At least |
| 2686 | * one of the two needs to be enabled for the queue to generate interrupts. |
| 2687 | */ |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 2688 | static int set_rspq_intr_params(struct sge_rspq *q, |
| 2689 | unsigned int us, unsigned int cnt) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2690 | { |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 2691 | struct adapter *adap = q->adap; |
| 2692 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2693 | if ((us | cnt) == 0) |
| 2694 | cnt = 1; |
| 2695 | |
| 2696 | if (cnt) { |
| 2697 | int err; |
| 2698 | u32 v, new_idx; |
| 2699 | |
| 2700 | new_idx = closest_thres(&adap->sge, cnt); |
| 2701 | if (q->desc && q->pktcnt_idx != new_idx) { |
| 2702 | /* the queue has already been created, update it */ |
| 2703 | v = FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) | |
| 2704 | FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_IQ_INTCNTTHRESH) | |
| 2705 | FW_PARAMS_PARAM_YZ(q->cntxt_id); |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 2706 | err = t4_set_params(adap, adap->fn, adap->fn, 0, 1, &v, |
| 2707 | &new_idx); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2708 | if (err) |
| 2709 | return err; |
| 2710 | } |
| 2711 | q->pktcnt_idx = new_idx; |
| 2712 | } |
| 2713 | |
| 2714 | us = us == 0 ? 6 : closest_timer(&adap->sge, us); |
| 2715 | q->intr_params = QINTR_TIMER_IDX(us) | (cnt > 0 ? QINTR_CNT_EN : 0); |
| 2716 | return 0; |
| 2717 | } |
| 2718 | |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 2719 | /** |
| 2720 | * set_rx_intr_params - set a net devices's RX interrupt holdoff paramete! |
| 2721 | * @dev: the network device |
| 2722 | * @us: the hold-off time in us, or 0 to disable timer |
| 2723 | * @cnt: the hold-off packet count, or 0 to disable counter |
| 2724 | * |
| 2725 | * Set the RX interrupt hold-off parameters for a network device. |
| 2726 | */ |
| 2727 | static int set_rx_intr_params(struct net_device *dev, |
| 2728 | unsigned int us, unsigned int cnt) |
| 2729 | { |
| 2730 | int i, err; |
| 2731 | struct port_info *pi = netdev_priv(dev); |
| 2732 | struct adapter *adap = pi->adapter; |
| 2733 | struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; |
| 2734 | |
| 2735 | for (i = 0; i < pi->nqsets; i++, q++) { |
| 2736 | err = set_rspq_intr_params(&q->rspq, us, cnt); |
| 2737 | if (err) |
| 2738 | return err; |
| 2739 | } |
| 2740 | return 0; |
| 2741 | } |
| 2742 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2743 | static int set_coalesce(struct net_device *dev, struct ethtool_coalesce *c) |
| 2744 | { |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 2745 | return set_rx_intr_params(dev, c->rx_coalesce_usecs, |
| 2746 | c->rx_max_coalesced_frames); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2747 | } |
| 2748 | |
| 2749 | static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c) |
| 2750 | { |
| 2751 | const struct port_info *pi = netdev_priv(dev); |
| 2752 | const struct adapter *adap = pi->adapter; |
| 2753 | const struct sge_rspq *rq = &adap->sge.ethrxq[pi->first_qset].rspq; |
| 2754 | |
| 2755 | c->rx_coalesce_usecs = qtimer_val(adap, rq); |
| 2756 | c->rx_max_coalesced_frames = (rq->intr_params & QINTR_CNT_EN) ? |
| 2757 | adap->sge.counter_val[rq->pktcnt_idx] : 0; |
| 2758 | return 0; |
| 2759 | } |
| 2760 | |
Dimitris Michailidis | 1478b3e | 2010-08-23 17:20:59 +0000 | [diff] [blame] | 2761 | /** |
| 2762 | * eeprom_ptov - translate a physical EEPROM address to virtual |
| 2763 | * @phys_addr: the physical EEPROM address |
| 2764 | * @fn: the PCI function number |
| 2765 | * @sz: size of function-specific area |
| 2766 | * |
| 2767 | * Translate a physical EEPROM address to virtual. The first 1K is |
| 2768 | * accessed through virtual addresses starting at 31K, the rest is |
| 2769 | * accessed through virtual addresses starting at 0. |
| 2770 | * |
| 2771 | * The mapping is as follows: |
| 2772 | * [0..1K) -> [31K..32K) |
| 2773 | * [1K..1K+A) -> [31K-A..31K) |
| 2774 | * [1K+A..ES) -> [0..ES-A-1K) |
| 2775 | * |
| 2776 | * where A = @fn * @sz, and ES = EEPROM size. |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2777 | */ |
Dimitris Michailidis | 1478b3e | 2010-08-23 17:20:59 +0000 | [diff] [blame] | 2778 | static int eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2779 | { |
Dimitris Michailidis | 1478b3e | 2010-08-23 17:20:59 +0000 | [diff] [blame] | 2780 | fn *= sz; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2781 | if (phys_addr < 1024) |
| 2782 | return phys_addr + (31 << 10); |
Dimitris Michailidis | 1478b3e | 2010-08-23 17:20:59 +0000 | [diff] [blame] | 2783 | if (phys_addr < 1024 + fn) |
| 2784 | return 31744 - fn + phys_addr - 1024; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2785 | if (phys_addr < EEPROMSIZE) |
Dimitris Michailidis | 1478b3e | 2010-08-23 17:20:59 +0000 | [diff] [blame] | 2786 | return phys_addr - 1024 - fn; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2787 | return -EINVAL; |
| 2788 | } |
| 2789 | |
| 2790 | /* |
| 2791 | * The next two routines implement eeprom read/write from physical addresses. |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2792 | */ |
| 2793 | static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v) |
| 2794 | { |
Dimitris Michailidis | 1478b3e | 2010-08-23 17:20:59 +0000 | [diff] [blame] | 2795 | int vaddr = eeprom_ptov(phys_addr, adap->fn, EEPROMPFSIZE); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2796 | |
| 2797 | if (vaddr >= 0) |
| 2798 | vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v); |
| 2799 | return vaddr < 0 ? vaddr : 0; |
| 2800 | } |
| 2801 | |
| 2802 | static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v) |
| 2803 | { |
Dimitris Michailidis | 1478b3e | 2010-08-23 17:20:59 +0000 | [diff] [blame] | 2804 | int vaddr = eeprom_ptov(phys_addr, adap->fn, EEPROMPFSIZE); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2805 | |
| 2806 | if (vaddr >= 0) |
| 2807 | vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v); |
| 2808 | return vaddr < 0 ? vaddr : 0; |
| 2809 | } |
| 2810 | |
| 2811 | #define EEPROM_MAGIC 0x38E2F10C |
| 2812 | |
| 2813 | static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e, |
| 2814 | u8 *data) |
| 2815 | { |
| 2816 | int i, err = 0; |
| 2817 | struct adapter *adapter = netdev2adap(dev); |
| 2818 | |
| 2819 | u8 *buf = kmalloc(EEPROMSIZE, GFP_KERNEL); |
| 2820 | if (!buf) |
| 2821 | return -ENOMEM; |
| 2822 | |
| 2823 | e->magic = EEPROM_MAGIC; |
| 2824 | for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4) |
| 2825 | err = eeprom_rd_phys(adapter, i, (u32 *)&buf[i]); |
| 2826 | |
| 2827 | if (!err) |
| 2828 | memcpy(data, buf + e->offset, e->len); |
| 2829 | kfree(buf); |
| 2830 | return err; |
| 2831 | } |
| 2832 | |
| 2833 | static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, |
| 2834 | u8 *data) |
| 2835 | { |
| 2836 | u8 *buf; |
| 2837 | int err = 0; |
| 2838 | u32 aligned_offset, aligned_len, *p; |
| 2839 | struct adapter *adapter = netdev2adap(dev); |
| 2840 | |
| 2841 | if (eeprom->magic != EEPROM_MAGIC) |
| 2842 | return -EINVAL; |
| 2843 | |
| 2844 | aligned_offset = eeprom->offset & ~3; |
| 2845 | aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3; |
| 2846 | |
Dimitris Michailidis | 1478b3e | 2010-08-23 17:20:59 +0000 | [diff] [blame] | 2847 | if (adapter->fn > 0) { |
| 2848 | u32 start = 1024 + adapter->fn * EEPROMPFSIZE; |
| 2849 | |
| 2850 | if (aligned_offset < start || |
| 2851 | aligned_offset + aligned_len > start + EEPROMPFSIZE) |
| 2852 | return -EPERM; |
| 2853 | } |
| 2854 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2855 | if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) { |
| 2856 | /* |
| 2857 | * RMW possibly needed for first or last words. |
| 2858 | */ |
| 2859 | buf = kmalloc(aligned_len, GFP_KERNEL); |
| 2860 | if (!buf) |
| 2861 | return -ENOMEM; |
| 2862 | err = eeprom_rd_phys(adapter, aligned_offset, (u32 *)buf); |
| 2863 | if (!err && aligned_len > 4) |
| 2864 | err = eeprom_rd_phys(adapter, |
| 2865 | aligned_offset + aligned_len - 4, |
| 2866 | (u32 *)&buf[aligned_len - 4]); |
| 2867 | if (err) |
| 2868 | goto out; |
| 2869 | memcpy(buf + (eeprom->offset & 3), data, eeprom->len); |
| 2870 | } else |
| 2871 | buf = data; |
| 2872 | |
| 2873 | err = t4_seeprom_wp(adapter, false); |
| 2874 | if (err) |
| 2875 | goto out; |
| 2876 | |
| 2877 | for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) { |
| 2878 | err = eeprom_wr_phys(adapter, aligned_offset, *p); |
| 2879 | aligned_offset += 4; |
| 2880 | } |
| 2881 | |
| 2882 | if (!err) |
| 2883 | err = t4_seeprom_wp(adapter, true); |
| 2884 | out: |
| 2885 | if (buf != data) |
| 2886 | kfree(buf); |
| 2887 | return err; |
| 2888 | } |
| 2889 | |
| 2890 | static int set_flash(struct net_device *netdev, struct ethtool_flash *ef) |
| 2891 | { |
| 2892 | int ret; |
| 2893 | const struct firmware *fw; |
| 2894 | struct adapter *adap = netdev2adap(netdev); |
| 2895 | |
| 2896 | ef->data[sizeof(ef->data) - 1] = '\0'; |
| 2897 | ret = request_firmware(&fw, ef->data, adap->pdev_dev); |
| 2898 | if (ret < 0) |
| 2899 | return ret; |
| 2900 | |
| 2901 | ret = t4_load_fw(adap, fw->data, fw->size); |
| 2902 | release_firmware(fw); |
| 2903 | if (!ret) |
| 2904 | dev_info(adap->pdev_dev, "loaded firmware %s\n", ef->data); |
| 2905 | return ret; |
| 2906 | } |
| 2907 | |
| 2908 | #define WOL_SUPPORTED (WAKE_BCAST | WAKE_MAGIC) |
| 2909 | #define BCAST_CRC 0xa0ccc1a6 |
| 2910 | |
| 2911 | static void get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
| 2912 | { |
| 2913 | wol->supported = WAKE_BCAST | WAKE_MAGIC; |
| 2914 | wol->wolopts = netdev2adap(dev)->wol; |
| 2915 | memset(&wol->sopass, 0, sizeof(wol->sopass)); |
| 2916 | } |
| 2917 | |
| 2918 | static int set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
| 2919 | { |
| 2920 | int err = 0; |
| 2921 | struct port_info *pi = netdev_priv(dev); |
| 2922 | |
| 2923 | if (wol->wolopts & ~WOL_SUPPORTED) |
| 2924 | return -EINVAL; |
| 2925 | t4_wol_magic_enable(pi->adapter, pi->tx_chan, |
| 2926 | (wol->wolopts & WAKE_MAGIC) ? dev->dev_addr : NULL); |
| 2927 | if (wol->wolopts & WAKE_BCAST) { |
| 2928 | err = t4_wol_pat_enable(pi->adapter, pi->tx_chan, 0xfe, ~0ULL, |
| 2929 | ~0ULL, 0, false); |
| 2930 | if (!err) |
| 2931 | err = t4_wol_pat_enable(pi->adapter, pi->tx_chan, 1, |
| 2932 | ~6ULL, ~0ULL, BCAST_CRC, true); |
| 2933 | } else |
| 2934 | t4_wol_pat_enable(pi->adapter, pi->tx_chan, 0, 0, 0, 0, false); |
| 2935 | return err; |
| 2936 | } |
| 2937 | |
Michał Mirosław | c8f44af | 2011-11-15 15:29:55 +0000 | [diff] [blame] | 2938 | static int cxgb_set_features(struct net_device *dev, netdev_features_t features) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 2939 | { |
Michał Mirosław | 2ed28ba | 2011-04-16 13:05:08 +0000 | [diff] [blame] | 2940 | const struct port_info *pi = netdev_priv(dev); |
Michał Mirosław | c8f44af | 2011-11-15 15:29:55 +0000 | [diff] [blame] | 2941 | netdev_features_t changed = dev->features ^ features; |
Dimitris Michailidis | 19ecae2 | 2010-10-21 11:29:56 +0000 | [diff] [blame] | 2942 | int err; |
Dimitris Michailidis | 19ecae2 | 2010-10-21 11:29:56 +0000 | [diff] [blame] | 2943 | |
Patrick McHardy | f646968 | 2013-04-19 02:04:27 +0000 | [diff] [blame] | 2944 | if (!(changed & NETIF_F_HW_VLAN_CTAG_RX)) |
Michał Mirosław | 2ed28ba | 2011-04-16 13:05:08 +0000 | [diff] [blame] | 2945 | return 0; |
Dimitris Michailidis | 19ecae2 | 2010-10-21 11:29:56 +0000 | [diff] [blame] | 2946 | |
Michał Mirosław | 2ed28ba | 2011-04-16 13:05:08 +0000 | [diff] [blame] | 2947 | err = t4_set_rxmode(pi->adapter, pi->adapter->fn, pi->viid, -1, |
| 2948 | -1, -1, -1, |
Patrick McHardy | f646968 | 2013-04-19 02:04:27 +0000 | [diff] [blame] | 2949 | !!(features & NETIF_F_HW_VLAN_CTAG_RX), true); |
Michał Mirosław | 2ed28ba | 2011-04-16 13:05:08 +0000 | [diff] [blame] | 2950 | if (unlikely(err)) |
Patrick McHardy | f646968 | 2013-04-19 02:04:27 +0000 | [diff] [blame] | 2951 | dev->features = features ^ NETIF_F_HW_VLAN_CTAG_RX; |
Dimitris Michailidis | 19ecae2 | 2010-10-21 11:29:56 +0000 | [diff] [blame] | 2952 | return err; |
Dimitris Michailidis | 87b6cf5 | 2010-04-27 16:22:42 -0700 | [diff] [blame] | 2953 | } |
| 2954 | |
Ben Hutchings | 7850f63 | 2011-12-15 13:55:01 +0000 | [diff] [blame] | 2955 | static u32 get_rss_table_size(struct net_device *dev) |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 2956 | { |
| 2957 | const struct port_info *pi = netdev_priv(dev); |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 2958 | |
Ben Hutchings | 7850f63 | 2011-12-15 13:55:01 +0000 | [diff] [blame] | 2959 | return pi->rss_size; |
| 2960 | } |
| 2961 | |
Ben Hutchings | fe62d00 | 2014-05-15 01:25:27 +0100 | [diff] [blame] | 2962 | static int get_rss_table(struct net_device *dev, u32 *p, u8 *key) |
Ben Hutchings | 7850f63 | 2011-12-15 13:55:01 +0000 | [diff] [blame] | 2963 | { |
| 2964 | const struct port_info *pi = netdev_priv(dev); |
| 2965 | unsigned int n = pi->rss_size; |
| 2966 | |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 2967 | while (n--) |
Ben Hutchings | 7850f63 | 2011-12-15 13:55:01 +0000 | [diff] [blame] | 2968 | p[n] = pi->rss[n]; |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 2969 | return 0; |
| 2970 | } |
| 2971 | |
Ben Hutchings | fe62d00 | 2014-05-15 01:25:27 +0100 | [diff] [blame] | 2972 | static int set_rss_table(struct net_device *dev, const u32 *p, const u8 *key) |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 2973 | { |
| 2974 | unsigned int i; |
| 2975 | struct port_info *pi = netdev_priv(dev); |
| 2976 | |
Ben Hutchings | 7850f63 | 2011-12-15 13:55:01 +0000 | [diff] [blame] | 2977 | for (i = 0; i < pi->rss_size; i++) |
| 2978 | pi->rss[i] = p[i]; |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 2979 | if (pi->adapter->flags & FULL_INIT_DONE) |
| 2980 | return write_rss(pi, pi->rss); |
| 2981 | return 0; |
| 2982 | } |
| 2983 | |
| 2984 | static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, |
Ben Hutchings | 815c7db | 2011-09-06 13:49:12 +0000 | [diff] [blame] | 2985 | u32 *rules) |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 2986 | { |
Dimitris Michailidis | f796564 | 2010-07-11 12:01:18 +0000 | [diff] [blame] | 2987 | const struct port_info *pi = netdev_priv(dev); |
| 2988 | |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 2989 | switch (info->cmd) { |
Dimitris Michailidis | f796564 | 2010-07-11 12:01:18 +0000 | [diff] [blame] | 2990 | case ETHTOOL_GRXFH: { |
| 2991 | unsigned int v = pi->rss_mode; |
| 2992 | |
| 2993 | info->data = 0; |
| 2994 | switch (info->flow_type) { |
| 2995 | case TCP_V4_FLOW: |
| 2996 | if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN) |
| 2997 | info->data = RXH_IP_SRC | RXH_IP_DST | |
| 2998 | RXH_L4_B_0_1 | RXH_L4_B_2_3; |
| 2999 | else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN) |
| 3000 | info->data = RXH_IP_SRC | RXH_IP_DST; |
| 3001 | break; |
| 3002 | case UDP_V4_FLOW: |
| 3003 | if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN) && |
| 3004 | (v & FW_RSS_VI_CONFIG_CMD_UDPEN)) |
| 3005 | info->data = RXH_IP_SRC | RXH_IP_DST | |
| 3006 | RXH_L4_B_0_1 | RXH_L4_B_2_3; |
| 3007 | else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN) |
| 3008 | info->data = RXH_IP_SRC | RXH_IP_DST; |
| 3009 | break; |
| 3010 | case SCTP_V4_FLOW: |
| 3011 | case AH_ESP_V4_FLOW: |
| 3012 | case IPV4_FLOW: |
| 3013 | if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN) |
| 3014 | info->data = RXH_IP_SRC | RXH_IP_DST; |
| 3015 | break; |
| 3016 | case TCP_V6_FLOW: |
| 3017 | if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN) |
| 3018 | info->data = RXH_IP_SRC | RXH_IP_DST | |
| 3019 | RXH_L4_B_0_1 | RXH_L4_B_2_3; |
| 3020 | else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN) |
| 3021 | info->data = RXH_IP_SRC | RXH_IP_DST; |
| 3022 | break; |
| 3023 | case UDP_V6_FLOW: |
| 3024 | if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN) && |
| 3025 | (v & FW_RSS_VI_CONFIG_CMD_UDPEN)) |
| 3026 | info->data = RXH_IP_SRC | RXH_IP_DST | |
| 3027 | RXH_L4_B_0_1 | RXH_L4_B_2_3; |
| 3028 | else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN) |
| 3029 | info->data = RXH_IP_SRC | RXH_IP_DST; |
| 3030 | break; |
| 3031 | case SCTP_V6_FLOW: |
| 3032 | case AH_ESP_V6_FLOW: |
| 3033 | case IPV6_FLOW: |
| 3034 | if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN) |
| 3035 | info->data = RXH_IP_SRC | RXH_IP_DST; |
| 3036 | break; |
| 3037 | } |
| 3038 | return 0; |
| 3039 | } |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 3040 | case ETHTOOL_GRXRINGS: |
Dimitris Michailidis | f796564 | 2010-07-11 12:01:18 +0000 | [diff] [blame] | 3041 | info->data = pi->nqsets; |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 3042 | return 0; |
| 3043 | } |
| 3044 | return -EOPNOTSUPP; |
| 3045 | } |
| 3046 | |
stephen hemminger | 9b07be4 | 2012-01-04 12:59:49 +0000 | [diff] [blame] | 3047 | static const struct ethtool_ops cxgb_ethtool_ops = { |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3048 | .get_settings = get_settings, |
| 3049 | .set_settings = set_settings, |
| 3050 | .get_drvinfo = get_drvinfo, |
| 3051 | .get_msglevel = get_msglevel, |
| 3052 | .set_msglevel = set_msglevel, |
| 3053 | .get_ringparam = get_sge_param, |
| 3054 | .set_ringparam = set_sge_param, |
| 3055 | .get_coalesce = get_coalesce, |
| 3056 | .set_coalesce = set_coalesce, |
| 3057 | .get_eeprom_len = get_eeprom_len, |
| 3058 | .get_eeprom = get_eeprom, |
| 3059 | .set_eeprom = set_eeprom, |
| 3060 | .get_pauseparam = get_pauseparam, |
| 3061 | .set_pauseparam = set_pauseparam, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3062 | .get_link = ethtool_op_get_link, |
| 3063 | .get_strings = get_strings, |
Dimitris Michailidis | c5e0636 | 2011-04-08 13:06:25 -0700 | [diff] [blame] | 3064 | .set_phys_id = identify_port, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3065 | .nway_reset = restart_autoneg, |
| 3066 | .get_sset_count = get_sset_count, |
| 3067 | .get_ethtool_stats = get_stats, |
| 3068 | .get_regs_len = get_regs_len, |
| 3069 | .get_regs = get_regs, |
| 3070 | .get_wol = get_wol, |
| 3071 | .set_wol = set_wol, |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 3072 | .get_rxnfc = get_rxnfc, |
Ben Hutchings | 7850f63 | 2011-12-15 13:55:01 +0000 | [diff] [blame] | 3073 | .get_rxfh_indir_size = get_rss_table_size, |
Ben Hutchings | fe62d00 | 2014-05-15 01:25:27 +0100 | [diff] [blame] | 3074 | .get_rxfh = get_rss_table, |
| 3075 | .set_rxfh = set_rss_table, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3076 | .flash_device = set_flash, |
| 3077 | }; |
| 3078 | |
| 3079 | /* |
| 3080 | * debugfs support |
| 3081 | */ |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3082 | static ssize_t mem_read(struct file *file, char __user *buf, size_t count, |
| 3083 | loff_t *ppos) |
| 3084 | { |
| 3085 | loff_t pos = *ppos; |
Al Viro | 496ad9a | 2013-01-23 17:07:38 -0500 | [diff] [blame] | 3086 | loff_t avail = file_inode(file)->i_size; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3087 | unsigned int mem = (uintptr_t)file->private_data & 3; |
| 3088 | struct adapter *adap = file->private_data - mem; |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 3089 | __be32 *data; |
| 3090 | int ret; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3091 | |
| 3092 | if (pos < 0) |
| 3093 | return -EINVAL; |
| 3094 | if (pos >= avail) |
| 3095 | return 0; |
| 3096 | if (count > avail - pos) |
| 3097 | count = avail - pos; |
| 3098 | |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 3099 | data = t4_alloc_mem(count); |
| 3100 | if (!data) |
| 3101 | return -ENOMEM; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3102 | |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 3103 | spin_lock(&adap->win0_lock); |
| 3104 | ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ); |
| 3105 | spin_unlock(&adap->win0_lock); |
| 3106 | if (ret) { |
| 3107 | t4_free_mem(data); |
| 3108 | return ret; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3109 | } |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 3110 | ret = copy_to_user(buf, data, count); |
| 3111 | |
| 3112 | t4_free_mem(data); |
| 3113 | if (ret) |
| 3114 | return -EFAULT; |
| 3115 | |
| 3116 | *ppos = pos + count; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3117 | return count; |
| 3118 | } |
| 3119 | |
| 3120 | static const struct file_operations mem_debugfs_fops = { |
| 3121 | .owner = THIS_MODULE, |
Stephen Boyd | 234e340 | 2012-04-05 14:25:11 -0700 | [diff] [blame] | 3122 | .open = simple_open, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3123 | .read = mem_read, |
Arnd Bergmann | 6038f37 | 2010-08-15 18:52:59 +0200 | [diff] [blame] | 3124 | .llseek = default_llseek, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3125 | }; |
| 3126 | |
Bill Pemberton | 9174494 | 2012-12-03 09:23:02 -0500 | [diff] [blame] | 3127 | static void add_debugfs_mem(struct adapter *adap, const char *name, |
Greg Kroah-Hartman | 1dd06ae | 2012-12-06 14:30:56 +0000 | [diff] [blame] | 3128 | unsigned int idx, unsigned int size_mb) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3129 | { |
| 3130 | struct dentry *de; |
| 3131 | |
| 3132 | de = debugfs_create_file(name, S_IRUSR, adap->debugfs_root, |
| 3133 | (void *)adap + idx, &mem_debugfs_fops); |
| 3134 | if (de && de->d_inode) |
| 3135 | de->d_inode->i_size = size_mb << 20; |
| 3136 | } |
| 3137 | |
Bill Pemberton | 9174494 | 2012-12-03 09:23:02 -0500 | [diff] [blame] | 3138 | static int setup_debugfs(struct adapter *adap) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3139 | { |
| 3140 | int i; |
Santosh Rastapur | 19dd37b | 2013-03-14 05:08:53 +0000 | [diff] [blame] | 3141 | u32 size; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3142 | |
| 3143 | if (IS_ERR_OR_NULL(adap->debugfs_root)) |
| 3144 | return -1; |
| 3145 | |
| 3146 | i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE); |
Santosh Rastapur | 19dd37b | 2013-03-14 05:08:53 +0000 | [diff] [blame] | 3147 | if (i & EDRAM0_ENABLE) { |
| 3148 | size = t4_read_reg(adap, MA_EDRAM0_BAR); |
| 3149 | add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM_SIZE_GET(size)); |
| 3150 | } |
| 3151 | if (i & EDRAM1_ENABLE) { |
| 3152 | size = t4_read_reg(adap, MA_EDRAM1_BAR); |
| 3153 | add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM_SIZE_GET(size)); |
| 3154 | } |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 3155 | if (is_t4(adap->params.chip)) { |
Santosh Rastapur | 19dd37b | 2013-03-14 05:08:53 +0000 | [diff] [blame] | 3156 | size = t4_read_reg(adap, MA_EXT_MEMORY_BAR); |
| 3157 | if (i & EXT_MEM_ENABLE) |
| 3158 | add_debugfs_mem(adap, "mc", MEM_MC, |
| 3159 | EXT_MEM_SIZE_GET(size)); |
| 3160 | } else { |
| 3161 | if (i & EXT_MEM_ENABLE) { |
| 3162 | size = t4_read_reg(adap, MA_EXT_MEMORY_BAR); |
| 3163 | add_debugfs_mem(adap, "mc0", MEM_MC0, |
| 3164 | EXT_MEM_SIZE_GET(size)); |
| 3165 | } |
| 3166 | if (i & EXT_MEM1_ENABLE) { |
| 3167 | size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR); |
| 3168 | add_debugfs_mem(adap, "mc1", MEM_MC1, |
| 3169 | EXT_MEM_SIZE_GET(size)); |
| 3170 | } |
| 3171 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3172 | if (adap->l2t) |
| 3173 | debugfs_create_file("l2t", S_IRUSR, adap->debugfs_root, adap, |
| 3174 | &t4_l2t_fops); |
| 3175 | return 0; |
| 3176 | } |
| 3177 | |
| 3178 | /* |
| 3179 | * upper-layer driver support |
| 3180 | */ |
| 3181 | |
| 3182 | /* |
| 3183 | * Allocate an active-open TID and set it to the supplied value. |
| 3184 | */ |
| 3185 | int cxgb4_alloc_atid(struct tid_info *t, void *data) |
| 3186 | { |
| 3187 | int atid = -1; |
| 3188 | |
| 3189 | spin_lock_bh(&t->atid_lock); |
| 3190 | if (t->afree) { |
| 3191 | union aopen_entry *p = t->afree; |
| 3192 | |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 3193 | atid = (p - t->atid_tab) + t->atid_base; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3194 | t->afree = p->next; |
| 3195 | p->data = data; |
| 3196 | t->atids_in_use++; |
| 3197 | } |
| 3198 | spin_unlock_bh(&t->atid_lock); |
| 3199 | return atid; |
| 3200 | } |
| 3201 | EXPORT_SYMBOL(cxgb4_alloc_atid); |
| 3202 | |
| 3203 | /* |
| 3204 | * Release an active-open TID. |
| 3205 | */ |
| 3206 | void cxgb4_free_atid(struct tid_info *t, unsigned int atid) |
| 3207 | { |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 3208 | union aopen_entry *p = &t->atid_tab[atid - t->atid_base]; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3209 | |
| 3210 | spin_lock_bh(&t->atid_lock); |
| 3211 | p->next = t->afree; |
| 3212 | t->afree = p; |
| 3213 | t->atids_in_use--; |
| 3214 | spin_unlock_bh(&t->atid_lock); |
| 3215 | } |
| 3216 | EXPORT_SYMBOL(cxgb4_free_atid); |
| 3217 | |
| 3218 | /* |
| 3219 | * Allocate a server TID and set it to the supplied value. |
| 3220 | */ |
| 3221 | int cxgb4_alloc_stid(struct tid_info *t, int family, void *data) |
| 3222 | { |
| 3223 | int stid; |
| 3224 | |
| 3225 | spin_lock_bh(&t->stid_lock); |
| 3226 | if (family == PF_INET) { |
| 3227 | stid = find_first_zero_bit(t->stid_bmap, t->nstids); |
| 3228 | if (stid < t->nstids) |
| 3229 | __set_bit(stid, t->stid_bmap); |
| 3230 | else |
| 3231 | stid = -1; |
| 3232 | } else { |
| 3233 | stid = bitmap_find_free_region(t->stid_bmap, t->nstids, 2); |
| 3234 | if (stid < 0) |
| 3235 | stid = -1; |
| 3236 | } |
| 3237 | if (stid >= 0) { |
| 3238 | t->stid_tab[stid].data = data; |
| 3239 | stid += t->stid_base; |
Kumar Sanghvi | 15f63b7 | 2013-12-18 16:38:22 +0530 | [diff] [blame] | 3240 | /* IPv6 requires max of 520 bits or 16 cells in TCAM |
| 3241 | * This is equivalent to 4 TIDs. With CLIP enabled it |
| 3242 | * needs 2 TIDs. |
| 3243 | */ |
| 3244 | if (family == PF_INET) |
| 3245 | t->stids_in_use++; |
| 3246 | else |
| 3247 | t->stids_in_use += 4; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3248 | } |
| 3249 | spin_unlock_bh(&t->stid_lock); |
| 3250 | return stid; |
| 3251 | } |
| 3252 | EXPORT_SYMBOL(cxgb4_alloc_stid); |
| 3253 | |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 3254 | /* Allocate a server filter TID and set it to the supplied value. |
| 3255 | */ |
| 3256 | int cxgb4_alloc_sftid(struct tid_info *t, int family, void *data) |
| 3257 | { |
| 3258 | int stid; |
| 3259 | |
| 3260 | spin_lock_bh(&t->stid_lock); |
| 3261 | if (family == PF_INET) { |
| 3262 | stid = find_next_zero_bit(t->stid_bmap, |
| 3263 | t->nstids + t->nsftids, t->nstids); |
| 3264 | if (stid < (t->nstids + t->nsftids)) |
| 3265 | __set_bit(stid, t->stid_bmap); |
| 3266 | else |
| 3267 | stid = -1; |
| 3268 | } else { |
| 3269 | stid = -1; |
| 3270 | } |
| 3271 | if (stid >= 0) { |
| 3272 | t->stid_tab[stid].data = data; |
Kumar Sanghvi | 470c60c | 2013-12-18 16:38:21 +0530 | [diff] [blame] | 3273 | stid -= t->nstids; |
| 3274 | stid += t->sftid_base; |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 3275 | t->stids_in_use++; |
| 3276 | } |
| 3277 | spin_unlock_bh(&t->stid_lock); |
| 3278 | return stid; |
| 3279 | } |
| 3280 | EXPORT_SYMBOL(cxgb4_alloc_sftid); |
| 3281 | |
| 3282 | /* Release a server TID. |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3283 | */ |
| 3284 | void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family) |
| 3285 | { |
Kumar Sanghvi | 470c60c | 2013-12-18 16:38:21 +0530 | [diff] [blame] | 3286 | /* Is it a server filter TID? */ |
| 3287 | if (t->nsftids && (stid >= t->sftid_base)) { |
| 3288 | stid -= t->sftid_base; |
| 3289 | stid += t->nstids; |
| 3290 | } else { |
| 3291 | stid -= t->stid_base; |
| 3292 | } |
| 3293 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3294 | spin_lock_bh(&t->stid_lock); |
| 3295 | if (family == PF_INET) |
| 3296 | __clear_bit(stid, t->stid_bmap); |
| 3297 | else |
| 3298 | bitmap_release_region(t->stid_bmap, stid, 2); |
| 3299 | t->stid_tab[stid].data = NULL; |
Kumar Sanghvi | 15f63b7 | 2013-12-18 16:38:22 +0530 | [diff] [blame] | 3300 | if (family == PF_INET) |
| 3301 | t->stids_in_use--; |
| 3302 | else |
| 3303 | t->stids_in_use -= 4; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3304 | spin_unlock_bh(&t->stid_lock); |
| 3305 | } |
| 3306 | EXPORT_SYMBOL(cxgb4_free_stid); |
| 3307 | |
| 3308 | /* |
| 3309 | * Populate a TID_RELEASE WR. Caller must properly size the skb. |
| 3310 | */ |
| 3311 | static void mk_tid_release(struct sk_buff *skb, unsigned int chan, |
| 3312 | unsigned int tid) |
| 3313 | { |
| 3314 | struct cpl_tid_release *req; |
| 3315 | |
| 3316 | set_wr_txq(skb, CPL_PRIORITY_SETUP, chan); |
| 3317 | req = (struct cpl_tid_release *)__skb_put(skb, sizeof(*req)); |
| 3318 | INIT_TP_WR(req, tid); |
| 3319 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_TID_RELEASE, tid)); |
| 3320 | } |
| 3321 | |
| 3322 | /* |
| 3323 | * Queue a TID release request and if necessary schedule a work queue to |
| 3324 | * process it. |
| 3325 | */ |
stephen hemminger | 31b9c19 | 2010-10-18 05:39:18 +0000 | [diff] [blame] | 3326 | static void cxgb4_queue_tid_release(struct tid_info *t, unsigned int chan, |
| 3327 | unsigned int tid) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3328 | { |
| 3329 | void **p = &t->tid_tab[tid]; |
| 3330 | struct adapter *adap = container_of(t, struct adapter, tids); |
| 3331 | |
| 3332 | spin_lock_bh(&adap->tid_release_lock); |
| 3333 | *p = adap->tid_release_head; |
| 3334 | /* Low 2 bits encode the Tx channel number */ |
| 3335 | adap->tid_release_head = (void **)((uintptr_t)p | chan); |
| 3336 | if (!adap->tid_release_task_busy) { |
| 3337 | adap->tid_release_task_busy = true; |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3338 | queue_work(workq, &adap->tid_release_task); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3339 | } |
| 3340 | spin_unlock_bh(&adap->tid_release_lock); |
| 3341 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3342 | |
| 3343 | /* |
| 3344 | * Process the list of pending TID release requests. |
| 3345 | */ |
| 3346 | static void process_tid_release_list(struct work_struct *work) |
| 3347 | { |
| 3348 | struct sk_buff *skb; |
| 3349 | struct adapter *adap; |
| 3350 | |
| 3351 | adap = container_of(work, struct adapter, tid_release_task); |
| 3352 | |
| 3353 | spin_lock_bh(&adap->tid_release_lock); |
| 3354 | while (adap->tid_release_head) { |
| 3355 | void **p = adap->tid_release_head; |
| 3356 | unsigned int chan = (uintptr_t)p & 3; |
| 3357 | p = (void *)p - chan; |
| 3358 | |
| 3359 | adap->tid_release_head = *p; |
| 3360 | *p = NULL; |
| 3361 | spin_unlock_bh(&adap->tid_release_lock); |
| 3362 | |
| 3363 | while (!(skb = alloc_skb(sizeof(struct cpl_tid_release), |
| 3364 | GFP_KERNEL))) |
| 3365 | schedule_timeout_uninterruptible(1); |
| 3366 | |
| 3367 | mk_tid_release(skb, chan, p - adap->tids.tid_tab); |
| 3368 | t4_ofld_send(adap, skb); |
| 3369 | spin_lock_bh(&adap->tid_release_lock); |
| 3370 | } |
| 3371 | adap->tid_release_task_busy = false; |
| 3372 | spin_unlock_bh(&adap->tid_release_lock); |
| 3373 | } |
| 3374 | |
| 3375 | /* |
| 3376 | * Release a TID and inform HW. If we are unable to allocate the release |
| 3377 | * message we defer to a work queue. |
| 3378 | */ |
| 3379 | void cxgb4_remove_tid(struct tid_info *t, unsigned int chan, unsigned int tid) |
| 3380 | { |
| 3381 | void *old; |
| 3382 | struct sk_buff *skb; |
| 3383 | struct adapter *adap = container_of(t, struct adapter, tids); |
| 3384 | |
| 3385 | old = t->tid_tab[tid]; |
| 3386 | skb = alloc_skb(sizeof(struct cpl_tid_release), GFP_ATOMIC); |
| 3387 | if (likely(skb)) { |
| 3388 | t->tid_tab[tid] = NULL; |
| 3389 | mk_tid_release(skb, chan, tid); |
| 3390 | t4_ofld_send(adap, skb); |
| 3391 | } else |
| 3392 | cxgb4_queue_tid_release(t, chan, tid); |
| 3393 | if (old) |
| 3394 | atomic_dec(&t->tids_in_use); |
| 3395 | } |
| 3396 | EXPORT_SYMBOL(cxgb4_remove_tid); |
| 3397 | |
| 3398 | /* |
| 3399 | * Allocate and initialize the TID tables. Returns 0 on success. |
| 3400 | */ |
| 3401 | static int tid_init(struct tid_info *t) |
| 3402 | { |
| 3403 | size_t size; |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 3404 | unsigned int stid_bmap_size; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3405 | unsigned int natids = t->natids; |
Kumar Sanghvi | b6f8eae | 2013-12-18 16:38:19 +0530 | [diff] [blame] | 3406 | struct adapter *adap = container_of(t, struct adapter, tids); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3407 | |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 3408 | stid_bmap_size = BITS_TO_LONGS(t->nstids + t->nsftids); |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 3409 | size = t->ntids * sizeof(*t->tid_tab) + |
| 3410 | natids * sizeof(*t->atid_tab) + |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3411 | t->nstids * sizeof(*t->stid_tab) + |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 3412 | t->nsftids * sizeof(*t->stid_tab) + |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 3413 | stid_bmap_size * sizeof(long) + |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 3414 | t->nftids * sizeof(*t->ftid_tab) + |
| 3415 | t->nsftids * sizeof(*t->ftid_tab); |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 3416 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3417 | t->tid_tab = t4_alloc_mem(size); |
| 3418 | if (!t->tid_tab) |
| 3419 | return -ENOMEM; |
| 3420 | |
| 3421 | t->atid_tab = (union aopen_entry *)&t->tid_tab[t->ntids]; |
| 3422 | t->stid_tab = (struct serv_entry *)&t->atid_tab[natids]; |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 3423 | t->stid_bmap = (unsigned long *)&t->stid_tab[t->nstids + t->nsftids]; |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 3424 | t->ftid_tab = (struct filter_entry *)&t->stid_bmap[stid_bmap_size]; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3425 | spin_lock_init(&t->stid_lock); |
| 3426 | spin_lock_init(&t->atid_lock); |
| 3427 | |
| 3428 | t->stids_in_use = 0; |
| 3429 | t->afree = NULL; |
| 3430 | t->atids_in_use = 0; |
| 3431 | atomic_set(&t->tids_in_use, 0); |
| 3432 | |
| 3433 | /* Setup the free list for atid_tab and clear the stid bitmap. */ |
| 3434 | if (natids) { |
| 3435 | while (--natids) |
| 3436 | t->atid_tab[natids - 1].next = &t->atid_tab[natids]; |
| 3437 | t->afree = t->atid_tab; |
| 3438 | } |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 3439 | bitmap_zero(t->stid_bmap, t->nstids + t->nsftids); |
Kumar Sanghvi | b6f8eae | 2013-12-18 16:38:19 +0530 | [diff] [blame] | 3440 | /* Reserve stid 0 for T4/T5 adapters */ |
| 3441 | if (!t->stid_base && |
| 3442 | (is_t4(adap->params.chip) || is_t5(adap->params.chip))) |
| 3443 | __set_bit(0, t->stid_bmap); |
| 3444 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3445 | return 0; |
| 3446 | } |
| 3447 | |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 3448 | static int cxgb4_clip_get(const struct net_device *dev, |
| 3449 | const struct in6_addr *lip) |
| 3450 | { |
| 3451 | struct adapter *adap; |
| 3452 | struct fw_clip_cmd c; |
| 3453 | |
| 3454 | adap = netdev2adap(dev); |
| 3455 | memset(&c, 0, sizeof(c)); |
| 3456 | c.op_to_write = htonl(FW_CMD_OP(FW_CLIP_CMD) | |
| 3457 | FW_CMD_REQUEST | FW_CMD_WRITE); |
| 3458 | c.alloc_to_len16 = htonl(F_FW_CLIP_CMD_ALLOC | FW_LEN16(c)); |
Joe Perches | 12f2a47 | 2014-03-24 10:45:12 -0700 | [diff] [blame] | 3459 | c.ip_hi = *(__be64 *)(lip->s6_addr); |
| 3460 | c.ip_lo = *(__be64 *)(lip->s6_addr + 8); |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 3461 | return t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, false); |
| 3462 | } |
| 3463 | |
| 3464 | static int cxgb4_clip_release(const struct net_device *dev, |
| 3465 | const struct in6_addr *lip) |
| 3466 | { |
| 3467 | struct adapter *adap; |
| 3468 | struct fw_clip_cmd c; |
| 3469 | |
| 3470 | adap = netdev2adap(dev); |
| 3471 | memset(&c, 0, sizeof(c)); |
| 3472 | c.op_to_write = htonl(FW_CMD_OP(FW_CLIP_CMD) | |
| 3473 | FW_CMD_REQUEST | FW_CMD_READ); |
| 3474 | c.alloc_to_len16 = htonl(F_FW_CLIP_CMD_FREE | FW_LEN16(c)); |
Joe Perches | 12f2a47 | 2014-03-24 10:45:12 -0700 | [diff] [blame] | 3475 | c.ip_hi = *(__be64 *)(lip->s6_addr); |
| 3476 | c.ip_lo = *(__be64 *)(lip->s6_addr + 8); |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 3477 | return t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, false); |
| 3478 | } |
| 3479 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3480 | /** |
| 3481 | * cxgb4_create_server - create an IP server |
| 3482 | * @dev: the device |
| 3483 | * @stid: the server TID |
| 3484 | * @sip: local IP address to bind server to |
| 3485 | * @sport: the server's TCP port |
| 3486 | * @queue: queue to direct messages from this server to |
| 3487 | * |
| 3488 | * Create an IP server for the given port and address. |
| 3489 | * Returns <0 on error and one of the %NET_XMIT_* values on success. |
| 3490 | */ |
| 3491 | int cxgb4_create_server(const struct net_device *dev, unsigned int stid, |
Vipul Pandya | 793dad9 | 2012-12-10 09:30:56 +0000 | [diff] [blame] | 3492 | __be32 sip, __be16 sport, __be16 vlan, |
| 3493 | unsigned int queue) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3494 | { |
| 3495 | unsigned int chan; |
| 3496 | struct sk_buff *skb; |
| 3497 | struct adapter *adap; |
| 3498 | struct cpl_pass_open_req *req; |
Vipul Pandya | 80f40c1 | 2013-07-04 16:10:45 +0530 | [diff] [blame] | 3499 | int ret; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3500 | |
| 3501 | skb = alloc_skb(sizeof(*req), GFP_KERNEL); |
| 3502 | if (!skb) |
| 3503 | return -ENOMEM; |
| 3504 | |
| 3505 | adap = netdev2adap(dev); |
| 3506 | req = (struct cpl_pass_open_req *)__skb_put(skb, sizeof(*req)); |
| 3507 | INIT_TP_WR(req, 0); |
| 3508 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_PASS_OPEN_REQ, stid)); |
| 3509 | req->local_port = sport; |
| 3510 | req->peer_port = htons(0); |
| 3511 | req->local_ip = sip; |
| 3512 | req->peer_ip = htonl(0); |
Dimitris Michailidis | e46dab4 | 2010-08-23 17:20:58 +0000 | [diff] [blame] | 3513 | chan = rxq_to_chan(&adap->sge, queue); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3514 | req->opt0 = cpu_to_be64(TX_CHAN(chan)); |
| 3515 | req->opt1 = cpu_to_be64(CONN_POLICY_ASK | |
| 3516 | SYN_RSS_ENABLE | SYN_RSS_QUEUE(queue)); |
Vipul Pandya | 80f40c1 | 2013-07-04 16:10:45 +0530 | [diff] [blame] | 3517 | ret = t4_mgmt_tx(adap, skb); |
| 3518 | return net_xmit_eval(ret); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3519 | } |
| 3520 | EXPORT_SYMBOL(cxgb4_create_server); |
| 3521 | |
Vipul Pandya | 80f40c1 | 2013-07-04 16:10:45 +0530 | [diff] [blame] | 3522 | /* cxgb4_create_server6 - create an IPv6 server |
| 3523 | * @dev: the device |
| 3524 | * @stid: the server TID |
| 3525 | * @sip: local IPv6 address to bind server to |
| 3526 | * @sport: the server's TCP port |
| 3527 | * @queue: queue to direct messages from this server to |
| 3528 | * |
| 3529 | * Create an IPv6 server for the given port and address. |
| 3530 | * Returns <0 on error and one of the %NET_XMIT_* values on success. |
| 3531 | */ |
| 3532 | int cxgb4_create_server6(const struct net_device *dev, unsigned int stid, |
| 3533 | const struct in6_addr *sip, __be16 sport, |
| 3534 | unsigned int queue) |
| 3535 | { |
| 3536 | unsigned int chan; |
| 3537 | struct sk_buff *skb; |
| 3538 | struct adapter *adap; |
| 3539 | struct cpl_pass_open_req6 *req; |
| 3540 | int ret; |
| 3541 | |
| 3542 | skb = alloc_skb(sizeof(*req), GFP_KERNEL); |
| 3543 | if (!skb) |
| 3544 | return -ENOMEM; |
| 3545 | |
| 3546 | adap = netdev2adap(dev); |
| 3547 | req = (struct cpl_pass_open_req6 *)__skb_put(skb, sizeof(*req)); |
| 3548 | INIT_TP_WR(req, 0); |
| 3549 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_PASS_OPEN_REQ6, stid)); |
| 3550 | req->local_port = sport; |
| 3551 | req->peer_port = htons(0); |
| 3552 | req->local_ip_hi = *(__be64 *)(sip->s6_addr); |
| 3553 | req->local_ip_lo = *(__be64 *)(sip->s6_addr + 8); |
| 3554 | req->peer_ip_hi = cpu_to_be64(0); |
| 3555 | req->peer_ip_lo = cpu_to_be64(0); |
| 3556 | chan = rxq_to_chan(&adap->sge, queue); |
| 3557 | req->opt0 = cpu_to_be64(TX_CHAN(chan)); |
| 3558 | req->opt1 = cpu_to_be64(CONN_POLICY_ASK | |
| 3559 | SYN_RSS_ENABLE | SYN_RSS_QUEUE(queue)); |
| 3560 | ret = t4_mgmt_tx(adap, skb); |
| 3561 | return net_xmit_eval(ret); |
| 3562 | } |
| 3563 | EXPORT_SYMBOL(cxgb4_create_server6); |
| 3564 | |
| 3565 | int cxgb4_remove_server(const struct net_device *dev, unsigned int stid, |
| 3566 | unsigned int queue, bool ipv6) |
| 3567 | { |
| 3568 | struct sk_buff *skb; |
| 3569 | struct adapter *adap; |
| 3570 | struct cpl_close_listsvr_req *req; |
| 3571 | int ret; |
| 3572 | |
| 3573 | adap = netdev2adap(dev); |
| 3574 | |
| 3575 | skb = alloc_skb(sizeof(*req), GFP_KERNEL); |
| 3576 | if (!skb) |
| 3577 | return -ENOMEM; |
| 3578 | |
| 3579 | req = (struct cpl_close_listsvr_req *)__skb_put(skb, sizeof(*req)); |
| 3580 | INIT_TP_WR(req, 0); |
| 3581 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_CLOSE_LISTSRV_REQ, stid)); |
| 3582 | req->reply_ctrl = htons(NO_REPLY(0) | (ipv6 ? LISTSVR_IPV6(1) : |
| 3583 | LISTSVR_IPV6(0)) | QUEUENO(queue)); |
| 3584 | ret = t4_mgmt_tx(adap, skb); |
| 3585 | return net_xmit_eval(ret); |
| 3586 | } |
| 3587 | EXPORT_SYMBOL(cxgb4_remove_server); |
| 3588 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3589 | /** |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3590 | * cxgb4_best_mtu - find the entry in the MTU table closest to an MTU |
| 3591 | * @mtus: the HW MTU table |
| 3592 | * @mtu: the target MTU |
| 3593 | * @idx: index of selected entry in the MTU table |
| 3594 | * |
| 3595 | * Returns the index and the value in the HW MTU table that is closest to |
| 3596 | * but does not exceed @mtu, unless @mtu is smaller than any value in the |
| 3597 | * table, in which case that smallest available value is selected. |
| 3598 | */ |
| 3599 | unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu, |
| 3600 | unsigned int *idx) |
| 3601 | { |
| 3602 | unsigned int i = 0; |
| 3603 | |
| 3604 | while (i < NMTUS - 1 && mtus[i + 1] <= mtu) |
| 3605 | ++i; |
| 3606 | if (idx) |
| 3607 | *idx = i; |
| 3608 | return mtus[i]; |
| 3609 | } |
| 3610 | EXPORT_SYMBOL(cxgb4_best_mtu); |
| 3611 | |
| 3612 | /** |
Hariprasad Shenai | 92e7ae7 | 2014-06-06 21:40:43 +0530 | [diff] [blame] | 3613 | * cxgb4_best_aligned_mtu - find best MTU, [hopefully] data size aligned |
| 3614 | * @mtus: the HW MTU table |
| 3615 | * @header_size: Header Size |
| 3616 | * @data_size_max: maximum Data Segment Size |
| 3617 | * @data_size_align: desired Data Segment Size Alignment (2^N) |
| 3618 | * @mtu_idxp: HW MTU Table Index return value pointer (possibly NULL) |
| 3619 | * |
| 3620 | * Similar to cxgb4_best_mtu() but instead of searching the Hardware |
| 3621 | * MTU Table based solely on a Maximum MTU parameter, we break that |
| 3622 | * parameter up into a Header Size and Maximum Data Segment Size, and |
| 3623 | * provide a desired Data Segment Size Alignment. If we find an MTU in |
| 3624 | * the Hardware MTU Table which will result in a Data Segment Size with |
| 3625 | * the requested alignment _and_ that MTU isn't "too far" from the |
| 3626 | * closest MTU, then we'll return that rather than the closest MTU. |
| 3627 | */ |
| 3628 | unsigned int cxgb4_best_aligned_mtu(const unsigned short *mtus, |
| 3629 | unsigned short header_size, |
| 3630 | unsigned short data_size_max, |
| 3631 | unsigned short data_size_align, |
| 3632 | unsigned int *mtu_idxp) |
| 3633 | { |
| 3634 | unsigned short max_mtu = header_size + data_size_max; |
| 3635 | unsigned short data_size_align_mask = data_size_align - 1; |
| 3636 | int mtu_idx, aligned_mtu_idx; |
| 3637 | |
| 3638 | /* Scan the MTU Table till we find an MTU which is larger than our |
| 3639 | * Maximum MTU or we reach the end of the table. Along the way, |
| 3640 | * record the last MTU found, if any, which will result in a Data |
| 3641 | * Segment Length matching the requested alignment. |
| 3642 | */ |
| 3643 | for (mtu_idx = 0, aligned_mtu_idx = -1; mtu_idx < NMTUS; mtu_idx++) { |
| 3644 | unsigned short data_size = mtus[mtu_idx] - header_size; |
| 3645 | |
| 3646 | /* If this MTU minus the Header Size would result in a |
| 3647 | * Data Segment Size of the desired alignment, remember it. |
| 3648 | */ |
| 3649 | if ((data_size & data_size_align_mask) == 0) |
| 3650 | aligned_mtu_idx = mtu_idx; |
| 3651 | |
| 3652 | /* If we're not at the end of the Hardware MTU Table and the |
| 3653 | * next element is larger than our Maximum MTU, drop out of |
| 3654 | * the loop. |
| 3655 | */ |
| 3656 | if (mtu_idx+1 < NMTUS && mtus[mtu_idx+1] > max_mtu) |
| 3657 | break; |
| 3658 | } |
| 3659 | |
| 3660 | /* If we fell out of the loop because we ran to the end of the table, |
| 3661 | * then we just have to use the last [largest] entry. |
| 3662 | */ |
| 3663 | if (mtu_idx == NMTUS) |
| 3664 | mtu_idx--; |
| 3665 | |
| 3666 | /* If we found an MTU which resulted in the requested Data Segment |
| 3667 | * Length alignment and that's "not far" from the largest MTU which is |
| 3668 | * less than or equal to the maximum MTU, then use that. |
| 3669 | */ |
| 3670 | if (aligned_mtu_idx >= 0 && |
| 3671 | mtu_idx - aligned_mtu_idx <= 1) |
| 3672 | mtu_idx = aligned_mtu_idx; |
| 3673 | |
| 3674 | /* If the caller has passed in an MTU Index pointer, pass the |
| 3675 | * MTU Index back. Return the MTU value. |
| 3676 | */ |
| 3677 | if (mtu_idxp) |
| 3678 | *mtu_idxp = mtu_idx; |
| 3679 | return mtus[mtu_idx]; |
| 3680 | } |
| 3681 | EXPORT_SYMBOL(cxgb4_best_aligned_mtu); |
| 3682 | |
| 3683 | /** |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3684 | * cxgb4_port_chan - get the HW channel of a port |
| 3685 | * @dev: the net device for the port |
| 3686 | * |
| 3687 | * Return the HW Tx channel of the given port. |
| 3688 | */ |
| 3689 | unsigned int cxgb4_port_chan(const struct net_device *dev) |
| 3690 | { |
| 3691 | return netdev2pinfo(dev)->tx_chan; |
| 3692 | } |
| 3693 | EXPORT_SYMBOL(cxgb4_port_chan); |
| 3694 | |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 3695 | unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo) |
| 3696 | { |
| 3697 | struct adapter *adap = netdev2adap(dev); |
Santosh Rastapur | 2cc301d | 2013-03-14 05:08:52 +0000 | [diff] [blame] | 3698 | u32 v1, v2, lp_count, hp_count; |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 3699 | |
Santosh Rastapur | 2cc301d | 2013-03-14 05:08:52 +0000 | [diff] [blame] | 3700 | v1 = t4_read_reg(adap, A_SGE_DBFIFO_STATUS); |
| 3701 | v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2); |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 3702 | if (is_t4(adap->params.chip)) { |
Santosh Rastapur | 2cc301d | 2013-03-14 05:08:52 +0000 | [diff] [blame] | 3703 | lp_count = G_LP_COUNT(v1); |
| 3704 | hp_count = G_HP_COUNT(v1); |
| 3705 | } else { |
| 3706 | lp_count = G_LP_COUNT_T5(v1); |
| 3707 | hp_count = G_HP_COUNT_T5(v2); |
| 3708 | } |
| 3709 | return lpfifo ? lp_count : hp_count; |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 3710 | } |
| 3711 | EXPORT_SYMBOL(cxgb4_dbfifo_count); |
| 3712 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3713 | /** |
| 3714 | * cxgb4_port_viid - get the VI id of a port |
| 3715 | * @dev: the net device for the port |
| 3716 | * |
| 3717 | * Return the VI id of the given port. |
| 3718 | */ |
| 3719 | unsigned int cxgb4_port_viid(const struct net_device *dev) |
| 3720 | { |
| 3721 | return netdev2pinfo(dev)->viid; |
| 3722 | } |
| 3723 | EXPORT_SYMBOL(cxgb4_port_viid); |
| 3724 | |
| 3725 | /** |
| 3726 | * cxgb4_port_idx - get the index of a port |
| 3727 | * @dev: the net device for the port |
| 3728 | * |
| 3729 | * Return the index of the given port. |
| 3730 | */ |
| 3731 | unsigned int cxgb4_port_idx(const struct net_device *dev) |
| 3732 | { |
| 3733 | return netdev2pinfo(dev)->port_id; |
| 3734 | } |
| 3735 | EXPORT_SYMBOL(cxgb4_port_idx); |
| 3736 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3737 | void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4, |
| 3738 | struct tp_tcp_stats *v6) |
| 3739 | { |
| 3740 | struct adapter *adap = pci_get_drvdata(pdev); |
| 3741 | |
| 3742 | spin_lock(&adap->stats_lock); |
| 3743 | t4_tp_get_tcp_stats(adap, v4, v6); |
| 3744 | spin_unlock(&adap->stats_lock); |
| 3745 | } |
| 3746 | EXPORT_SYMBOL(cxgb4_get_tcp_stats); |
| 3747 | |
| 3748 | void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask, |
| 3749 | const unsigned int *pgsz_order) |
| 3750 | { |
| 3751 | struct adapter *adap = netdev2adap(dev); |
| 3752 | |
| 3753 | t4_write_reg(adap, ULP_RX_ISCSI_TAGMASK, tag_mask); |
| 3754 | t4_write_reg(adap, ULP_RX_ISCSI_PSZ, HPZ0(pgsz_order[0]) | |
| 3755 | HPZ1(pgsz_order[1]) | HPZ2(pgsz_order[2]) | |
| 3756 | HPZ3(pgsz_order[3])); |
| 3757 | } |
| 3758 | EXPORT_SYMBOL(cxgb4_iscsi_init); |
| 3759 | |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3760 | int cxgb4_flush_eq_cache(struct net_device *dev) |
| 3761 | { |
| 3762 | struct adapter *adap = netdev2adap(dev); |
| 3763 | int ret; |
| 3764 | |
| 3765 | ret = t4_fwaddrspace_write(adap, adap->mbox, |
| 3766 | 0xe1000000 + A_SGE_CTXT_CMD, 0x20000000); |
| 3767 | return ret; |
| 3768 | } |
| 3769 | EXPORT_SYMBOL(cxgb4_flush_eq_cache); |
| 3770 | |
| 3771 | static int read_eq_indices(struct adapter *adap, u16 qid, u16 *pidx, u16 *cidx) |
| 3772 | { |
| 3773 | u32 addr = t4_read_reg(adap, A_SGE_DBQ_CTXT_BADDR) + 24 * qid + 8; |
| 3774 | __be64 indices; |
| 3775 | int ret; |
| 3776 | |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 3777 | spin_lock(&adap->win0_lock); |
| 3778 | ret = t4_memory_rw(adap, 0, MEM_EDC0, addr, |
| 3779 | sizeof(indices), (__be32 *)&indices, |
| 3780 | T4_MEMORY_READ); |
| 3781 | spin_unlock(&adap->win0_lock); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3782 | if (!ret) { |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 3783 | *cidx = (be64_to_cpu(indices) >> 25) & 0xffff; |
| 3784 | *pidx = (be64_to_cpu(indices) >> 9) & 0xffff; |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3785 | } |
| 3786 | return ret; |
| 3787 | } |
| 3788 | |
| 3789 | int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, |
| 3790 | u16 size) |
| 3791 | { |
| 3792 | struct adapter *adap = netdev2adap(dev); |
| 3793 | u16 hw_pidx, hw_cidx; |
| 3794 | int ret; |
| 3795 | |
| 3796 | ret = read_eq_indices(adap, qid, &hw_pidx, &hw_cidx); |
| 3797 | if (ret) |
| 3798 | goto out; |
| 3799 | |
| 3800 | if (pidx != hw_pidx) { |
| 3801 | u16 delta; |
| 3802 | |
| 3803 | if (pidx >= hw_pidx) |
| 3804 | delta = pidx - hw_pidx; |
| 3805 | else |
| 3806 | delta = size - hw_pidx + pidx; |
| 3807 | wmb(); |
Vipul Pandya | 840f300 | 2012-09-05 02:01:55 +0000 | [diff] [blame] | 3808 | t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL), |
| 3809 | QID(qid) | PIDX(delta)); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3810 | } |
| 3811 | out: |
| 3812 | return ret; |
| 3813 | } |
| 3814 | EXPORT_SYMBOL(cxgb4_sync_txq_pidx); |
| 3815 | |
Vipul Pandya | 3cbdb92 | 2013-03-14 05:08:59 +0000 | [diff] [blame] | 3816 | void cxgb4_disable_db_coalescing(struct net_device *dev) |
| 3817 | { |
| 3818 | struct adapter *adap; |
| 3819 | |
| 3820 | adap = netdev2adap(dev); |
| 3821 | t4_set_reg_field(adap, A_SGE_DOORBELL_CONTROL, F_NOCOALESCE, |
| 3822 | F_NOCOALESCE); |
| 3823 | } |
| 3824 | EXPORT_SYMBOL(cxgb4_disable_db_coalescing); |
| 3825 | |
| 3826 | void cxgb4_enable_db_coalescing(struct net_device *dev) |
| 3827 | { |
| 3828 | struct adapter *adap; |
| 3829 | |
| 3830 | adap = netdev2adap(dev); |
| 3831 | t4_set_reg_field(adap, A_SGE_DOORBELL_CONTROL, F_NOCOALESCE, 0); |
| 3832 | } |
| 3833 | EXPORT_SYMBOL(cxgb4_enable_db_coalescing); |
| 3834 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3835 | static struct pci_driver cxgb4_driver; |
| 3836 | |
| 3837 | static void check_neigh_update(struct neighbour *neigh) |
| 3838 | { |
| 3839 | const struct device *parent; |
| 3840 | const struct net_device *netdev = neigh->dev; |
| 3841 | |
| 3842 | if (netdev->priv_flags & IFF_802_1Q_VLAN) |
| 3843 | netdev = vlan_dev_real_dev(netdev); |
| 3844 | parent = netdev->dev.parent; |
| 3845 | if (parent && parent->driver == &cxgb4_driver.driver) |
| 3846 | t4_l2t_update(dev_get_drvdata(parent), neigh); |
| 3847 | } |
| 3848 | |
| 3849 | static int netevent_cb(struct notifier_block *nb, unsigned long event, |
| 3850 | void *data) |
| 3851 | { |
| 3852 | switch (event) { |
| 3853 | case NETEVENT_NEIGH_UPDATE: |
| 3854 | check_neigh_update(data); |
| 3855 | break; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 3856 | case NETEVENT_REDIRECT: |
| 3857 | default: |
| 3858 | break; |
| 3859 | } |
| 3860 | return 0; |
| 3861 | } |
| 3862 | |
| 3863 | static bool netevent_registered; |
| 3864 | static struct notifier_block cxgb4_netevent_nb = { |
| 3865 | .notifier_call = netevent_cb |
| 3866 | }; |
| 3867 | |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3868 | static void drain_db_fifo(struct adapter *adap, int usecs) |
| 3869 | { |
Santosh Rastapur | 2cc301d | 2013-03-14 05:08:52 +0000 | [diff] [blame] | 3870 | u32 v1, v2, lp_count, hp_count; |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3871 | |
| 3872 | do { |
Santosh Rastapur | 2cc301d | 2013-03-14 05:08:52 +0000 | [diff] [blame] | 3873 | v1 = t4_read_reg(adap, A_SGE_DBFIFO_STATUS); |
| 3874 | v2 = t4_read_reg(adap, SGE_DBFIFO_STATUS2); |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 3875 | if (is_t4(adap->params.chip)) { |
Santosh Rastapur | 2cc301d | 2013-03-14 05:08:52 +0000 | [diff] [blame] | 3876 | lp_count = G_LP_COUNT(v1); |
| 3877 | hp_count = G_HP_COUNT(v1); |
| 3878 | } else { |
| 3879 | lp_count = G_LP_COUNT_T5(v1); |
| 3880 | hp_count = G_HP_COUNT_T5(v2); |
| 3881 | } |
| 3882 | |
| 3883 | if (lp_count == 0 && hp_count == 0) |
| 3884 | break; |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3885 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 3886 | schedule_timeout(usecs_to_jiffies(usecs)); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3887 | } while (1); |
| 3888 | } |
| 3889 | |
| 3890 | static void disable_txq_db(struct sge_txq *q) |
| 3891 | { |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 3892 | unsigned long flags; |
| 3893 | |
| 3894 | spin_lock_irqsave(&q->db_lock, flags); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3895 | q->db_disabled = 1; |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 3896 | spin_unlock_irqrestore(&q->db_lock, flags); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3897 | } |
| 3898 | |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 3899 | static void enable_txq_db(struct adapter *adap, struct sge_txq *q) |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3900 | { |
| 3901 | spin_lock_irq(&q->db_lock); |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 3902 | if (q->db_pidx_inc) { |
| 3903 | /* Make sure that all writes to the TX descriptors |
| 3904 | * are committed before we tell HW about them. |
| 3905 | */ |
| 3906 | wmb(); |
| 3907 | t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL), |
| 3908 | QID(q->cntxt_id) | PIDX(q->db_pidx_inc)); |
| 3909 | q->db_pidx_inc = 0; |
| 3910 | } |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3911 | q->db_disabled = 0; |
| 3912 | spin_unlock_irq(&q->db_lock); |
| 3913 | } |
| 3914 | |
| 3915 | static void disable_dbs(struct adapter *adap) |
| 3916 | { |
| 3917 | int i; |
| 3918 | |
| 3919 | for_each_ethrxq(&adap->sge, i) |
| 3920 | disable_txq_db(&adap->sge.ethtxq[i].q); |
| 3921 | for_each_ofldrxq(&adap->sge, i) |
| 3922 | disable_txq_db(&adap->sge.ofldtxq[i].q); |
| 3923 | for_each_port(adap, i) |
| 3924 | disable_txq_db(&adap->sge.ctrlq[i].q); |
| 3925 | } |
| 3926 | |
| 3927 | static void enable_dbs(struct adapter *adap) |
| 3928 | { |
| 3929 | int i; |
| 3930 | |
| 3931 | for_each_ethrxq(&adap->sge, i) |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 3932 | enable_txq_db(adap, &adap->sge.ethtxq[i].q); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3933 | for_each_ofldrxq(&adap->sge, i) |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 3934 | enable_txq_db(adap, &adap->sge.ofldtxq[i].q); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3935 | for_each_port(adap, i) |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 3936 | enable_txq_db(adap, &adap->sge.ctrlq[i].q); |
| 3937 | } |
| 3938 | |
| 3939 | static void notify_rdma_uld(struct adapter *adap, enum cxgb4_control cmd) |
| 3940 | { |
| 3941 | if (adap->uld_handle[CXGB4_ULD_RDMA]) |
| 3942 | ulds[CXGB4_ULD_RDMA].control(adap->uld_handle[CXGB4_ULD_RDMA], |
| 3943 | cmd); |
| 3944 | } |
| 3945 | |
| 3946 | static void process_db_full(struct work_struct *work) |
| 3947 | { |
| 3948 | struct adapter *adap; |
| 3949 | |
| 3950 | adap = container_of(work, struct adapter, db_full_task); |
| 3951 | |
| 3952 | drain_db_fifo(adap, dbfifo_drain_delay); |
| 3953 | enable_dbs(adap); |
| 3954 | notify_rdma_uld(adap, CXGB4_CONTROL_DB_EMPTY); |
| 3955 | t4_set_reg_field(adap, SGE_INT_ENABLE3, |
| 3956 | DBFIFO_HP_INT | DBFIFO_LP_INT, |
| 3957 | DBFIFO_HP_INT | DBFIFO_LP_INT); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3958 | } |
| 3959 | |
| 3960 | static void sync_txq_pidx(struct adapter *adap, struct sge_txq *q) |
| 3961 | { |
| 3962 | u16 hw_pidx, hw_cidx; |
| 3963 | int ret; |
| 3964 | |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 3965 | spin_lock_irq(&q->db_lock); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3966 | ret = read_eq_indices(adap, (u16)q->cntxt_id, &hw_pidx, &hw_cidx); |
| 3967 | if (ret) |
| 3968 | goto out; |
| 3969 | if (q->db_pidx != hw_pidx) { |
| 3970 | u16 delta; |
| 3971 | |
| 3972 | if (q->db_pidx >= hw_pidx) |
| 3973 | delta = q->db_pidx - hw_pidx; |
| 3974 | else |
| 3975 | delta = q->size - hw_pidx + q->db_pidx; |
| 3976 | wmb(); |
Vipul Pandya | 840f300 | 2012-09-05 02:01:55 +0000 | [diff] [blame] | 3977 | t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL), |
| 3978 | QID(q->cntxt_id) | PIDX(delta)); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3979 | } |
| 3980 | out: |
| 3981 | q->db_disabled = 0; |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 3982 | q->db_pidx_inc = 0; |
| 3983 | spin_unlock_irq(&q->db_lock); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 3984 | if (ret) |
| 3985 | CH_WARN(adap, "DB drop recovery failed.\n"); |
| 3986 | } |
| 3987 | static void recover_all_queues(struct adapter *adap) |
| 3988 | { |
| 3989 | int i; |
| 3990 | |
| 3991 | for_each_ethrxq(&adap->sge, i) |
| 3992 | sync_txq_pidx(adap, &adap->sge.ethtxq[i].q); |
| 3993 | for_each_ofldrxq(&adap->sge, i) |
| 3994 | sync_txq_pidx(adap, &adap->sge.ofldtxq[i].q); |
| 3995 | for_each_port(adap, i) |
| 3996 | sync_txq_pidx(adap, &adap->sge.ctrlq[i].q); |
| 3997 | } |
| 3998 | |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 3999 | static void process_db_drop(struct work_struct *work) |
| 4000 | { |
| 4001 | struct adapter *adap; |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 4002 | |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 4003 | adap = container_of(work, struct adapter, db_drop_task); |
| 4004 | |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 4005 | if (is_t4(adap->params.chip)) { |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 4006 | drain_db_fifo(adap, dbfifo_drain_delay); |
Santosh Rastapur | 2cc301d | 2013-03-14 05:08:52 +0000 | [diff] [blame] | 4007 | notify_rdma_uld(adap, CXGB4_CONTROL_DB_DROP); |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 4008 | drain_db_fifo(adap, dbfifo_drain_delay); |
Santosh Rastapur | 2cc301d | 2013-03-14 05:08:52 +0000 | [diff] [blame] | 4009 | recover_all_queues(adap); |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 4010 | drain_db_fifo(adap, dbfifo_drain_delay); |
Santosh Rastapur | 2cc301d | 2013-03-14 05:08:52 +0000 | [diff] [blame] | 4011 | enable_dbs(adap); |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 4012 | notify_rdma_uld(adap, CXGB4_CONTROL_DB_EMPTY); |
Santosh Rastapur | 2cc301d | 2013-03-14 05:08:52 +0000 | [diff] [blame] | 4013 | } else { |
| 4014 | u32 dropped_db = t4_read_reg(adap, 0x010ac); |
| 4015 | u16 qid = (dropped_db >> 15) & 0x1ffff; |
| 4016 | u16 pidx_inc = dropped_db & 0x1fff; |
| 4017 | unsigned int s_qpp; |
| 4018 | unsigned short udb_density; |
| 4019 | unsigned long qpshift; |
| 4020 | int page; |
| 4021 | u32 udb; |
| 4022 | |
| 4023 | dev_warn(adap->pdev_dev, |
| 4024 | "Dropped DB 0x%x qid %d bar2 %d coalesce %d pidx %d\n", |
| 4025 | dropped_db, qid, |
| 4026 | (dropped_db >> 14) & 1, |
| 4027 | (dropped_db >> 13) & 1, |
| 4028 | pidx_inc); |
| 4029 | |
| 4030 | drain_db_fifo(adap, 1); |
| 4031 | |
| 4032 | s_qpp = QUEUESPERPAGEPF1 * adap->fn; |
| 4033 | udb_density = 1 << QUEUESPERPAGEPF0_GET(t4_read_reg(adap, |
| 4034 | SGE_EGRESS_QUEUES_PER_PAGE_PF) >> s_qpp); |
| 4035 | qpshift = PAGE_SHIFT - ilog2(udb_density); |
| 4036 | udb = qid << qpshift; |
| 4037 | udb &= PAGE_MASK; |
| 4038 | page = udb / PAGE_SIZE; |
| 4039 | udb += (qid - (page * udb_density)) * 128; |
| 4040 | |
| 4041 | writel(PIDX(pidx_inc), adap->bar2 + udb + 8); |
| 4042 | |
| 4043 | /* Re-enable BAR2 WC */ |
| 4044 | t4_set_reg_field(adap, 0x10b0, 1<<15, 1<<15); |
| 4045 | } |
| 4046 | |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 4047 | t4_set_reg_field(adap, A_SGE_DOORBELL_CONTROL, F_DROPPED_DB, 0); |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 4048 | } |
| 4049 | |
| 4050 | void t4_db_full(struct adapter *adap) |
| 4051 | { |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 4052 | if (is_t4(adap->params.chip)) { |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 4053 | disable_dbs(adap); |
| 4054 | notify_rdma_uld(adap, CXGB4_CONTROL_DB_FULL); |
Santosh Rastapur | 2cc301d | 2013-03-14 05:08:52 +0000 | [diff] [blame] | 4055 | t4_set_reg_field(adap, SGE_INT_ENABLE3, |
| 4056 | DBFIFO_HP_INT | DBFIFO_LP_INT, 0); |
| 4057 | queue_work(workq, &adap->db_full_task); |
| 4058 | } |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 4059 | } |
| 4060 | |
| 4061 | void t4_db_dropped(struct adapter *adap) |
| 4062 | { |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 4063 | if (is_t4(adap->params.chip)) { |
| 4064 | disable_dbs(adap); |
| 4065 | notify_rdma_uld(adap, CXGB4_CONTROL_DB_FULL); |
| 4066 | } |
| 4067 | queue_work(workq, &adap->db_drop_task); |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 4068 | } |
| 4069 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4070 | static void uld_attach(struct adapter *adap, unsigned int uld) |
| 4071 | { |
| 4072 | void *handle; |
| 4073 | struct cxgb4_lld_info lli; |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4074 | unsigned short i; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4075 | |
| 4076 | lli.pdev = adap->pdev; |
Hariprasad Shenai | 35b1de5 | 2014-06-27 19:23:47 +0530 | [diff] [blame] | 4077 | lli.pf = adap->fn; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4078 | lli.l2t = adap->l2t; |
| 4079 | lli.tids = &adap->tids; |
| 4080 | lli.ports = adap->port; |
| 4081 | lli.vr = &adap->vres; |
| 4082 | lli.mtus = adap->params.mtus; |
| 4083 | if (uld == CXGB4_ULD_RDMA) { |
| 4084 | lli.rxq_ids = adap->sge.rdma_rxq; |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 4085 | lli.ciq_ids = adap->sge.rdma_ciq; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4086 | lli.nrxq = adap->sge.rdmaqs; |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 4087 | lli.nciq = adap->sge.rdmaciqs; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4088 | } else if (uld == CXGB4_ULD_ISCSI) { |
| 4089 | lli.rxq_ids = adap->sge.ofld_rxq; |
| 4090 | lli.nrxq = adap->sge.ofldqsets; |
| 4091 | } |
| 4092 | lli.ntxq = adap->sge.ofldqsets; |
| 4093 | lli.nchan = adap->params.nports; |
| 4094 | lli.nports = adap->params.nports; |
| 4095 | lli.wr_cred = adap->params.ofldq_wr_cred; |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 4096 | lli.adapter_type = adap->params.chip; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4097 | lli.iscsi_iolen = MAXRXDATA_GET(t4_read_reg(adap, TP_PARA_REG2)); |
| 4098 | lli.udb_density = 1 << QUEUESPERPAGEPF0_GET( |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4099 | t4_read_reg(adap, SGE_EGRESS_QUEUES_PER_PAGE_PF) >> |
| 4100 | (adap->fn * 4)); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4101 | lli.ucq_density = 1 << QUEUESPERPAGEPF0_GET( |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4102 | t4_read_reg(adap, SGE_INGRESS_QUEUES_PER_PAGE_PF) >> |
| 4103 | (adap->fn * 4)); |
Kumar Sanghvi | dcf7b6f | 2013-12-18 16:38:23 +0530 | [diff] [blame] | 4104 | lli.filt_mode = adap->params.tp.vlan_pri_map; |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4105 | /* MODQ_REQ_MAP sets queues 0-3 to chan 0-3 */ |
| 4106 | for (i = 0; i < NCHAN; i++) |
| 4107 | lli.tx_modq[i] = i; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4108 | lli.gts_reg = adap->regs + MYPF_REG(SGE_PF_GTS); |
| 4109 | lli.db_reg = adap->regs + MYPF_REG(SGE_PF_KDOORBELL); |
| 4110 | lli.fw_vers = adap->params.fw_vers; |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 4111 | lli.dbfifo_int_thresh = dbfifo_int_thresh; |
Hariprasad Shenai | 04e10e2 | 2014-07-14 21:34:51 +0530 | [diff] [blame^] | 4112 | lli.sge_ingpadboundary = adap->sge.fl_align; |
| 4113 | lli.sge_egrstatuspagesize = adap->sge.stat_len; |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4114 | lli.sge_pktshift = adap->sge.pktshift; |
| 4115 | lli.enable_fw_ofld_conn = adap->flags & FW_OFLD_CONN; |
Kumar Sanghvi | 1ac0f09 | 2014-02-18 17:56:12 +0530 | [diff] [blame] | 4116 | lli.ulptx_memwrite_dsgl = adap->params.ulptx_memwrite_dsgl; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4117 | |
| 4118 | handle = ulds[uld].add(&lli); |
| 4119 | if (IS_ERR(handle)) { |
| 4120 | dev_warn(adap->pdev_dev, |
| 4121 | "could not attach to the %s driver, error %ld\n", |
| 4122 | uld_str[uld], PTR_ERR(handle)); |
| 4123 | return; |
| 4124 | } |
| 4125 | |
| 4126 | adap->uld_handle[uld] = handle; |
| 4127 | |
| 4128 | if (!netevent_registered) { |
| 4129 | register_netevent_notifier(&cxgb4_netevent_nb); |
| 4130 | netevent_registered = true; |
| 4131 | } |
Dimitris Michailidis | e29f5db | 2010-05-18 10:07:13 +0000 | [diff] [blame] | 4132 | |
| 4133 | if (adap->flags & FULL_INIT_DONE) |
| 4134 | ulds[uld].state_change(handle, CXGB4_STATE_UP); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4135 | } |
| 4136 | |
| 4137 | static void attach_ulds(struct adapter *adap) |
| 4138 | { |
| 4139 | unsigned int i; |
| 4140 | |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4141 | spin_lock(&adap_rcu_lock); |
| 4142 | list_add_tail_rcu(&adap->rcu_node, &adap_rcu_list); |
| 4143 | spin_unlock(&adap_rcu_lock); |
| 4144 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4145 | mutex_lock(&uld_mutex); |
| 4146 | list_add_tail(&adap->list_node, &adapter_list); |
| 4147 | for (i = 0; i < CXGB4_ULD_MAX; i++) |
| 4148 | if (ulds[i].add) |
| 4149 | uld_attach(adap, i); |
| 4150 | mutex_unlock(&uld_mutex); |
| 4151 | } |
| 4152 | |
| 4153 | static void detach_ulds(struct adapter *adap) |
| 4154 | { |
| 4155 | unsigned int i; |
| 4156 | |
| 4157 | mutex_lock(&uld_mutex); |
| 4158 | list_del(&adap->list_node); |
| 4159 | for (i = 0; i < CXGB4_ULD_MAX; i++) |
| 4160 | if (adap->uld_handle[i]) { |
| 4161 | ulds[i].state_change(adap->uld_handle[i], |
| 4162 | CXGB4_STATE_DETACH); |
| 4163 | adap->uld_handle[i] = NULL; |
| 4164 | } |
| 4165 | if (netevent_registered && list_empty(&adapter_list)) { |
| 4166 | unregister_netevent_notifier(&cxgb4_netevent_nb); |
| 4167 | netevent_registered = false; |
| 4168 | } |
| 4169 | mutex_unlock(&uld_mutex); |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4170 | |
| 4171 | spin_lock(&adap_rcu_lock); |
| 4172 | list_del_rcu(&adap->rcu_node); |
| 4173 | spin_unlock(&adap_rcu_lock); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4174 | } |
| 4175 | |
| 4176 | static void notify_ulds(struct adapter *adap, enum cxgb4_state new_state) |
| 4177 | { |
| 4178 | unsigned int i; |
| 4179 | |
| 4180 | mutex_lock(&uld_mutex); |
| 4181 | for (i = 0; i < CXGB4_ULD_MAX; i++) |
| 4182 | if (adap->uld_handle[i]) |
| 4183 | ulds[i].state_change(adap->uld_handle[i], new_state); |
| 4184 | mutex_unlock(&uld_mutex); |
| 4185 | } |
| 4186 | |
| 4187 | /** |
| 4188 | * cxgb4_register_uld - register an upper-layer driver |
| 4189 | * @type: the ULD type |
| 4190 | * @p: the ULD methods |
| 4191 | * |
| 4192 | * Registers an upper-layer driver with this driver and notifies the ULD |
| 4193 | * about any presently available devices that support its type. Returns |
| 4194 | * %-EBUSY if a ULD of the same type is already registered. |
| 4195 | */ |
| 4196 | int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p) |
| 4197 | { |
| 4198 | int ret = 0; |
| 4199 | struct adapter *adap; |
| 4200 | |
| 4201 | if (type >= CXGB4_ULD_MAX) |
| 4202 | return -EINVAL; |
| 4203 | mutex_lock(&uld_mutex); |
| 4204 | if (ulds[type].add) { |
| 4205 | ret = -EBUSY; |
| 4206 | goto out; |
| 4207 | } |
| 4208 | ulds[type] = *p; |
| 4209 | list_for_each_entry(adap, &adapter_list, list_node) |
| 4210 | uld_attach(adap, type); |
| 4211 | out: mutex_unlock(&uld_mutex); |
| 4212 | return ret; |
| 4213 | } |
| 4214 | EXPORT_SYMBOL(cxgb4_register_uld); |
| 4215 | |
| 4216 | /** |
| 4217 | * cxgb4_unregister_uld - unregister an upper-layer driver |
| 4218 | * @type: the ULD type |
| 4219 | * |
| 4220 | * Unregisters an existing upper-layer driver. |
| 4221 | */ |
| 4222 | int cxgb4_unregister_uld(enum cxgb4_uld type) |
| 4223 | { |
| 4224 | struct adapter *adap; |
| 4225 | |
| 4226 | if (type >= CXGB4_ULD_MAX) |
| 4227 | return -EINVAL; |
| 4228 | mutex_lock(&uld_mutex); |
| 4229 | list_for_each_entry(adap, &adapter_list, list_node) |
| 4230 | adap->uld_handle[type] = NULL; |
| 4231 | ulds[type].add = NULL; |
| 4232 | mutex_unlock(&uld_mutex); |
| 4233 | return 0; |
| 4234 | } |
| 4235 | EXPORT_SYMBOL(cxgb4_unregister_uld); |
| 4236 | |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4237 | /* Check if netdev on which event is occured belongs to us or not. Return |
Li RongQing | ee9a33b | 2014-06-20 17:32:36 +0800 | [diff] [blame] | 4238 | * success (true) if it belongs otherwise failure (false). |
| 4239 | * Called with rcu_read_lock() held. |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4240 | */ |
Li RongQing | ee9a33b | 2014-06-20 17:32:36 +0800 | [diff] [blame] | 4241 | static bool cxgb4_netdev(const struct net_device *netdev) |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4242 | { |
| 4243 | struct adapter *adap; |
| 4244 | int i; |
| 4245 | |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4246 | list_for_each_entry_rcu(adap, &adap_rcu_list, rcu_node) |
| 4247 | for (i = 0; i < MAX_NPORTS; i++) |
Li RongQing | ee9a33b | 2014-06-20 17:32:36 +0800 | [diff] [blame] | 4248 | if (adap->port[i] == netdev) |
| 4249 | return true; |
| 4250 | return false; |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4251 | } |
| 4252 | |
| 4253 | static int clip_add(struct net_device *event_dev, struct inet6_ifaddr *ifa, |
| 4254 | unsigned long event) |
| 4255 | { |
| 4256 | int ret = NOTIFY_DONE; |
| 4257 | |
| 4258 | rcu_read_lock(); |
| 4259 | if (cxgb4_netdev(event_dev)) { |
| 4260 | switch (event) { |
| 4261 | case NETDEV_UP: |
| 4262 | ret = cxgb4_clip_get(event_dev, |
| 4263 | (const struct in6_addr *)ifa->addr.s6_addr); |
| 4264 | if (ret < 0) { |
| 4265 | rcu_read_unlock(); |
| 4266 | return ret; |
| 4267 | } |
| 4268 | ret = NOTIFY_OK; |
| 4269 | break; |
| 4270 | case NETDEV_DOWN: |
| 4271 | cxgb4_clip_release(event_dev, |
| 4272 | (const struct in6_addr *)ifa->addr.s6_addr); |
| 4273 | ret = NOTIFY_OK; |
| 4274 | break; |
| 4275 | default: |
| 4276 | break; |
| 4277 | } |
| 4278 | } |
| 4279 | rcu_read_unlock(); |
| 4280 | return ret; |
| 4281 | } |
| 4282 | |
| 4283 | static int cxgb4_inet6addr_handler(struct notifier_block *this, |
| 4284 | unsigned long event, void *data) |
| 4285 | { |
| 4286 | struct inet6_ifaddr *ifa = data; |
| 4287 | struct net_device *event_dev; |
| 4288 | int ret = NOTIFY_DONE; |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4289 | struct bonding *bond = netdev_priv(ifa->idev->dev); |
Veaceslav Falico | 9caff1e | 2013-09-25 09:20:14 +0200 | [diff] [blame] | 4290 | struct list_head *iter; |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4291 | struct slave *slave; |
| 4292 | struct pci_dev *first_pdev = NULL; |
| 4293 | |
| 4294 | if (ifa->idev->dev->priv_flags & IFF_802_1Q_VLAN) { |
| 4295 | event_dev = vlan_dev_real_dev(ifa->idev->dev); |
| 4296 | ret = clip_add(event_dev, ifa, event); |
| 4297 | } else if (ifa->idev->dev->flags & IFF_MASTER) { |
| 4298 | /* It is possible that two different adapters are bonded in one |
| 4299 | * bond. We need to find such different adapters and add clip |
| 4300 | * in all of them only once. |
| 4301 | */ |
| 4302 | read_lock(&bond->lock); |
Veaceslav Falico | 9caff1e | 2013-09-25 09:20:14 +0200 | [diff] [blame] | 4303 | bond_for_each_slave(bond, slave, iter) { |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4304 | if (!first_pdev) { |
| 4305 | ret = clip_add(slave->dev, ifa, event); |
| 4306 | /* If clip_add is success then only initialize |
| 4307 | * first_pdev since it means it is our device |
| 4308 | */ |
| 4309 | if (ret == NOTIFY_OK) |
| 4310 | first_pdev = to_pci_dev( |
| 4311 | slave->dev->dev.parent); |
| 4312 | } else if (first_pdev != |
| 4313 | to_pci_dev(slave->dev->dev.parent)) |
| 4314 | ret = clip_add(slave->dev, ifa, event); |
| 4315 | } |
| 4316 | read_unlock(&bond->lock); |
| 4317 | } else |
| 4318 | ret = clip_add(ifa->idev->dev, ifa, event); |
| 4319 | |
| 4320 | return ret; |
| 4321 | } |
| 4322 | |
| 4323 | static struct notifier_block cxgb4_inet6addr_notifier = { |
| 4324 | .notifier_call = cxgb4_inet6addr_handler |
| 4325 | }; |
| 4326 | |
| 4327 | /* Retrieves IPv6 addresses from a root device (bond, vlan) associated with |
| 4328 | * a physical device. |
| 4329 | * The physical device reference is needed to send the actul CLIP command. |
| 4330 | */ |
| 4331 | static int update_dev_clip(struct net_device *root_dev, struct net_device *dev) |
| 4332 | { |
| 4333 | struct inet6_dev *idev = NULL; |
| 4334 | struct inet6_ifaddr *ifa; |
| 4335 | int ret = 0; |
| 4336 | |
| 4337 | idev = __in6_dev_get(root_dev); |
| 4338 | if (!idev) |
| 4339 | return ret; |
| 4340 | |
| 4341 | read_lock_bh(&idev->lock); |
| 4342 | list_for_each_entry(ifa, &idev->addr_list, if_list) { |
| 4343 | ret = cxgb4_clip_get(dev, |
| 4344 | (const struct in6_addr *)ifa->addr.s6_addr); |
| 4345 | if (ret < 0) |
| 4346 | break; |
| 4347 | } |
| 4348 | read_unlock_bh(&idev->lock); |
| 4349 | |
| 4350 | return ret; |
| 4351 | } |
| 4352 | |
| 4353 | static int update_root_dev_clip(struct net_device *dev) |
| 4354 | { |
| 4355 | struct net_device *root_dev = NULL; |
| 4356 | int i, ret = 0; |
| 4357 | |
| 4358 | /* First populate the real net device's IPv6 addresses */ |
| 4359 | ret = update_dev_clip(dev, dev); |
| 4360 | if (ret) |
| 4361 | return ret; |
| 4362 | |
| 4363 | /* Parse all bond and vlan devices layered on top of the physical dev */ |
| 4364 | for (i = 0; i < VLAN_N_VID; i++) { |
dingtianhong | f06c7f9 | 2014-05-09 14:58:05 +0800 | [diff] [blame] | 4365 | root_dev = __vlan_find_dev_deep_rcu(dev, htons(ETH_P_8021Q), i); |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4366 | if (!root_dev) |
| 4367 | continue; |
| 4368 | |
| 4369 | ret = update_dev_clip(root_dev, dev); |
| 4370 | if (ret) |
| 4371 | break; |
| 4372 | } |
| 4373 | return ret; |
| 4374 | } |
| 4375 | |
| 4376 | static void update_clip(const struct adapter *adap) |
| 4377 | { |
| 4378 | int i; |
| 4379 | struct net_device *dev; |
| 4380 | int ret; |
| 4381 | |
| 4382 | rcu_read_lock(); |
| 4383 | |
| 4384 | for (i = 0; i < MAX_NPORTS; i++) { |
| 4385 | dev = adap->port[i]; |
| 4386 | ret = 0; |
| 4387 | |
| 4388 | if (dev) |
| 4389 | ret = update_root_dev_clip(dev); |
| 4390 | |
| 4391 | if (ret < 0) |
| 4392 | break; |
| 4393 | } |
| 4394 | rcu_read_unlock(); |
| 4395 | } |
| 4396 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4397 | /** |
| 4398 | * cxgb_up - enable the adapter |
| 4399 | * @adap: adapter being enabled |
| 4400 | * |
| 4401 | * Called when the first port is enabled, this function performs the |
| 4402 | * actions necessary to make an adapter operational, such as completing |
| 4403 | * the initialization of HW modules, and enabling interrupts. |
| 4404 | * |
| 4405 | * Must be called with the rtnl lock held. |
| 4406 | */ |
| 4407 | static int cxgb_up(struct adapter *adap) |
| 4408 | { |
Dimitris Michailidis | aaefae9 | 2010-05-18 10:07:12 +0000 | [diff] [blame] | 4409 | int err; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4410 | |
Dimitris Michailidis | aaefae9 | 2010-05-18 10:07:12 +0000 | [diff] [blame] | 4411 | err = setup_sge_queues(adap); |
| 4412 | if (err) |
| 4413 | goto out; |
| 4414 | err = setup_rss(adap); |
| 4415 | if (err) |
| 4416 | goto freeq; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4417 | |
| 4418 | if (adap->flags & USING_MSIX) { |
Dimitris Michailidis | aaefae9 | 2010-05-18 10:07:12 +0000 | [diff] [blame] | 4419 | name_msix_vecs(adap); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4420 | err = request_irq(adap->msix_info[0].vec, t4_nondata_intr, 0, |
| 4421 | adap->msix_info[0].desc, adap); |
| 4422 | if (err) |
| 4423 | goto irq_err; |
| 4424 | |
| 4425 | err = request_msix_queue_irqs(adap); |
| 4426 | if (err) { |
| 4427 | free_irq(adap->msix_info[0].vec, adap); |
| 4428 | goto irq_err; |
| 4429 | } |
| 4430 | } else { |
| 4431 | err = request_irq(adap->pdev->irq, t4_intr_handler(adap), |
| 4432 | (adap->flags & USING_MSI) ? 0 : IRQF_SHARED, |
Dimitris Michailidis | b1a3c2b | 2010-12-14 21:36:51 +0000 | [diff] [blame] | 4433 | adap->port[0]->name, adap); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4434 | if (err) |
| 4435 | goto irq_err; |
| 4436 | } |
| 4437 | enable_rx(adap); |
| 4438 | t4_sge_start(adap); |
| 4439 | t4_intr_enable(adap); |
Dimitris Michailidis | aaefae9 | 2010-05-18 10:07:12 +0000 | [diff] [blame] | 4440 | adap->flags |= FULL_INIT_DONE; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4441 | notify_ulds(adap, CXGB4_STATE_UP); |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 4442 | update_clip(adap); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4443 | out: |
| 4444 | return err; |
| 4445 | irq_err: |
| 4446 | dev_err(adap->pdev_dev, "request_irq failed, err %d\n", err); |
Dimitris Michailidis | aaefae9 | 2010-05-18 10:07:12 +0000 | [diff] [blame] | 4447 | freeq: |
| 4448 | t4_free_sge_resources(adap); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4449 | goto out; |
| 4450 | } |
| 4451 | |
| 4452 | static void cxgb_down(struct adapter *adapter) |
| 4453 | { |
| 4454 | t4_intr_disable(adapter); |
| 4455 | cancel_work_sync(&adapter->tid_release_task); |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 4456 | cancel_work_sync(&adapter->db_full_task); |
| 4457 | cancel_work_sync(&adapter->db_drop_task); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4458 | adapter->tid_release_task_busy = false; |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 4459 | adapter->tid_release_head = NULL; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4460 | |
| 4461 | if (adapter->flags & USING_MSIX) { |
| 4462 | free_msix_queue_irqs(adapter); |
| 4463 | free_irq(adapter->msix_info[0].vec, adapter); |
| 4464 | } else |
| 4465 | free_irq(adapter->pdev->irq, adapter); |
| 4466 | quiesce_rx(adapter); |
Dimitris Michailidis | aaefae9 | 2010-05-18 10:07:12 +0000 | [diff] [blame] | 4467 | t4_sge_stop(adapter); |
| 4468 | t4_free_sge_resources(adapter); |
| 4469 | adapter->flags &= ~FULL_INIT_DONE; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4470 | } |
| 4471 | |
| 4472 | /* |
| 4473 | * net_device operations |
| 4474 | */ |
| 4475 | static int cxgb_open(struct net_device *dev) |
| 4476 | { |
| 4477 | int err; |
| 4478 | struct port_info *pi = netdev_priv(dev); |
| 4479 | struct adapter *adapter = pi->adapter; |
| 4480 | |
Dimitris Michailidis | 6a3c869 | 2011-01-19 15:29:05 +0000 | [diff] [blame] | 4481 | netif_carrier_off(dev); |
| 4482 | |
Dimitris Michailidis | aaefae9 | 2010-05-18 10:07:12 +0000 | [diff] [blame] | 4483 | if (!(adapter->flags & FULL_INIT_DONE)) { |
| 4484 | err = cxgb_up(adapter); |
| 4485 | if (err < 0) |
| 4486 | return err; |
| 4487 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4488 | |
Dimitris Michailidis | f68707b | 2010-06-18 10:05:32 +0000 | [diff] [blame] | 4489 | err = link_start(dev); |
| 4490 | if (!err) |
| 4491 | netif_tx_start_all_queues(dev); |
| 4492 | return err; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4493 | } |
| 4494 | |
| 4495 | static int cxgb_close(struct net_device *dev) |
| 4496 | { |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4497 | struct port_info *pi = netdev_priv(dev); |
| 4498 | struct adapter *adapter = pi->adapter; |
| 4499 | |
| 4500 | netif_tx_stop_all_queues(dev); |
| 4501 | netif_carrier_off(dev); |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4502 | return t4_enable_vi(adapter, adapter->fn, pi->viid, false, false); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4503 | } |
| 4504 | |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 4505 | /* Return an error number if the indicated filter isn't writable ... |
| 4506 | */ |
| 4507 | static int writable_filter(struct filter_entry *f) |
| 4508 | { |
| 4509 | if (f->locked) |
| 4510 | return -EPERM; |
| 4511 | if (f->pending) |
| 4512 | return -EBUSY; |
| 4513 | |
| 4514 | return 0; |
| 4515 | } |
| 4516 | |
| 4517 | /* Delete the filter at the specified index (if valid). The checks for all |
| 4518 | * the common problems with doing this like the filter being locked, currently |
| 4519 | * pending in another operation, etc. |
| 4520 | */ |
| 4521 | static int delete_filter(struct adapter *adapter, unsigned int fidx) |
| 4522 | { |
| 4523 | struct filter_entry *f; |
| 4524 | int ret; |
| 4525 | |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4526 | if (fidx >= adapter->tids.nftids + adapter->tids.nsftids) |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 4527 | return -EINVAL; |
| 4528 | |
| 4529 | f = &adapter->tids.ftid_tab[fidx]; |
| 4530 | ret = writable_filter(f); |
| 4531 | if (ret) |
| 4532 | return ret; |
| 4533 | if (f->valid) |
| 4534 | return del_filter_wr(adapter, fidx); |
| 4535 | |
| 4536 | return 0; |
| 4537 | } |
| 4538 | |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4539 | int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid, |
Vipul Pandya | 793dad9 | 2012-12-10 09:30:56 +0000 | [diff] [blame] | 4540 | __be32 sip, __be16 sport, __be16 vlan, |
| 4541 | unsigned int queue, unsigned char port, unsigned char mask) |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4542 | { |
| 4543 | int ret; |
| 4544 | struct filter_entry *f; |
| 4545 | struct adapter *adap; |
| 4546 | int i; |
| 4547 | u8 *val; |
| 4548 | |
| 4549 | adap = netdev2adap(dev); |
| 4550 | |
Vipul Pandya | 1cab775 | 2012-12-10 09:30:55 +0000 | [diff] [blame] | 4551 | /* Adjust stid to correct filter index */ |
Kumar Sanghvi | 470c60c | 2013-12-18 16:38:21 +0530 | [diff] [blame] | 4552 | stid -= adap->tids.sftid_base; |
Vipul Pandya | 1cab775 | 2012-12-10 09:30:55 +0000 | [diff] [blame] | 4553 | stid += adap->tids.nftids; |
| 4554 | |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4555 | /* Check to make sure the filter requested is writable ... |
| 4556 | */ |
| 4557 | f = &adap->tids.ftid_tab[stid]; |
| 4558 | ret = writable_filter(f); |
| 4559 | if (ret) |
| 4560 | return ret; |
| 4561 | |
| 4562 | /* Clear out any old resources being used by the filter before |
| 4563 | * we start constructing the new filter. |
| 4564 | */ |
| 4565 | if (f->valid) |
| 4566 | clear_filter(adap, f); |
| 4567 | |
| 4568 | /* Clear out filter specifications */ |
| 4569 | memset(&f->fs, 0, sizeof(struct ch_filter_specification)); |
| 4570 | f->fs.val.lport = cpu_to_be16(sport); |
| 4571 | f->fs.mask.lport = ~0; |
| 4572 | val = (u8 *)&sip; |
Vipul Pandya | 793dad9 | 2012-12-10 09:30:56 +0000 | [diff] [blame] | 4573 | if ((val[0] | val[1] | val[2] | val[3]) != 0) { |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4574 | for (i = 0; i < 4; i++) { |
| 4575 | f->fs.val.lip[i] = val[i]; |
| 4576 | f->fs.mask.lip[i] = ~0; |
| 4577 | } |
Kumar Sanghvi | dcf7b6f | 2013-12-18 16:38:23 +0530 | [diff] [blame] | 4578 | if (adap->params.tp.vlan_pri_map & F_PORT) { |
Vipul Pandya | 793dad9 | 2012-12-10 09:30:56 +0000 | [diff] [blame] | 4579 | f->fs.val.iport = port; |
| 4580 | f->fs.mask.iport = mask; |
| 4581 | } |
| 4582 | } |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4583 | |
Kumar Sanghvi | dcf7b6f | 2013-12-18 16:38:23 +0530 | [diff] [blame] | 4584 | if (adap->params.tp.vlan_pri_map & F_PROTOCOL) { |
Kumar Sanghvi | 7c89e55 | 2013-12-18 16:38:20 +0530 | [diff] [blame] | 4585 | f->fs.val.proto = IPPROTO_TCP; |
| 4586 | f->fs.mask.proto = ~0; |
| 4587 | } |
| 4588 | |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4589 | f->fs.dirsteer = 1; |
| 4590 | f->fs.iq = queue; |
| 4591 | /* Mark filter as locked */ |
| 4592 | f->locked = 1; |
| 4593 | f->fs.rpttid = 1; |
| 4594 | |
| 4595 | ret = set_filter_wr(adap, stid); |
| 4596 | if (ret) { |
| 4597 | clear_filter(adap, f); |
| 4598 | return ret; |
| 4599 | } |
| 4600 | |
| 4601 | return 0; |
| 4602 | } |
| 4603 | EXPORT_SYMBOL(cxgb4_create_server_filter); |
| 4604 | |
| 4605 | int cxgb4_remove_server_filter(const struct net_device *dev, unsigned int stid, |
| 4606 | unsigned int queue, bool ipv6) |
| 4607 | { |
| 4608 | int ret; |
| 4609 | struct filter_entry *f; |
| 4610 | struct adapter *adap; |
| 4611 | |
| 4612 | adap = netdev2adap(dev); |
Vipul Pandya | 1cab775 | 2012-12-10 09:30:55 +0000 | [diff] [blame] | 4613 | |
| 4614 | /* Adjust stid to correct filter index */ |
Kumar Sanghvi | 470c60c | 2013-12-18 16:38:21 +0530 | [diff] [blame] | 4615 | stid -= adap->tids.sftid_base; |
Vipul Pandya | 1cab775 | 2012-12-10 09:30:55 +0000 | [diff] [blame] | 4616 | stid += adap->tids.nftids; |
| 4617 | |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4618 | f = &adap->tids.ftid_tab[stid]; |
| 4619 | /* Unlock the filter */ |
| 4620 | f->locked = 0; |
| 4621 | |
| 4622 | ret = delete_filter(adap, stid); |
| 4623 | if (ret) |
| 4624 | return ret; |
| 4625 | |
| 4626 | return 0; |
| 4627 | } |
| 4628 | EXPORT_SYMBOL(cxgb4_remove_server_filter); |
| 4629 | |
Dimitris Michailidis | f5152c9 | 2010-07-07 16:11:25 +0000 | [diff] [blame] | 4630 | static struct rtnl_link_stats64 *cxgb_get_stats(struct net_device *dev, |
| 4631 | struct rtnl_link_stats64 *ns) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4632 | { |
| 4633 | struct port_stats stats; |
| 4634 | struct port_info *p = netdev_priv(dev); |
| 4635 | struct adapter *adapter = p->adapter; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4636 | |
Gavin Shan | 9fe6cb5 | 2014-01-23 12:27:35 +0800 | [diff] [blame] | 4637 | /* Block retrieving statistics during EEH error |
| 4638 | * recovery. Otherwise, the recovery might fail |
| 4639 | * and the PCI device will be removed permanently |
| 4640 | */ |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4641 | spin_lock(&adapter->stats_lock); |
Gavin Shan | 9fe6cb5 | 2014-01-23 12:27:35 +0800 | [diff] [blame] | 4642 | if (!netif_device_present(dev)) { |
| 4643 | spin_unlock(&adapter->stats_lock); |
| 4644 | return ns; |
| 4645 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4646 | t4_get_port_stats(adapter, p->tx_chan, &stats); |
| 4647 | spin_unlock(&adapter->stats_lock); |
| 4648 | |
| 4649 | ns->tx_bytes = stats.tx_octets; |
| 4650 | ns->tx_packets = stats.tx_frames; |
| 4651 | ns->rx_bytes = stats.rx_octets; |
| 4652 | ns->rx_packets = stats.rx_frames; |
| 4653 | ns->multicast = stats.rx_mcast_frames; |
| 4654 | |
| 4655 | /* detailed rx_errors */ |
| 4656 | ns->rx_length_errors = stats.rx_jabber + stats.rx_too_long + |
| 4657 | stats.rx_runt; |
| 4658 | ns->rx_over_errors = 0; |
| 4659 | ns->rx_crc_errors = stats.rx_fcs_err; |
| 4660 | ns->rx_frame_errors = stats.rx_symbol_err; |
| 4661 | ns->rx_fifo_errors = stats.rx_ovflow0 + stats.rx_ovflow1 + |
| 4662 | stats.rx_ovflow2 + stats.rx_ovflow3 + |
| 4663 | stats.rx_trunc0 + stats.rx_trunc1 + |
| 4664 | stats.rx_trunc2 + stats.rx_trunc3; |
| 4665 | ns->rx_missed_errors = 0; |
| 4666 | |
| 4667 | /* detailed tx_errors */ |
| 4668 | ns->tx_aborted_errors = 0; |
| 4669 | ns->tx_carrier_errors = 0; |
| 4670 | ns->tx_fifo_errors = 0; |
| 4671 | ns->tx_heartbeat_errors = 0; |
| 4672 | ns->tx_window_errors = 0; |
| 4673 | |
| 4674 | ns->tx_errors = stats.tx_error_frames; |
| 4675 | ns->rx_errors = stats.rx_symbol_err + stats.rx_fcs_err + |
| 4676 | ns->rx_length_errors + stats.rx_len_err + ns->rx_fifo_errors; |
| 4677 | return ns; |
| 4678 | } |
| 4679 | |
| 4680 | static int cxgb_ioctl(struct net_device *dev, struct ifreq *req, int cmd) |
| 4681 | { |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4682 | unsigned int mbox; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4683 | int ret = 0, prtad, devad; |
| 4684 | struct port_info *pi = netdev_priv(dev); |
| 4685 | struct mii_ioctl_data *data = (struct mii_ioctl_data *)&req->ifr_data; |
| 4686 | |
| 4687 | switch (cmd) { |
| 4688 | case SIOCGMIIPHY: |
| 4689 | if (pi->mdio_addr < 0) |
| 4690 | return -EOPNOTSUPP; |
| 4691 | data->phy_id = pi->mdio_addr; |
| 4692 | break; |
| 4693 | case SIOCGMIIREG: |
| 4694 | case SIOCSMIIREG: |
| 4695 | if (mdio_phy_id_is_c45(data->phy_id)) { |
| 4696 | prtad = mdio_phy_id_prtad(data->phy_id); |
| 4697 | devad = mdio_phy_id_devad(data->phy_id); |
| 4698 | } else if (data->phy_id < 32) { |
| 4699 | prtad = data->phy_id; |
| 4700 | devad = 0; |
| 4701 | data->reg_num &= 0x1f; |
| 4702 | } else |
| 4703 | return -EINVAL; |
| 4704 | |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4705 | mbox = pi->adapter->fn; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4706 | if (cmd == SIOCGMIIREG) |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4707 | ret = t4_mdio_rd(pi->adapter, mbox, prtad, devad, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4708 | data->reg_num, &data->val_out); |
| 4709 | else |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4710 | ret = t4_mdio_wr(pi->adapter, mbox, prtad, devad, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4711 | data->reg_num, data->val_in); |
| 4712 | break; |
| 4713 | default: |
| 4714 | return -EOPNOTSUPP; |
| 4715 | } |
| 4716 | return ret; |
| 4717 | } |
| 4718 | |
| 4719 | static void cxgb_set_rxmode(struct net_device *dev) |
| 4720 | { |
| 4721 | /* unfortunately we can't return errors to the stack */ |
| 4722 | set_rxmode(dev, -1, false); |
| 4723 | } |
| 4724 | |
| 4725 | static int cxgb_change_mtu(struct net_device *dev, int new_mtu) |
| 4726 | { |
| 4727 | int ret; |
| 4728 | struct port_info *pi = netdev_priv(dev); |
| 4729 | |
| 4730 | if (new_mtu < 81 || new_mtu > MAX_MTU) /* accommodate SACK */ |
| 4731 | return -EINVAL; |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4732 | ret = t4_set_rxmode(pi->adapter, pi->adapter->fn, pi->viid, new_mtu, -1, |
| 4733 | -1, -1, -1, true); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4734 | if (!ret) |
| 4735 | dev->mtu = new_mtu; |
| 4736 | return ret; |
| 4737 | } |
| 4738 | |
| 4739 | static int cxgb_set_mac_addr(struct net_device *dev, void *p) |
| 4740 | { |
| 4741 | int ret; |
| 4742 | struct sockaddr *addr = p; |
| 4743 | struct port_info *pi = netdev_priv(dev); |
| 4744 | |
| 4745 | if (!is_valid_ether_addr(addr->sa_data)) |
Danny Kukawka | 504f9b5 | 2012-02-21 02:07:49 +0000 | [diff] [blame] | 4746 | return -EADDRNOTAVAIL; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4747 | |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4748 | ret = t4_change_mac(pi->adapter, pi->adapter->fn, pi->viid, |
| 4749 | pi->xact_addr_filt, addr->sa_data, true, true); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4750 | if (ret < 0) |
| 4751 | return ret; |
| 4752 | |
| 4753 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
| 4754 | pi->xact_addr_filt = ret; |
| 4755 | return 0; |
| 4756 | } |
| 4757 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4758 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 4759 | static void cxgb_netpoll(struct net_device *dev) |
| 4760 | { |
| 4761 | struct port_info *pi = netdev_priv(dev); |
| 4762 | struct adapter *adap = pi->adapter; |
| 4763 | |
| 4764 | if (adap->flags & USING_MSIX) { |
| 4765 | int i; |
| 4766 | struct sge_eth_rxq *rx = &adap->sge.ethrxq[pi->first_qset]; |
| 4767 | |
| 4768 | for (i = pi->nqsets; i; i--, rx++) |
| 4769 | t4_sge_intr_msix(0, &rx->rspq); |
| 4770 | } else |
| 4771 | t4_intr_handler(adap)(0, adap); |
| 4772 | } |
| 4773 | #endif |
| 4774 | |
| 4775 | static const struct net_device_ops cxgb4_netdev_ops = { |
| 4776 | .ndo_open = cxgb_open, |
| 4777 | .ndo_stop = cxgb_close, |
| 4778 | .ndo_start_xmit = t4_eth_xmit, |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 4779 | .ndo_select_queue = cxgb_select_queue, |
Dimitris Michailidis | 9be793b | 2010-06-18 10:05:31 +0000 | [diff] [blame] | 4780 | .ndo_get_stats64 = cxgb_get_stats, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4781 | .ndo_set_rx_mode = cxgb_set_rxmode, |
| 4782 | .ndo_set_mac_address = cxgb_set_mac_addr, |
Michał Mirosław | 2ed28ba | 2011-04-16 13:05:08 +0000 | [diff] [blame] | 4783 | .ndo_set_features = cxgb_set_features, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4784 | .ndo_validate_addr = eth_validate_addr, |
| 4785 | .ndo_do_ioctl = cxgb_ioctl, |
| 4786 | .ndo_change_mtu = cxgb_change_mtu, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4787 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 4788 | .ndo_poll_controller = cxgb_netpoll, |
| 4789 | #endif |
| 4790 | }; |
| 4791 | |
| 4792 | void t4_fatal_err(struct adapter *adap) |
| 4793 | { |
| 4794 | t4_set_reg_field(adap, SGE_CONTROL, GLOBALENABLE, 0); |
| 4795 | t4_intr_disable(adap); |
| 4796 | dev_alert(adap->pdev_dev, "encountered fatal error, adapter stopped\n"); |
| 4797 | } |
| 4798 | |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 4799 | /* Return the specified PCI-E Configuration Space register from our Physical |
| 4800 | * Function. We try first via a Firmware LDST Command since we prefer to let |
| 4801 | * the firmware own all of these registers, but if that fails we go for it |
| 4802 | * directly ourselves. |
| 4803 | */ |
| 4804 | static u32 t4_read_pcie_cfg4(struct adapter *adap, int reg) |
| 4805 | { |
| 4806 | struct fw_ldst_cmd ldst_cmd; |
| 4807 | u32 val; |
| 4808 | int ret; |
| 4809 | |
| 4810 | /* Construct and send the Firmware LDST Command to retrieve the |
| 4811 | * specified PCI-E Configuration Space register. |
| 4812 | */ |
| 4813 | memset(&ldst_cmd, 0, sizeof(ldst_cmd)); |
| 4814 | ldst_cmd.op_to_addrspace = |
| 4815 | htonl(FW_CMD_OP(FW_LDST_CMD) | |
| 4816 | FW_CMD_REQUEST | |
| 4817 | FW_CMD_READ | |
| 4818 | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_FUNC_PCIE)); |
| 4819 | ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd)); |
| 4820 | ldst_cmd.u.pcie.select_naccess = FW_LDST_CMD_NACCESS(1); |
| 4821 | ldst_cmd.u.pcie.ctrl_to_fn = |
| 4822 | (FW_LDST_CMD_LC | FW_LDST_CMD_FN(adap->fn)); |
| 4823 | ldst_cmd.u.pcie.r = reg; |
| 4824 | ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd, sizeof(ldst_cmd), |
| 4825 | &ldst_cmd); |
| 4826 | |
| 4827 | /* If the LDST Command suucceeded, exctract the returned register |
| 4828 | * value. Otherwise read it directly ourself. |
| 4829 | */ |
| 4830 | if (ret == 0) |
| 4831 | val = ntohl(ldst_cmd.u.pcie.data[0]); |
| 4832 | else |
| 4833 | t4_hw_pci_read_cfg4(adap, reg, &val); |
| 4834 | |
| 4835 | return val; |
| 4836 | } |
| 4837 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4838 | static void setup_memwin(struct adapter *adap) |
| 4839 | { |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 4840 | u32 mem_win0_base, mem_win1_base, mem_win2_base, mem_win2_aperture; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4841 | |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 4842 | if (is_t4(adap->params.chip)) { |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 4843 | u32 bar0; |
| 4844 | |
| 4845 | /* Truncation intentional: we only read the bottom 32-bits of |
| 4846 | * the 64-bit BAR0/BAR1 ... We use the hardware backdoor |
| 4847 | * mechanism to read BAR0 instead of using |
| 4848 | * pci_resource_start() because we could be operating from |
| 4849 | * within a Virtual Machine which is trapping our accesses to |
| 4850 | * our Configuration Space and we need to set up the PCI-E |
| 4851 | * Memory Window decoders with the actual addresses which will |
| 4852 | * be coming across the PCI-E link. |
| 4853 | */ |
| 4854 | bar0 = t4_read_pcie_cfg4(adap, PCI_BASE_ADDRESS_0); |
| 4855 | bar0 &= PCI_BASE_ADDRESS_MEM_MASK; |
| 4856 | adap->t4_bar0 = bar0; |
| 4857 | |
Santosh Rastapur | 19dd37b | 2013-03-14 05:08:53 +0000 | [diff] [blame] | 4858 | mem_win0_base = bar0 + MEMWIN0_BASE; |
| 4859 | mem_win1_base = bar0 + MEMWIN1_BASE; |
| 4860 | mem_win2_base = bar0 + MEMWIN2_BASE; |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 4861 | mem_win2_aperture = MEMWIN2_APERTURE; |
Santosh Rastapur | 19dd37b | 2013-03-14 05:08:53 +0000 | [diff] [blame] | 4862 | } else { |
| 4863 | /* For T5, only relative offset inside the PCIe BAR is passed */ |
| 4864 | mem_win0_base = MEMWIN0_BASE; |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 4865 | mem_win1_base = MEMWIN1_BASE; |
Santosh Rastapur | 19dd37b | 2013-03-14 05:08:53 +0000 | [diff] [blame] | 4866 | mem_win2_base = MEMWIN2_BASE_T5; |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 4867 | mem_win2_aperture = MEMWIN2_APERTURE_T5; |
Santosh Rastapur | 19dd37b | 2013-03-14 05:08:53 +0000 | [diff] [blame] | 4868 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4869 | t4_write_reg(adap, PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_BASE_WIN, 0), |
Santosh Rastapur | 19dd37b | 2013-03-14 05:08:53 +0000 | [diff] [blame] | 4870 | mem_win0_base | BIR(0) | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4871 | WINDOW(ilog2(MEMWIN0_APERTURE) - 10)); |
| 4872 | t4_write_reg(adap, PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_BASE_WIN, 1), |
Santosh Rastapur | 19dd37b | 2013-03-14 05:08:53 +0000 | [diff] [blame] | 4873 | mem_win1_base | BIR(0) | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4874 | WINDOW(ilog2(MEMWIN1_APERTURE) - 10)); |
| 4875 | t4_write_reg(adap, PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_BASE_WIN, 2), |
Santosh Rastapur | 19dd37b | 2013-03-14 05:08:53 +0000 | [diff] [blame] | 4876 | mem_win2_base | BIR(0) | |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 4877 | WINDOW(ilog2(mem_win2_aperture) - 10)); |
| 4878 | t4_read_reg(adap, PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_BASE_WIN, 2)); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 4879 | } |
| 4880 | |
| 4881 | static void setup_memwin_rdma(struct adapter *adap) |
| 4882 | { |
Dimitris Michailidis | 1ae970e | 2010-08-02 13:19:19 +0000 | [diff] [blame] | 4883 | if (adap->vres.ocq.size) { |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 4884 | u32 start; |
| 4885 | unsigned int sz_kb; |
Dimitris Michailidis | 1ae970e | 2010-08-02 13:19:19 +0000 | [diff] [blame] | 4886 | |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 4887 | start = t4_read_pcie_cfg4(adap, PCI_BASE_ADDRESS_2); |
| 4888 | start &= PCI_BASE_ADDRESS_MEM_MASK; |
| 4889 | start += OCQ_WIN_OFFSET(adap->pdev, &adap->vres); |
Dimitris Michailidis | 1ae970e | 2010-08-02 13:19:19 +0000 | [diff] [blame] | 4890 | sz_kb = roundup_pow_of_two(adap->vres.ocq.size) >> 10; |
| 4891 | t4_write_reg(adap, |
| 4892 | PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_BASE_WIN, 3), |
| 4893 | start | BIR(1) | WINDOW(ilog2(sz_kb))); |
| 4894 | t4_write_reg(adap, |
| 4895 | PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_OFFSET, 3), |
| 4896 | adap->vres.ocq.start); |
| 4897 | t4_read_reg(adap, |
| 4898 | PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_OFFSET, 3)); |
| 4899 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4900 | } |
| 4901 | |
Dimitris Michailidis | 02b5fb8 | 2010-06-18 10:05:28 +0000 | [diff] [blame] | 4902 | static int adap_init1(struct adapter *adap, struct fw_caps_config_cmd *c) |
| 4903 | { |
| 4904 | u32 v; |
| 4905 | int ret; |
| 4906 | |
| 4907 | /* get device capabilities */ |
| 4908 | memset(c, 0, sizeof(*c)); |
| 4909 | c->op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | |
| 4910 | FW_CMD_REQUEST | FW_CMD_READ); |
Naresh Kumar Inna | ce91a92 | 2012-11-15 22:41:17 +0530 | [diff] [blame] | 4911 | c->cfvalid_to_len16 = htonl(FW_LEN16(*c)); |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4912 | ret = t4_wr_mbox(adap, adap->fn, c, sizeof(*c), c); |
Dimitris Michailidis | 02b5fb8 | 2010-06-18 10:05:28 +0000 | [diff] [blame] | 4913 | if (ret < 0) |
| 4914 | return ret; |
| 4915 | |
| 4916 | /* select capabilities we'll be using */ |
| 4917 | if (c->niccaps & htons(FW_CAPS_CONFIG_NIC_VM)) { |
| 4918 | if (!vf_acls) |
| 4919 | c->niccaps ^= htons(FW_CAPS_CONFIG_NIC_VM); |
| 4920 | else |
| 4921 | c->niccaps = htons(FW_CAPS_CONFIG_NIC_VM); |
| 4922 | } else if (vf_acls) { |
| 4923 | dev_err(adap->pdev_dev, "virtualization ACLs not supported"); |
| 4924 | return ret; |
| 4925 | } |
| 4926 | c->op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | |
| 4927 | FW_CMD_REQUEST | FW_CMD_WRITE); |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4928 | ret = t4_wr_mbox(adap, adap->fn, c, sizeof(*c), NULL); |
Dimitris Michailidis | 02b5fb8 | 2010-06-18 10:05:28 +0000 | [diff] [blame] | 4929 | if (ret < 0) |
| 4930 | return ret; |
| 4931 | |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4932 | ret = t4_config_glbl_rss(adap, adap->fn, |
Dimitris Michailidis | 02b5fb8 | 2010-06-18 10:05:28 +0000 | [diff] [blame] | 4933 | FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL, |
| 4934 | FW_RSS_GLB_CONFIG_CMD_TNLMAPEN | |
| 4935 | FW_RSS_GLB_CONFIG_CMD_TNLALLLKP); |
| 4936 | if (ret < 0) |
| 4937 | return ret; |
| 4938 | |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4939 | ret = t4_cfg_pfvf(adap, adap->fn, adap->fn, 0, MAX_EGRQ, 64, MAX_INGQ, |
| 4940 | 0, 0, 4, 0xf, 0xf, 16, FW_CMD_CAP_PF, FW_CMD_CAP_PF); |
Dimitris Michailidis | 02b5fb8 | 2010-06-18 10:05:28 +0000 | [diff] [blame] | 4941 | if (ret < 0) |
| 4942 | return ret; |
| 4943 | |
| 4944 | t4_sge_init(adap); |
| 4945 | |
Dimitris Michailidis | 02b5fb8 | 2010-06-18 10:05:28 +0000 | [diff] [blame] | 4946 | /* tweak some settings */ |
| 4947 | t4_write_reg(adap, TP_SHIFT_CNT, 0x64f8849); |
| 4948 | t4_write_reg(adap, ULP_RX_TDDP_PSZ, HPZ0(PAGE_SHIFT - 12)); |
| 4949 | t4_write_reg(adap, TP_PIO_ADDR, TP_INGRESS_CONFIG); |
| 4950 | v = t4_read_reg(adap, TP_PIO_DATA); |
| 4951 | t4_write_reg(adap, TP_PIO_DATA, v & ~CSUM_HAS_PSEUDO_HDR); |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4952 | |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 4953 | /* first 4 Tx modulation queues point to consecutive Tx channels */ |
| 4954 | adap->params.tp.tx_modq_map = 0xE4; |
| 4955 | t4_write_reg(adap, A_TP_TX_MOD_QUEUE_REQ_MAP, |
| 4956 | V_TX_MOD_QUEUE_REQ_MAP(adap->params.tp.tx_modq_map)); |
| 4957 | |
| 4958 | /* associate each Tx modulation queue with consecutive Tx channels */ |
| 4959 | v = 0x84218421; |
| 4960 | t4_write_indirect(adap, TP_PIO_ADDR, TP_PIO_DATA, |
| 4961 | &v, 1, A_TP_TX_SCHED_HDR); |
| 4962 | t4_write_indirect(adap, TP_PIO_ADDR, TP_PIO_DATA, |
| 4963 | &v, 1, A_TP_TX_SCHED_FIFO); |
| 4964 | t4_write_indirect(adap, TP_PIO_ADDR, TP_PIO_DATA, |
| 4965 | &v, 1, A_TP_TX_SCHED_PCMD); |
| 4966 | |
| 4967 | #define T4_TX_MODQ_10G_WEIGHT_DEFAULT 16 /* in KB units */ |
| 4968 | if (is_offload(adap)) { |
| 4969 | t4_write_reg(adap, A_TP_TX_MOD_QUEUE_WEIGHT0, |
| 4970 | V_TX_MODQ_WEIGHT0(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | |
| 4971 | V_TX_MODQ_WEIGHT1(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | |
| 4972 | V_TX_MODQ_WEIGHT2(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | |
| 4973 | V_TX_MODQ_WEIGHT3(T4_TX_MODQ_10G_WEIGHT_DEFAULT)); |
| 4974 | t4_write_reg(adap, A_TP_TX_MOD_CHANNEL_WEIGHT, |
| 4975 | V_TX_MODQ_WEIGHT0(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | |
| 4976 | V_TX_MODQ_WEIGHT1(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | |
| 4977 | V_TX_MODQ_WEIGHT2(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | |
| 4978 | V_TX_MODQ_WEIGHT3(T4_TX_MODQ_10G_WEIGHT_DEFAULT)); |
| 4979 | } |
| 4980 | |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 4981 | /* get basic stuff going */ |
| 4982 | return t4_early_init(adap, adap->fn); |
Dimitris Michailidis | 02b5fb8 | 2010-06-18 10:05:28 +0000 | [diff] [blame] | 4983 | } |
| 4984 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4985 | /* |
| 4986 | * Max # of ATIDs. The absolute HW max is 16K but we keep it lower. |
| 4987 | */ |
| 4988 | #define MAX_ATIDS 8192U |
| 4989 | |
| 4990 | /* |
| 4991 | * Phase 0 of initialization: contact FW, obtain config, perform basic init. |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 4992 | * |
| 4993 | * If the firmware we're dealing with has Configuration File support, then |
| 4994 | * we use that to perform all configuration |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 4995 | */ |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 4996 | |
| 4997 | /* |
| 4998 | * Tweak configuration based on module parameters, etc. Most of these have |
| 4999 | * defaults assigned to them by Firmware Configuration Files (if we're using |
| 5000 | * them) but need to be explicitly set if we're using hard-coded |
| 5001 | * initialization. But even in the case of using Firmware Configuration |
| 5002 | * Files, we'd like to expose the ability to change these via module |
| 5003 | * parameters so these are essentially common tweaks/settings for |
| 5004 | * Configuration Files and hard-coded initialization ... |
| 5005 | */ |
| 5006 | static int adap_init0_tweaks(struct adapter *adapter) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5007 | { |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5008 | /* |
| 5009 | * Fix up various Host-Dependent Parameters like Page Size, Cache |
| 5010 | * Line Size, etc. The firmware default is for a 4KB Page Size and |
| 5011 | * 64B Cache Line Size ... |
| 5012 | */ |
| 5013 | t4_fixup_host_params(adapter, PAGE_SIZE, L1_CACHE_BYTES); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5014 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5015 | /* |
| 5016 | * Process module parameters which affect early initialization. |
| 5017 | */ |
| 5018 | if (rx_dma_offset != 2 && rx_dma_offset != 0) { |
| 5019 | dev_err(&adapter->pdev->dev, |
| 5020 | "Ignoring illegal rx_dma_offset=%d, using 2\n", |
| 5021 | rx_dma_offset); |
| 5022 | rx_dma_offset = 2; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5023 | } |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5024 | t4_set_reg_field(adapter, SGE_CONTROL, |
| 5025 | PKTSHIFT_MASK, |
| 5026 | PKTSHIFT(rx_dma_offset)); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5027 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5028 | /* |
| 5029 | * Don't include the "IP Pseudo Header" in CPL_RX_PKT checksums: Linux |
| 5030 | * adds the pseudo header itself. |
| 5031 | */ |
| 5032 | t4_tp_wr_bits_indirect(adapter, TP_INGRESS_CONFIG, |
| 5033 | CSUM_HAS_PSEUDO_HDR, 0); |
| 5034 | |
| 5035 | return 0; |
| 5036 | } |
| 5037 | |
| 5038 | /* |
| 5039 | * Attempt to initialize the adapter via a Firmware Configuration File. |
| 5040 | */ |
| 5041 | static int adap_init0_config(struct adapter *adapter, int reset) |
| 5042 | { |
| 5043 | struct fw_caps_config_cmd caps_cmd; |
| 5044 | const struct firmware *cf; |
| 5045 | unsigned long mtype = 0, maddr = 0; |
| 5046 | u32 finiver, finicsum, cfcsum; |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5047 | int ret; |
| 5048 | int config_issued = 0; |
Santosh Rastapur | 0a57a53 | 2013-03-14 05:08:49 +0000 | [diff] [blame] | 5049 | char *fw_config_file, fw_config_file_path[256]; |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5050 | char *config_name = NULL; |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5051 | |
| 5052 | /* |
| 5053 | * Reset device if necessary. |
| 5054 | */ |
| 5055 | if (reset) { |
| 5056 | ret = t4_fw_reset(adapter, adapter->mbox, |
| 5057 | PIORSTMODE | PIORST); |
| 5058 | if (ret < 0) |
| 5059 | goto bye; |
| 5060 | } |
| 5061 | |
| 5062 | /* |
| 5063 | * If we have a T4 configuration file under /lib/firmware/cxgb4/, |
| 5064 | * then use that. Otherwise, use the configuration file stored |
| 5065 | * in the adapter flash ... |
| 5066 | */ |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 5067 | switch (CHELSIO_CHIP_VERSION(adapter->params.chip)) { |
Santosh Rastapur | 0a57a53 | 2013-03-14 05:08:49 +0000 | [diff] [blame] | 5068 | case CHELSIO_T4: |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5069 | fw_config_file = FW4_CFNAME; |
Santosh Rastapur | 0a57a53 | 2013-03-14 05:08:49 +0000 | [diff] [blame] | 5070 | break; |
| 5071 | case CHELSIO_T5: |
| 5072 | fw_config_file = FW5_CFNAME; |
| 5073 | break; |
| 5074 | default: |
| 5075 | dev_err(adapter->pdev_dev, "Device %d is not supported\n", |
| 5076 | adapter->pdev->device); |
| 5077 | ret = -EINVAL; |
| 5078 | goto bye; |
| 5079 | } |
| 5080 | |
| 5081 | ret = request_firmware(&cf, fw_config_file, adapter->pdev_dev); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5082 | if (ret < 0) { |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5083 | config_name = "On FLASH"; |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5084 | mtype = FW_MEMTYPE_CF_FLASH; |
| 5085 | maddr = t4_flash_cfg_addr(adapter); |
| 5086 | } else { |
| 5087 | u32 params[7], val[7]; |
| 5088 | |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5089 | sprintf(fw_config_file_path, |
| 5090 | "/lib/firmware/%s", fw_config_file); |
| 5091 | config_name = fw_config_file_path; |
| 5092 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5093 | if (cf->size >= FLASH_CFG_MAX_SIZE) |
| 5094 | ret = -ENOMEM; |
| 5095 | else { |
| 5096 | params[0] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | |
| 5097 | FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_CF)); |
| 5098 | ret = t4_query_params(adapter, adapter->mbox, |
| 5099 | adapter->fn, 0, 1, params, val); |
| 5100 | if (ret == 0) { |
| 5101 | /* |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 5102 | * For t4_memory_rw() below addresses and |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5103 | * sizes have to be in terms of multiples of 4 |
| 5104 | * bytes. So, if the Configuration File isn't |
| 5105 | * a multiple of 4 bytes in length we'll have |
| 5106 | * to write that out separately since we can't |
| 5107 | * guarantee that the bytes following the |
| 5108 | * residual byte in the buffer returned by |
| 5109 | * request_firmware() are zeroed out ... |
| 5110 | */ |
| 5111 | size_t resid = cf->size & 0x3; |
| 5112 | size_t size = cf->size & ~0x3; |
| 5113 | __be32 *data = (__be32 *)cf->data; |
| 5114 | |
| 5115 | mtype = FW_PARAMS_PARAM_Y_GET(val[0]); |
| 5116 | maddr = FW_PARAMS_PARAM_Z_GET(val[0]) << 16; |
| 5117 | |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 5118 | spin_lock(&adapter->win0_lock); |
| 5119 | ret = t4_memory_rw(adapter, 0, mtype, maddr, |
| 5120 | size, data, T4_MEMORY_WRITE); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5121 | if (ret == 0 && resid != 0) { |
| 5122 | union { |
| 5123 | __be32 word; |
| 5124 | char buf[4]; |
| 5125 | } last; |
| 5126 | int i; |
| 5127 | |
| 5128 | last.word = data[size >> 2]; |
| 5129 | for (i = resid; i < 4; i++) |
| 5130 | last.buf[i] = 0; |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 5131 | ret = t4_memory_rw(adapter, 0, mtype, |
| 5132 | maddr + size, |
| 5133 | 4, &last.word, |
| 5134 | T4_MEMORY_WRITE); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5135 | } |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 5136 | spin_unlock(&adapter->win0_lock); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5137 | } |
| 5138 | } |
| 5139 | |
| 5140 | release_firmware(cf); |
| 5141 | if (ret) |
| 5142 | goto bye; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5143 | } |
| 5144 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5145 | /* |
| 5146 | * Issue a Capability Configuration command to the firmware to get it |
| 5147 | * to parse the Configuration File. We don't use t4_fw_config_file() |
| 5148 | * because we want the ability to modify various features after we've |
| 5149 | * processed the configuration file ... |
| 5150 | */ |
| 5151 | memset(&caps_cmd, 0, sizeof(caps_cmd)); |
| 5152 | caps_cmd.op_to_write = |
| 5153 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | |
| 5154 | FW_CMD_REQUEST | |
| 5155 | FW_CMD_READ); |
Naresh Kumar Inna | ce91a92 | 2012-11-15 22:41:17 +0530 | [diff] [blame] | 5156 | caps_cmd.cfvalid_to_len16 = |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5157 | htonl(FW_CAPS_CONFIG_CMD_CFVALID | |
| 5158 | FW_CAPS_CONFIG_CMD_MEMTYPE_CF(mtype) | |
| 5159 | FW_CAPS_CONFIG_CMD_MEMADDR64K_CF(maddr >> 16) | |
| 5160 | FW_LEN16(caps_cmd)); |
| 5161 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), |
| 5162 | &caps_cmd); |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5163 | |
| 5164 | /* If the CAPS_CONFIG failed with an ENOENT (for a Firmware |
| 5165 | * Configuration File in FLASH), our last gasp effort is to use the |
| 5166 | * Firmware Configuration File which is embedded in the firmware. A |
| 5167 | * very few early versions of the firmware didn't have one embedded |
| 5168 | * but we can ignore those. |
| 5169 | */ |
| 5170 | if (ret == -ENOENT) { |
| 5171 | memset(&caps_cmd, 0, sizeof(caps_cmd)); |
| 5172 | caps_cmd.op_to_write = |
| 5173 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | |
| 5174 | FW_CMD_REQUEST | |
| 5175 | FW_CMD_READ); |
| 5176 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); |
| 5177 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, |
| 5178 | sizeof(caps_cmd), &caps_cmd); |
| 5179 | config_name = "Firmware Default"; |
| 5180 | } |
| 5181 | |
| 5182 | config_issued = 1; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5183 | if (ret < 0) |
| 5184 | goto bye; |
| 5185 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5186 | finiver = ntohl(caps_cmd.finiver); |
| 5187 | finicsum = ntohl(caps_cmd.finicsum); |
| 5188 | cfcsum = ntohl(caps_cmd.cfcsum); |
| 5189 | if (finicsum != cfcsum) |
| 5190 | dev_warn(adapter->pdev_dev, "Configuration File checksum "\ |
| 5191 | "mismatch: [fini] csum=%#x, computed csum=%#x\n", |
| 5192 | finicsum, cfcsum); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5193 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5194 | /* |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5195 | * And now tell the firmware to use the configuration we just loaded. |
| 5196 | */ |
| 5197 | caps_cmd.op_to_write = |
| 5198 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | |
| 5199 | FW_CMD_REQUEST | |
| 5200 | FW_CMD_WRITE); |
Naresh Kumar Inna | ce91a92 | 2012-11-15 22:41:17 +0530 | [diff] [blame] | 5201 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5202 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), |
| 5203 | NULL); |
Dimitris Michailidis | a0881ca | 2010-06-18 10:05:34 +0000 | [diff] [blame] | 5204 | if (ret < 0) |
| 5205 | goto bye; |
| 5206 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5207 | /* |
| 5208 | * Tweak configuration based on system architecture, module |
| 5209 | * parameters, etc. |
| 5210 | */ |
| 5211 | ret = adap_init0_tweaks(adapter); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5212 | if (ret < 0) |
| 5213 | goto bye; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5214 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5215 | /* |
| 5216 | * And finally tell the firmware to initialize itself using the |
| 5217 | * parameters from the Configuration File. |
| 5218 | */ |
| 5219 | ret = t4_fw_initialize(adapter, adapter->mbox); |
| 5220 | if (ret < 0) |
| 5221 | goto bye; |
| 5222 | |
| 5223 | /* |
| 5224 | * Return successfully and note that we're operating with parameters |
| 5225 | * not supplied by the driver, rather than from hard-wired |
| 5226 | * initialization constants burried in the driver. |
| 5227 | */ |
| 5228 | adapter->flags |= USING_SOFT_PARAMS; |
| 5229 | dev_info(adapter->pdev_dev, "Successfully configured using Firmware "\ |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5230 | "Configuration File \"%s\", version %#x, computed checksum %#x\n", |
| 5231 | config_name, finiver, cfcsum); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5232 | return 0; |
| 5233 | |
| 5234 | /* |
| 5235 | * Something bad happened. Return the error ... (If the "error" |
| 5236 | * is that there's no Configuration File on the adapter we don't |
| 5237 | * want to issue a warning since this is fairly common.) |
| 5238 | */ |
| 5239 | bye: |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5240 | if (config_issued && ret != -ENOENT) |
| 5241 | dev_warn(adapter->pdev_dev, "\"%s\" configuration file error %d\n", |
| 5242 | config_name, -ret); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5243 | return ret; |
| 5244 | } |
| 5245 | |
| 5246 | /* |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5247 | * Attempt to initialize the adapter via hard-coded, driver supplied |
| 5248 | * parameters ... |
| 5249 | */ |
| 5250 | static int adap_init0_no_config(struct adapter *adapter, int reset) |
| 5251 | { |
| 5252 | struct sge *s = &adapter->sge; |
| 5253 | struct fw_caps_config_cmd caps_cmd; |
| 5254 | u32 v; |
| 5255 | int i, ret; |
| 5256 | |
| 5257 | /* |
| 5258 | * Reset device if necessary |
| 5259 | */ |
| 5260 | if (reset) { |
| 5261 | ret = t4_fw_reset(adapter, adapter->mbox, |
| 5262 | PIORSTMODE | PIORST); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5263 | if (ret < 0) |
| 5264 | goto bye; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5265 | } |
Dimitris Michailidis | a0881ca | 2010-06-18 10:05:34 +0000 | [diff] [blame] | 5266 | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5267 | /* |
| 5268 | * Get device capabilities and select which we'll be using. |
| 5269 | */ |
| 5270 | memset(&caps_cmd, 0, sizeof(caps_cmd)); |
| 5271 | caps_cmd.op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | |
| 5272 | FW_CMD_REQUEST | FW_CMD_READ); |
Naresh Kumar Inna | ce91a92 | 2012-11-15 22:41:17 +0530 | [diff] [blame] | 5273 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5274 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), |
| 5275 | &caps_cmd); |
| 5276 | if (ret < 0) |
| 5277 | goto bye; |
| 5278 | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5279 | if (caps_cmd.niccaps & htons(FW_CAPS_CONFIG_NIC_VM)) { |
| 5280 | if (!vf_acls) |
| 5281 | caps_cmd.niccaps ^= htons(FW_CAPS_CONFIG_NIC_VM); |
| 5282 | else |
| 5283 | caps_cmd.niccaps = htons(FW_CAPS_CONFIG_NIC_VM); |
| 5284 | } else if (vf_acls) { |
| 5285 | dev_err(adapter->pdev_dev, "virtualization ACLs not supported"); |
| 5286 | goto bye; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5287 | } |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5288 | caps_cmd.op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | |
| 5289 | FW_CMD_REQUEST | FW_CMD_WRITE); |
| 5290 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), |
| 5291 | NULL); |
| 5292 | if (ret < 0) |
| 5293 | goto bye; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5294 | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5295 | /* |
| 5296 | * Tweak configuration based on system architecture, module |
| 5297 | * parameters, etc. |
| 5298 | */ |
| 5299 | ret = adap_init0_tweaks(adapter); |
| 5300 | if (ret < 0) |
| 5301 | goto bye; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5302 | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5303 | /* |
| 5304 | * Select RSS Global Mode we want to use. We use "Basic Virtual" |
| 5305 | * mode which maps each Virtual Interface to its own section of |
| 5306 | * the RSS Table and we turn on all map and hash enables ... |
| 5307 | */ |
| 5308 | adapter->flags |= RSS_TNLALLLOOKUP; |
| 5309 | ret = t4_config_glbl_rss(adapter, adapter->mbox, |
| 5310 | FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL, |
| 5311 | FW_RSS_GLB_CONFIG_CMD_TNLMAPEN | |
| 5312 | FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ | |
| 5313 | ((adapter->flags & RSS_TNLALLLOOKUP) ? |
| 5314 | FW_RSS_GLB_CONFIG_CMD_TNLALLLKP : 0)); |
| 5315 | if (ret < 0) |
| 5316 | goto bye; |
| 5317 | |
| 5318 | /* |
| 5319 | * Set up our own fundamental resource provisioning ... |
| 5320 | */ |
| 5321 | ret = t4_cfg_pfvf(adapter, adapter->mbox, adapter->fn, 0, |
| 5322 | PFRES_NEQ, PFRES_NETHCTRL, |
| 5323 | PFRES_NIQFLINT, PFRES_NIQ, |
| 5324 | PFRES_TC, PFRES_NVI, |
| 5325 | FW_PFVF_CMD_CMASK_MASK, |
| 5326 | pfvfres_pmask(adapter, adapter->fn, 0), |
| 5327 | PFRES_NEXACTF, |
| 5328 | PFRES_R_CAPS, PFRES_WX_CAPS); |
| 5329 | if (ret < 0) |
| 5330 | goto bye; |
| 5331 | |
| 5332 | /* |
| 5333 | * Perform low level SGE initialization. We need to do this before we |
| 5334 | * send the firmware the INITIALIZE command because that will cause |
| 5335 | * any other PF Drivers which are waiting for the Master |
| 5336 | * Initialization to proceed forward. |
| 5337 | */ |
| 5338 | for (i = 0; i < SGE_NTIMERS - 1; i++) |
| 5339 | s->timer_val[i] = min(intr_holdoff[i], MAX_SGE_TIMERVAL); |
| 5340 | s->timer_val[SGE_NTIMERS - 1] = MAX_SGE_TIMERVAL; |
| 5341 | s->counter_val[0] = 1; |
| 5342 | for (i = 1; i < SGE_NCOUNTERS; i++) |
| 5343 | s->counter_val[i] = min(intr_cnt[i - 1], |
| 5344 | THRESHOLD_0_GET(THRESHOLD_0_MASK)); |
| 5345 | t4_sge_init(adapter); |
Casey Leedom | 7ee9ff9 | 2010-06-25 12:11:46 +0000 | [diff] [blame] | 5346 | |
| 5347 | #ifdef CONFIG_PCI_IOV |
| 5348 | /* |
| 5349 | * Provision resource limits for Virtual Functions. We currently |
| 5350 | * grant them all the same static resource limits except for the Port |
| 5351 | * Access Rights Mask which we're assigning based on the PF. All of |
| 5352 | * the static provisioning stuff for both the PF and VF really needs |
| 5353 | * to be managed in a persistent manner for each device which the |
| 5354 | * firmware controls. |
| 5355 | */ |
| 5356 | { |
| 5357 | int pf, vf; |
| 5358 | |
Santosh Rastapur | 7d6727c | 2013-03-14 05:08:56 +0000 | [diff] [blame] | 5359 | for (pf = 0; pf < ARRAY_SIZE(num_vf); pf++) { |
Casey Leedom | 7ee9ff9 | 2010-06-25 12:11:46 +0000 | [diff] [blame] | 5360 | if (num_vf[pf] <= 0) |
| 5361 | continue; |
| 5362 | |
| 5363 | /* VF numbering starts at 1! */ |
| 5364 | for (vf = 1; vf <= num_vf[pf]; vf++) { |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5365 | ret = t4_cfg_pfvf(adapter, adapter->mbox, |
| 5366 | pf, vf, |
Casey Leedom | 7ee9ff9 | 2010-06-25 12:11:46 +0000 | [diff] [blame] | 5367 | VFRES_NEQ, VFRES_NETHCTRL, |
| 5368 | VFRES_NIQFLINT, VFRES_NIQ, |
| 5369 | VFRES_TC, VFRES_NVI, |
Vipul Pandya | 1f1e495 | 2013-01-09 07:42:49 +0000 | [diff] [blame] | 5370 | FW_PFVF_CMD_CMASK_MASK, |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5371 | pfvfres_pmask( |
| 5372 | adapter, pf, vf), |
Casey Leedom | 7ee9ff9 | 2010-06-25 12:11:46 +0000 | [diff] [blame] | 5373 | VFRES_NEXACTF, |
| 5374 | VFRES_R_CAPS, VFRES_WX_CAPS); |
| 5375 | if (ret < 0) |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5376 | dev_warn(adapter->pdev_dev, |
| 5377 | "failed to "\ |
Casey Leedom | 7ee9ff9 | 2010-06-25 12:11:46 +0000 | [diff] [blame] | 5378 | "provision pf/vf=%d/%d; " |
| 5379 | "err=%d\n", pf, vf, ret); |
| 5380 | } |
| 5381 | } |
| 5382 | } |
| 5383 | #endif |
| 5384 | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5385 | /* |
| 5386 | * Set up the default filter mode. Later we'll want to implement this |
| 5387 | * via a firmware command, etc. ... This needs to be done before the |
| 5388 | * firmare initialization command ... If the selected set of fields |
| 5389 | * isn't equal to the default value, we'll need to make sure that the |
| 5390 | * field selections will fit in the 36-bit budget. |
| 5391 | */ |
| 5392 | if (tp_vlan_pri_map != TP_VLAN_PRI_MAP_DEFAULT) { |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 5393 | int j, bits = 0; |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5394 | |
Vipul Pandya | 404d9e3 | 2012-10-08 02:59:43 +0000 | [diff] [blame] | 5395 | for (j = TP_VLAN_PRI_MAP_FIRST; j <= TP_VLAN_PRI_MAP_LAST; j++) |
| 5396 | switch (tp_vlan_pri_map & (1 << j)) { |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5397 | case 0: |
| 5398 | /* compressed filter field not enabled */ |
| 5399 | break; |
| 5400 | case FCOE_MASK: |
| 5401 | bits += 1; |
| 5402 | break; |
| 5403 | case PORT_MASK: |
| 5404 | bits += 3; |
| 5405 | break; |
| 5406 | case VNIC_ID_MASK: |
| 5407 | bits += 17; |
| 5408 | break; |
| 5409 | case VLAN_MASK: |
| 5410 | bits += 17; |
| 5411 | break; |
| 5412 | case TOS_MASK: |
| 5413 | bits += 8; |
| 5414 | break; |
| 5415 | case PROTOCOL_MASK: |
| 5416 | bits += 8; |
| 5417 | break; |
| 5418 | case ETHERTYPE_MASK: |
| 5419 | bits += 16; |
| 5420 | break; |
| 5421 | case MACMATCH_MASK: |
| 5422 | bits += 9; |
| 5423 | break; |
| 5424 | case MPSHITTYPE_MASK: |
| 5425 | bits += 3; |
| 5426 | break; |
| 5427 | case FRAGMENTATION_MASK: |
| 5428 | bits += 1; |
| 5429 | break; |
| 5430 | } |
| 5431 | |
| 5432 | if (bits > 36) { |
| 5433 | dev_err(adapter->pdev_dev, |
| 5434 | "tp_vlan_pri_map=%#x needs %d bits > 36;"\ |
| 5435 | " using %#x\n", tp_vlan_pri_map, bits, |
| 5436 | TP_VLAN_PRI_MAP_DEFAULT); |
| 5437 | tp_vlan_pri_map = TP_VLAN_PRI_MAP_DEFAULT; |
| 5438 | } |
| 5439 | } |
| 5440 | v = tp_vlan_pri_map; |
| 5441 | t4_write_indirect(adapter, TP_PIO_ADDR, TP_PIO_DATA, |
| 5442 | &v, 1, TP_VLAN_PRI_MAP); |
| 5443 | |
| 5444 | /* |
| 5445 | * We need Five Tuple Lookup mode to be set in TP_GLOBAL_CONFIG order |
| 5446 | * to support any of the compressed filter fields above. Newer |
| 5447 | * versions of the firmware do this automatically but it doesn't hurt |
| 5448 | * to set it here. Meanwhile, we do _not_ need to set Lookup Every |
| 5449 | * Packet in TP_INGRESS_CONFIG to support matching non-TCP packets |
| 5450 | * since the firmware automatically turns this on and off when we have |
| 5451 | * a non-zero number of filters active (since it does have a |
| 5452 | * performance impact). |
| 5453 | */ |
| 5454 | if (tp_vlan_pri_map) |
| 5455 | t4_set_reg_field(adapter, TP_GLOBAL_CONFIG, |
| 5456 | FIVETUPLELOOKUP_MASK, |
| 5457 | FIVETUPLELOOKUP_MASK); |
| 5458 | |
| 5459 | /* |
| 5460 | * Tweak some settings. |
| 5461 | */ |
| 5462 | t4_write_reg(adapter, TP_SHIFT_CNT, SYNSHIFTMAX(6) | |
| 5463 | RXTSHIFTMAXR1(4) | RXTSHIFTMAXR2(15) | |
| 5464 | PERSHIFTBACKOFFMAX(8) | PERSHIFTMAX(8) | |
| 5465 | KEEPALIVEMAXR1(4) | KEEPALIVEMAXR2(9)); |
| 5466 | |
| 5467 | /* |
| 5468 | * Get basic stuff going by issuing the Firmware Initialize command. |
| 5469 | * Note that this _must_ be after all PFVF commands ... |
| 5470 | */ |
| 5471 | ret = t4_fw_initialize(adapter, adapter->mbox); |
| 5472 | if (ret < 0) |
| 5473 | goto bye; |
| 5474 | |
| 5475 | /* |
| 5476 | * Return successfully! |
| 5477 | */ |
| 5478 | dev_info(adapter->pdev_dev, "Successfully configured using built-in "\ |
| 5479 | "driver parameters\n"); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5480 | return 0; |
| 5481 | |
| 5482 | /* |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5483 | * Something bad happened. Return the error ... |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5484 | */ |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5485 | bye: |
| 5486 | return ret; |
| 5487 | } |
| 5488 | |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5489 | static struct fw_info fw_info_array[] = { |
| 5490 | { |
| 5491 | .chip = CHELSIO_T4, |
| 5492 | .fs_name = FW4_CFNAME, |
| 5493 | .fw_mod_name = FW4_FNAME, |
| 5494 | .fw_hdr = { |
| 5495 | .chip = FW_HDR_CHIP_T4, |
| 5496 | .fw_ver = __cpu_to_be32(FW_VERSION(T4)), |
| 5497 | .intfver_nic = FW_INTFVER(T4, NIC), |
| 5498 | .intfver_vnic = FW_INTFVER(T4, VNIC), |
| 5499 | .intfver_ri = FW_INTFVER(T4, RI), |
| 5500 | .intfver_iscsi = FW_INTFVER(T4, ISCSI), |
| 5501 | .intfver_fcoe = FW_INTFVER(T4, FCOE), |
| 5502 | }, |
| 5503 | }, { |
| 5504 | .chip = CHELSIO_T5, |
| 5505 | .fs_name = FW5_CFNAME, |
| 5506 | .fw_mod_name = FW5_FNAME, |
| 5507 | .fw_hdr = { |
| 5508 | .chip = FW_HDR_CHIP_T5, |
| 5509 | .fw_ver = __cpu_to_be32(FW_VERSION(T5)), |
| 5510 | .intfver_nic = FW_INTFVER(T5, NIC), |
| 5511 | .intfver_vnic = FW_INTFVER(T5, VNIC), |
| 5512 | .intfver_ri = FW_INTFVER(T5, RI), |
| 5513 | .intfver_iscsi = FW_INTFVER(T5, ISCSI), |
| 5514 | .intfver_fcoe = FW_INTFVER(T5, FCOE), |
| 5515 | }, |
| 5516 | } |
| 5517 | }; |
| 5518 | |
| 5519 | static struct fw_info *find_fw_info(int chip) |
| 5520 | { |
| 5521 | int i; |
| 5522 | |
| 5523 | for (i = 0; i < ARRAY_SIZE(fw_info_array); i++) { |
| 5524 | if (fw_info_array[i].chip == chip) |
| 5525 | return &fw_info_array[i]; |
| 5526 | } |
| 5527 | return NULL; |
| 5528 | } |
| 5529 | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5530 | /* |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5531 | * Phase 0 of initialization: contact FW, obtain config, perform basic init. |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5532 | */ |
| 5533 | static int adap_init0(struct adapter *adap) |
| 5534 | { |
| 5535 | int ret; |
| 5536 | u32 v, port_vec; |
| 5537 | enum dev_state state; |
| 5538 | u32 params[7], val[7]; |
Vipul Pandya | 9a4da2c | 2012-10-19 02:09:53 +0000 | [diff] [blame] | 5539 | struct fw_caps_config_cmd caps_cmd; |
Kumar Sanghvi | dcf7b6f | 2013-12-18 16:38:23 +0530 | [diff] [blame] | 5540 | int reset = 1; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5541 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5542 | /* |
| 5543 | * Contact FW, advertising Master capability (and potentially forcing |
| 5544 | * ourselves as the Master PF if our module parameter force_init is |
| 5545 | * set). |
| 5546 | */ |
| 5547 | ret = t4_fw_hello(adap, adap->mbox, adap->fn, |
| 5548 | force_init ? MASTER_MUST : MASTER_MAY, |
| 5549 | &state); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5550 | if (ret < 0) { |
| 5551 | dev_err(adap->pdev_dev, "could not connect to FW, error %d\n", |
| 5552 | ret); |
| 5553 | return ret; |
| 5554 | } |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5555 | if (ret == adap->mbox) |
| 5556 | adap->flags |= MASTER_PF; |
| 5557 | if (force_init && state == DEV_STATE_INIT) |
| 5558 | state = DEV_STATE_UNINIT; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5559 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5560 | /* |
| 5561 | * If we're the Master PF Driver and the device is uninitialized, |
| 5562 | * then let's consider upgrading the firmware ... (We always want |
| 5563 | * to check the firmware version number in order to A. get it for |
| 5564 | * later reporting and B. to warn if the currently loaded firmware |
| 5565 | * is excessively mismatched relative to the driver.) |
| 5566 | */ |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5567 | t4_get_fw_version(adap, &adap->params.fw_vers); |
| 5568 | t4_get_tp_version(adap, &adap->params.tp_vers); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5569 | if ((adap->flags & MASTER_PF) && state != DEV_STATE_INIT) { |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5570 | struct fw_info *fw_info; |
| 5571 | struct fw_hdr *card_fw; |
| 5572 | const struct firmware *fw; |
| 5573 | const u8 *fw_data = NULL; |
| 5574 | unsigned int fw_size = 0; |
| 5575 | |
| 5576 | /* This is the firmware whose headers the driver was compiled |
| 5577 | * against |
| 5578 | */ |
| 5579 | fw_info = find_fw_info(CHELSIO_CHIP_VERSION(adap->params.chip)); |
| 5580 | if (fw_info == NULL) { |
| 5581 | dev_err(adap->pdev_dev, |
| 5582 | "unable to get firmware info for chip %d.\n", |
| 5583 | CHELSIO_CHIP_VERSION(adap->params.chip)); |
| 5584 | return -EINVAL; |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5585 | } |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5586 | |
| 5587 | /* allocate memory to read the header of the firmware on the |
| 5588 | * card |
| 5589 | */ |
| 5590 | card_fw = t4_alloc_mem(sizeof(*card_fw)); |
| 5591 | |
| 5592 | /* Get FW from from /lib/firmware/ */ |
| 5593 | ret = request_firmware(&fw, fw_info->fw_mod_name, |
| 5594 | adap->pdev_dev); |
| 5595 | if (ret < 0) { |
| 5596 | dev_err(adap->pdev_dev, |
| 5597 | "unable to load firmware image %s, error %d\n", |
| 5598 | fw_info->fw_mod_name, ret); |
| 5599 | } else { |
| 5600 | fw_data = fw->data; |
| 5601 | fw_size = fw->size; |
| 5602 | } |
| 5603 | |
| 5604 | /* upgrade FW logic */ |
| 5605 | ret = t4_prep_fw(adap, fw_info, fw_data, fw_size, card_fw, |
| 5606 | state, &reset); |
| 5607 | |
| 5608 | /* Cleaning up */ |
| 5609 | if (fw != NULL) |
| 5610 | release_firmware(fw); |
| 5611 | t4_free_mem(card_fw); |
| 5612 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5613 | if (ret < 0) |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5614 | goto bye; |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5615 | } |
| 5616 | |
| 5617 | /* |
| 5618 | * Grab VPD parameters. This should be done after we establish a |
| 5619 | * connection to the firmware since some of the VPD parameters |
| 5620 | * (notably the Core Clock frequency) are retrieved via requests to |
| 5621 | * the firmware. On the other hand, we need these fairly early on |
| 5622 | * so we do this right after getting ahold of the firmware. |
| 5623 | */ |
| 5624 | ret = get_vpd_params(adap, &adap->params.vpd); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5625 | if (ret < 0) |
| 5626 | goto bye; |
| 5627 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5628 | /* |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5629 | * Find out what ports are available to us. Note that we need to do |
| 5630 | * this before calling adap_init0_no_config() since it needs nports |
| 5631 | * and portvec ... |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5632 | */ |
| 5633 | v = |
| 5634 | FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | |
| 5635 | FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_PORTVEC); |
| 5636 | ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 1, &v, &port_vec); |
| 5637 | if (ret < 0) |
| 5638 | goto bye; |
| 5639 | |
| 5640 | adap->params.nports = hweight32(port_vec); |
| 5641 | adap->params.portvec = port_vec; |
| 5642 | |
| 5643 | /* |
| 5644 | * If the firmware is initialized already (and we're not forcing a |
| 5645 | * master initialization), note that we're living with existing |
| 5646 | * adapter parameters. Otherwise, it's time to try initializing the |
| 5647 | * adapter ... |
| 5648 | */ |
| 5649 | if (state == DEV_STATE_INIT) { |
| 5650 | dev_info(adap->pdev_dev, "Coming up as %s: "\ |
| 5651 | "Adapter already initialized\n", |
| 5652 | adap->flags & MASTER_PF ? "MASTER" : "SLAVE"); |
| 5653 | adap->flags |= USING_SOFT_PARAMS; |
| 5654 | } else { |
| 5655 | dev_info(adap->pdev_dev, "Coming up as MASTER: "\ |
| 5656 | "Initializing adapter\n"); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5657 | |
| 5658 | /* |
| 5659 | * If the firmware doesn't support Configuration |
| 5660 | * Files warn user and exit, |
| 5661 | */ |
| 5662 | if (ret < 0) |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5663 | dev_warn(adap->pdev_dev, "Firmware doesn't support " |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5664 | "configuration file.\n"); |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5665 | if (force_old_init) |
| 5666 | ret = adap_init0_no_config(adap, reset); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5667 | else { |
| 5668 | /* |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5669 | * Find out whether we're dealing with a version of |
| 5670 | * the firmware which has configuration file support. |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5671 | */ |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5672 | params[0] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | |
| 5673 | FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_CF)); |
| 5674 | ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 1, |
| 5675 | params, val); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5676 | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5677 | /* |
| 5678 | * If the firmware doesn't support Configuration |
| 5679 | * Files, use the old Driver-based, hard-wired |
| 5680 | * initialization. Otherwise, try using the |
| 5681 | * Configuration File support and fall back to the |
| 5682 | * Driver-based initialization if there's no |
| 5683 | * Configuration File found. |
| 5684 | */ |
| 5685 | if (ret < 0) |
| 5686 | ret = adap_init0_no_config(adap, reset); |
| 5687 | else { |
| 5688 | /* |
| 5689 | * The firmware provides us with a memory |
| 5690 | * buffer where we can load a Configuration |
| 5691 | * File from the host if we want to override |
| 5692 | * the Configuration File in flash. |
| 5693 | */ |
| 5694 | |
| 5695 | ret = adap_init0_config(adap, reset); |
| 5696 | if (ret == -ENOENT) { |
| 5697 | dev_info(adap->pdev_dev, |
| 5698 | "No Configuration File present " |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 5699 | "on adapter. Using hard-wired " |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5700 | "configuration parameters.\n"); |
| 5701 | ret = adap_init0_no_config(adap, reset); |
| 5702 | } |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5703 | } |
| 5704 | } |
| 5705 | if (ret < 0) { |
| 5706 | dev_err(adap->pdev_dev, |
| 5707 | "could not initialize adapter, error %d\n", |
| 5708 | -ret); |
| 5709 | goto bye; |
| 5710 | } |
| 5711 | } |
| 5712 | |
| 5713 | /* |
| 5714 | * If we're living with non-hard-coded parameters (either from a |
| 5715 | * Firmware Configuration File or values programmed by a different PF |
| 5716 | * Driver), give the SGE code a chance to pull in anything that it |
| 5717 | * needs ... Note that this must be called after we retrieve our VPD |
| 5718 | * parameters in order to know how to convert core ticks to seconds. |
| 5719 | */ |
| 5720 | if (adap->flags & USING_SOFT_PARAMS) { |
| 5721 | ret = t4_sge_init(adap); |
| 5722 | if (ret < 0) |
| 5723 | goto bye; |
| 5724 | } |
| 5725 | |
Vipul Pandya | 9a4da2c | 2012-10-19 02:09:53 +0000 | [diff] [blame] | 5726 | if (is_bypass_device(adap->pdev->device)) |
| 5727 | adap->params.bypass = 1; |
| 5728 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5729 | /* |
| 5730 | * Grab some of our basic fundamental operating parameters. |
| 5731 | */ |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5732 | #define FW_PARAM_DEV(param) \ |
| 5733 | (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | \ |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5734 | FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_##param)) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5735 | |
| 5736 | #define FW_PARAM_PFVF(param) \ |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5737 | FW_PARAMS_MNEM(FW_PARAMS_MNEM_PFVF) | \ |
| 5738 | FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_PFVF_##param)| \ |
| 5739 | FW_PARAMS_PARAM_Y(0) | \ |
| 5740 | FW_PARAMS_PARAM_Z(0) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5741 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5742 | params[0] = FW_PARAM_PFVF(EQ_START); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5743 | params[1] = FW_PARAM_PFVF(L2T_START); |
| 5744 | params[2] = FW_PARAM_PFVF(L2T_END); |
| 5745 | params[3] = FW_PARAM_PFVF(FILTER_START); |
| 5746 | params[4] = FW_PARAM_PFVF(FILTER_END); |
| 5747 | params[5] = FW_PARAM_PFVF(IQFLINT_START); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5748 | ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 6, params, val); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5749 | if (ret < 0) |
| 5750 | goto bye; |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5751 | adap->sge.egr_start = val[0]; |
| 5752 | adap->l2t_start = val[1]; |
| 5753 | adap->l2t_end = val[2]; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5754 | adap->tids.ftid_base = val[3]; |
| 5755 | adap->tids.nftids = val[4] - val[3] + 1; |
| 5756 | adap->sge.ingr_start = val[5]; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5757 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5758 | /* query params related to active filter region */ |
| 5759 | params[0] = FW_PARAM_PFVF(ACTIVE_FILTER_START); |
| 5760 | params[1] = FW_PARAM_PFVF(ACTIVE_FILTER_END); |
| 5761 | ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2, params, val); |
| 5762 | /* If Active filter size is set we enable establishing |
| 5763 | * offload connection through firmware work request |
| 5764 | */ |
| 5765 | if ((val[0] != val[1]) && (ret >= 0)) { |
| 5766 | adap->flags |= FW_OFLD_CONN; |
| 5767 | adap->tids.aftid_base = val[0]; |
| 5768 | adap->tids.aftid_end = val[1]; |
| 5769 | } |
| 5770 | |
Vipul Pandya | b407a4a | 2013-04-29 04:04:40 +0000 | [diff] [blame] | 5771 | /* If we're running on newer firmware, let it know that we're |
| 5772 | * prepared to deal with encapsulated CPL messages. Older |
| 5773 | * firmware won't understand this and we'll just get |
| 5774 | * unencapsulated messages ... |
| 5775 | */ |
| 5776 | params[0] = FW_PARAM_PFVF(CPLFW4MSG_ENCAP); |
| 5777 | val[0] = 1; |
| 5778 | (void) t4_set_params(adap, adap->mbox, adap->fn, 0, 1, params, val); |
| 5779 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5780 | /* |
Kumar Sanghvi | 1ac0f09 | 2014-02-18 17:56:12 +0530 | [diff] [blame] | 5781 | * Find out whether we're allowed to use the T5+ ULPTX MEMWRITE DSGL |
| 5782 | * capability. Earlier versions of the firmware didn't have the |
| 5783 | * ULPTX_MEMWRITE_DSGL so we'll interpret a query failure as no |
| 5784 | * permission to use ULPTX MEMWRITE DSGL. |
| 5785 | */ |
| 5786 | if (is_t4(adap->params.chip)) { |
| 5787 | adap->params.ulptx_memwrite_dsgl = false; |
| 5788 | } else { |
| 5789 | params[0] = FW_PARAM_DEV(ULPTX_MEMWRITE_DSGL); |
| 5790 | ret = t4_query_params(adap, adap->mbox, adap->fn, 0, |
| 5791 | 1, params, val); |
| 5792 | adap->params.ulptx_memwrite_dsgl = (ret == 0 && val[0] != 0); |
| 5793 | } |
| 5794 | |
| 5795 | /* |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5796 | * Get device capabilities so we can determine what resources we need |
| 5797 | * to manage. |
| 5798 | */ |
| 5799 | memset(&caps_cmd, 0, sizeof(caps_cmd)); |
Vipul Pandya | 9a4da2c | 2012-10-19 02:09:53 +0000 | [diff] [blame] | 5800 | caps_cmd.op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5801 | FW_CMD_REQUEST | FW_CMD_READ); |
Naresh Kumar Inna | ce91a92 | 2012-11-15 22:41:17 +0530 | [diff] [blame] | 5802 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5803 | ret = t4_wr_mbox(adap, adap->mbox, &caps_cmd, sizeof(caps_cmd), |
| 5804 | &caps_cmd); |
| 5805 | if (ret < 0) |
| 5806 | goto bye; |
| 5807 | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 5808 | if (caps_cmd.ofldcaps) { |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5809 | /* query offload-related parameters */ |
| 5810 | params[0] = FW_PARAM_DEV(NTID); |
| 5811 | params[1] = FW_PARAM_PFVF(SERVER_START); |
| 5812 | params[2] = FW_PARAM_PFVF(SERVER_END); |
| 5813 | params[3] = FW_PARAM_PFVF(TDDP_START); |
| 5814 | params[4] = FW_PARAM_PFVF(TDDP_END); |
| 5815 | params[5] = FW_PARAM_DEV(FLOWC_BUFFIFO_SZ); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5816 | ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 6, |
| 5817 | params, val); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5818 | if (ret < 0) |
| 5819 | goto bye; |
| 5820 | adap->tids.ntids = val[0]; |
| 5821 | adap->tids.natids = min(adap->tids.ntids / 2, MAX_ATIDS); |
| 5822 | adap->tids.stid_base = val[1]; |
| 5823 | adap->tids.nstids = val[2] - val[1] + 1; |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5824 | /* |
| 5825 | * Setup server filter region. Divide the availble filter |
| 5826 | * region into two parts. Regular filters get 1/3rd and server |
| 5827 | * filters get 2/3rd part. This is only enabled if workarond |
| 5828 | * path is enabled. |
| 5829 | * 1. For regular filters. |
| 5830 | * 2. Server filter: This are special filters which are used |
| 5831 | * to redirect SYN packets to offload queue. |
| 5832 | */ |
| 5833 | if (adap->flags & FW_OFLD_CONN && !is_bypass(adap)) { |
| 5834 | adap->tids.sftid_base = adap->tids.ftid_base + |
| 5835 | DIV_ROUND_UP(adap->tids.nftids, 3); |
| 5836 | adap->tids.nsftids = adap->tids.nftids - |
| 5837 | DIV_ROUND_UP(adap->tids.nftids, 3); |
| 5838 | adap->tids.nftids = adap->tids.sftid_base - |
| 5839 | adap->tids.ftid_base; |
| 5840 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5841 | adap->vres.ddp.start = val[3]; |
| 5842 | adap->vres.ddp.size = val[4] - val[3] + 1; |
| 5843 | adap->params.ofldq_wr_cred = val[5]; |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5844 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5845 | adap->params.offload = 1; |
| 5846 | } |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5847 | if (caps_cmd.rdmacaps) { |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5848 | params[0] = FW_PARAM_PFVF(STAG_START); |
| 5849 | params[1] = FW_PARAM_PFVF(STAG_END); |
| 5850 | params[2] = FW_PARAM_PFVF(RQ_START); |
| 5851 | params[3] = FW_PARAM_PFVF(RQ_END); |
| 5852 | params[4] = FW_PARAM_PFVF(PBL_START); |
| 5853 | params[5] = FW_PARAM_PFVF(PBL_END); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5854 | ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 6, |
| 5855 | params, val); |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5856 | if (ret < 0) |
| 5857 | goto bye; |
| 5858 | adap->vres.stag.start = val[0]; |
| 5859 | adap->vres.stag.size = val[1] - val[0] + 1; |
| 5860 | adap->vres.rq.start = val[2]; |
| 5861 | adap->vres.rq.size = val[3] - val[2] + 1; |
| 5862 | adap->vres.pbl.start = val[4]; |
| 5863 | adap->vres.pbl.size = val[5] - val[4] + 1; |
| 5864 | |
| 5865 | params[0] = FW_PARAM_PFVF(SQRQ_START); |
| 5866 | params[1] = FW_PARAM_PFVF(SQRQ_END); |
| 5867 | params[2] = FW_PARAM_PFVF(CQ_START); |
| 5868 | params[3] = FW_PARAM_PFVF(CQ_END); |
| 5869 | params[4] = FW_PARAM_PFVF(OCQ_START); |
| 5870 | params[5] = FW_PARAM_PFVF(OCQ_END); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5871 | ret = t4_query_params(adap, 0, 0, 0, 6, params, val); |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5872 | if (ret < 0) |
| 5873 | goto bye; |
| 5874 | adap->vres.qp.start = val[0]; |
| 5875 | adap->vres.qp.size = val[1] - val[0] + 1; |
| 5876 | adap->vres.cq.start = val[2]; |
| 5877 | adap->vres.cq.size = val[3] - val[2] + 1; |
| 5878 | adap->vres.ocq.start = val[4]; |
| 5879 | adap->vres.ocq.size = val[5] - val[4] + 1; |
| 5880 | } |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5881 | if (caps_cmd.iscsicaps) { |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5882 | params[0] = FW_PARAM_PFVF(ISCSI_START); |
| 5883 | params[1] = FW_PARAM_PFVF(ISCSI_END); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5884 | ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2, |
| 5885 | params, val); |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5886 | if (ret < 0) |
| 5887 | goto bye; |
| 5888 | adap->vres.iscsi.start = val[0]; |
| 5889 | adap->vres.iscsi.size = val[1] - val[0] + 1; |
| 5890 | } |
| 5891 | #undef FW_PARAM_PFVF |
| 5892 | #undef FW_PARAM_DEV |
| 5893 | |
Hariprasad Shenai | 92e7ae7 | 2014-06-06 21:40:43 +0530 | [diff] [blame] | 5894 | /* The MTU/MSS Table is initialized by now, so load their values. If |
| 5895 | * we're initializing the adapter, then we'll make any modifications |
| 5896 | * we want to the MTU/MSS Table and also initialize the congestion |
| 5897 | * parameters. |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5898 | */ |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5899 | t4_read_mtu_tbl(adap, adap->params.mtus, NULL); |
Hariprasad Shenai | 92e7ae7 | 2014-06-06 21:40:43 +0530 | [diff] [blame] | 5900 | if (state != DEV_STATE_INIT) { |
| 5901 | int i; |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5902 | |
Hariprasad Shenai | 92e7ae7 | 2014-06-06 21:40:43 +0530 | [diff] [blame] | 5903 | /* The default MTU Table contains values 1492 and 1500. |
| 5904 | * However, for TCP, it's better to have two values which are |
| 5905 | * a multiple of 8 +/- 4 bytes apart near this popular MTU. |
| 5906 | * This allows us to have a TCP Data Payload which is a |
| 5907 | * multiple of 8 regardless of what combination of TCP Options |
| 5908 | * are in use (always a multiple of 4 bytes) which is |
| 5909 | * important for performance reasons. For instance, if no |
| 5910 | * options are in use, then we have a 20-byte IP header and a |
| 5911 | * 20-byte TCP header. In this case, a 1500-byte MSS would |
| 5912 | * result in a TCP Data Payload of 1500 - 40 == 1460 bytes |
| 5913 | * which is not a multiple of 8. So using an MSS of 1488 in |
| 5914 | * this case results in a TCP Data Payload of 1448 bytes which |
| 5915 | * is a multiple of 8. On the other hand, if 12-byte TCP Time |
| 5916 | * Stamps have been negotiated, then an MTU of 1500 bytes |
| 5917 | * results in a TCP Data Payload of 1448 bytes which, as |
| 5918 | * above, is a multiple of 8 bytes ... |
| 5919 | */ |
| 5920 | for (i = 0; i < NMTUS; i++) |
| 5921 | if (adap->params.mtus[i] == 1492) { |
| 5922 | adap->params.mtus[i] = 1488; |
| 5923 | break; |
| 5924 | } |
| 5925 | |
| 5926 | t4_load_mtus(adap, adap->params.mtus, adap->params.a_wnd, |
| 5927 | adap->params.b_wnd); |
| 5928 | } |
Kumar Sanghvi | dcf7b6f | 2013-12-18 16:38:23 +0530 | [diff] [blame] | 5929 | t4_init_tp_params(adap); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5930 | adap->flags |= FW_OK; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5931 | return 0; |
| 5932 | |
| 5933 | /* |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5934 | * Something bad happened. If a command timed out or failed with EIO |
| 5935 | * FW does not operate within its spec or something catastrophic |
| 5936 | * happened to HW/FW, stop issuing commands. |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5937 | */ |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 5938 | bye: |
| 5939 | if (ret != -ETIMEDOUT && ret != -EIO) |
| 5940 | t4_fw_bye(adap, adap->mbox); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 5941 | return ret; |
| 5942 | } |
| 5943 | |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5944 | /* EEH callbacks */ |
| 5945 | |
| 5946 | static pci_ers_result_t eeh_err_detected(struct pci_dev *pdev, |
| 5947 | pci_channel_state_t state) |
| 5948 | { |
| 5949 | int i; |
| 5950 | struct adapter *adap = pci_get_drvdata(pdev); |
| 5951 | |
| 5952 | if (!adap) |
| 5953 | goto out; |
| 5954 | |
| 5955 | rtnl_lock(); |
| 5956 | adap->flags &= ~FW_OK; |
| 5957 | notify_ulds(adap, CXGB4_STATE_START_RECOVERY); |
Gavin Shan | 9fe6cb5 | 2014-01-23 12:27:35 +0800 | [diff] [blame] | 5958 | spin_lock(&adap->stats_lock); |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5959 | for_each_port(adap, i) { |
| 5960 | struct net_device *dev = adap->port[i]; |
| 5961 | |
| 5962 | netif_device_detach(dev); |
| 5963 | netif_carrier_off(dev); |
| 5964 | } |
Gavin Shan | 9fe6cb5 | 2014-01-23 12:27:35 +0800 | [diff] [blame] | 5965 | spin_unlock(&adap->stats_lock); |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5966 | if (adap->flags & FULL_INIT_DONE) |
| 5967 | cxgb_down(adap); |
| 5968 | rtnl_unlock(); |
Gavin Shan | 144be3d | 2014-01-23 12:27:34 +0800 | [diff] [blame] | 5969 | if ((adap->flags & DEV_ENABLED)) { |
| 5970 | pci_disable_device(pdev); |
| 5971 | adap->flags &= ~DEV_ENABLED; |
| 5972 | } |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5973 | out: return state == pci_channel_io_perm_failure ? |
| 5974 | PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET; |
| 5975 | } |
| 5976 | |
| 5977 | static pci_ers_result_t eeh_slot_reset(struct pci_dev *pdev) |
| 5978 | { |
| 5979 | int i, ret; |
| 5980 | struct fw_caps_config_cmd c; |
| 5981 | struct adapter *adap = pci_get_drvdata(pdev); |
| 5982 | |
| 5983 | if (!adap) { |
| 5984 | pci_restore_state(pdev); |
| 5985 | pci_save_state(pdev); |
| 5986 | return PCI_ERS_RESULT_RECOVERED; |
| 5987 | } |
| 5988 | |
Gavin Shan | 144be3d | 2014-01-23 12:27:34 +0800 | [diff] [blame] | 5989 | if (!(adap->flags & DEV_ENABLED)) { |
| 5990 | if (pci_enable_device(pdev)) { |
| 5991 | dev_err(&pdev->dev, "Cannot reenable PCI " |
| 5992 | "device after reset\n"); |
| 5993 | return PCI_ERS_RESULT_DISCONNECT; |
| 5994 | } |
| 5995 | adap->flags |= DEV_ENABLED; |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 5996 | } |
| 5997 | |
| 5998 | pci_set_master(pdev); |
| 5999 | pci_restore_state(pdev); |
| 6000 | pci_save_state(pdev); |
| 6001 | pci_cleanup_aer_uncorrect_error_status(pdev); |
| 6002 | |
| 6003 | if (t4_wait_dev_ready(adap) < 0) |
| 6004 | return PCI_ERS_RESULT_DISCONNECT; |
Thadeu Lima de Souza Cascardo | 777c230 | 2013-05-03 08:11:04 +0000 | [diff] [blame] | 6005 | if (t4_fw_hello(adap, adap->fn, adap->fn, MASTER_MUST, NULL) < 0) |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 6006 | return PCI_ERS_RESULT_DISCONNECT; |
| 6007 | adap->flags |= FW_OK; |
| 6008 | if (adap_init1(adap, &c)) |
| 6009 | return PCI_ERS_RESULT_DISCONNECT; |
| 6010 | |
| 6011 | for_each_port(adap, i) { |
| 6012 | struct port_info *p = adap2pinfo(adap, i); |
| 6013 | |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 6014 | ret = t4_alloc_vi(adap, adap->fn, p->tx_chan, adap->fn, 0, 1, |
| 6015 | NULL, NULL); |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 6016 | if (ret < 0) |
| 6017 | return PCI_ERS_RESULT_DISCONNECT; |
| 6018 | p->viid = ret; |
| 6019 | p->xact_addr_filt = -1; |
| 6020 | } |
| 6021 | |
| 6022 | t4_load_mtus(adap, adap->params.mtus, adap->params.a_wnd, |
| 6023 | adap->params.b_wnd); |
Dimitris Michailidis | 1ae970e | 2010-08-02 13:19:19 +0000 | [diff] [blame] | 6024 | setup_memwin(adap); |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 6025 | if (cxgb_up(adap)) |
| 6026 | return PCI_ERS_RESULT_DISCONNECT; |
| 6027 | return PCI_ERS_RESULT_RECOVERED; |
| 6028 | } |
| 6029 | |
| 6030 | static void eeh_resume(struct pci_dev *pdev) |
| 6031 | { |
| 6032 | int i; |
| 6033 | struct adapter *adap = pci_get_drvdata(pdev); |
| 6034 | |
| 6035 | if (!adap) |
| 6036 | return; |
| 6037 | |
| 6038 | rtnl_lock(); |
| 6039 | for_each_port(adap, i) { |
| 6040 | struct net_device *dev = adap->port[i]; |
| 6041 | |
| 6042 | if (netif_running(dev)) { |
| 6043 | link_start(dev); |
| 6044 | cxgb_set_rxmode(dev); |
| 6045 | } |
| 6046 | netif_device_attach(dev); |
| 6047 | } |
| 6048 | rtnl_unlock(); |
| 6049 | } |
| 6050 | |
Stephen Hemminger | 3646f0e | 2012-09-07 09:33:15 -0700 | [diff] [blame] | 6051 | static const struct pci_error_handlers cxgb4_eeh = { |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 6052 | .error_detected = eeh_err_detected, |
| 6053 | .slot_reset = eeh_slot_reset, |
| 6054 | .resume = eeh_resume, |
| 6055 | }; |
| 6056 | |
Kumar Sanghvi | 57d8b76 | 2014-02-18 17:56:10 +0530 | [diff] [blame] | 6057 | static inline bool is_x_10g_port(const struct link_config *lc) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6058 | { |
Kumar Sanghvi | 57d8b76 | 2014-02-18 17:56:10 +0530 | [diff] [blame] | 6059 | return (lc->supported & FW_PORT_CAP_SPEED_10G) != 0 || |
| 6060 | (lc->supported & FW_PORT_CAP_SPEED_40G) != 0; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6061 | } |
| 6062 | |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 6063 | static inline void init_rspq(struct adapter *adap, struct sge_rspq *q, |
| 6064 | unsigned int us, unsigned int cnt, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6065 | unsigned int size, unsigned int iqe_size) |
| 6066 | { |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 6067 | q->adap = adap; |
| 6068 | set_rspq_intr_params(q, us, cnt); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6069 | q->iqe_len = iqe_size; |
| 6070 | q->size = size; |
| 6071 | } |
| 6072 | |
| 6073 | /* |
| 6074 | * Perform default configuration of DMA queues depending on the number and type |
| 6075 | * of ports we found and the number of available CPUs. Most settings can be |
| 6076 | * modified by the admin prior to actual use. |
| 6077 | */ |
Bill Pemberton | 9174494 | 2012-12-03 09:23:02 -0500 | [diff] [blame] | 6078 | static void cfg_queues(struct adapter *adap) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6079 | { |
| 6080 | struct sge *s = &adap->sge; |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 6081 | int i, n10g = 0, qidx = 0; |
| 6082 | #ifndef CONFIG_CHELSIO_T4_DCB |
| 6083 | int q10g = 0; |
| 6084 | #endif |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 6085 | int ciq_size; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6086 | |
| 6087 | for_each_port(adap, i) |
Kumar Sanghvi | 57d8b76 | 2014-02-18 17:56:10 +0530 | [diff] [blame] | 6088 | n10g += is_x_10g_port(&adap2pinfo(adap, i)->link_cfg); |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 6089 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 6090 | /* For Data Center Bridging support we need to be able to support up |
| 6091 | * to 8 Traffic Priorities; each of which will be assigned to its |
| 6092 | * own TX Queue in order to prevent Head-Of-Line Blocking. |
| 6093 | */ |
| 6094 | if (adap->params.nports * 8 > MAX_ETH_QSETS) { |
| 6095 | dev_err(adap->pdev_dev, "MAX_ETH_QSETS=%d < %d!\n", |
| 6096 | MAX_ETH_QSETS, adap->params.nports * 8); |
| 6097 | BUG_ON(1); |
| 6098 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6099 | |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 6100 | for_each_port(adap, i) { |
| 6101 | struct port_info *pi = adap2pinfo(adap, i); |
| 6102 | |
| 6103 | pi->first_qset = qidx; |
| 6104 | pi->nqsets = 8; |
| 6105 | qidx += pi->nqsets; |
| 6106 | } |
| 6107 | #else /* !CONFIG_CHELSIO_T4_DCB */ |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6108 | /* |
| 6109 | * We default to 1 queue per non-10G port and up to # of cores queues |
| 6110 | * per 10G port. |
| 6111 | */ |
| 6112 | if (n10g) |
| 6113 | q10g = (MAX_ETH_QSETS - (adap->params.nports - n10g)) / n10g; |
Yuval Mintz | 5952dde | 2012-07-01 03:18:55 +0000 | [diff] [blame] | 6114 | if (q10g > netif_get_num_default_rss_queues()) |
| 6115 | q10g = netif_get_num_default_rss_queues(); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6116 | |
| 6117 | for_each_port(adap, i) { |
| 6118 | struct port_info *pi = adap2pinfo(adap, i); |
| 6119 | |
| 6120 | pi->first_qset = qidx; |
Kumar Sanghvi | 57d8b76 | 2014-02-18 17:56:10 +0530 | [diff] [blame] | 6121 | pi->nqsets = is_x_10g_port(&pi->link_cfg) ? q10g : 1; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6122 | qidx += pi->nqsets; |
| 6123 | } |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 6124 | #endif /* !CONFIG_CHELSIO_T4_DCB */ |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6125 | |
| 6126 | s->ethqsets = qidx; |
| 6127 | s->max_ethqsets = qidx; /* MSI-X may lower it later */ |
| 6128 | |
| 6129 | if (is_offload(adap)) { |
| 6130 | /* |
| 6131 | * For offload we use 1 queue/channel if all ports are up to 1G, |
| 6132 | * otherwise we divide all available queues amongst the channels |
| 6133 | * capped by the number of available cores. |
| 6134 | */ |
| 6135 | if (n10g) { |
| 6136 | i = min_t(int, ARRAY_SIZE(s->ofldrxq), |
| 6137 | num_online_cpus()); |
| 6138 | s->ofldqsets = roundup(i, adap->params.nports); |
| 6139 | } else |
| 6140 | s->ofldqsets = adap->params.nports; |
| 6141 | /* For RDMA one Rx queue per channel suffices */ |
| 6142 | s->rdmaqs = adap->params.nports; |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 6143 | s->rdmaciqs = adap->params.nports; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6144 | } |
| 6145 | |
| 6146 | for (i = 0; i < ARRAY_SIZE(s->ethrxq); i++) { |
| 6147 | struct sge_eth_rxq *r = &s->ethrxq[i]; |
| 6148 | |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 6149 | init_rspq(adap, &r->rspq, 5, 10, 1024, 64); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6150 | r->fl.size = 72; |
| 6151 | } |
| 6152 | |
| 6153 | for (i = 0; i < ARRAY_SIZE(s->ethtxq); i++) |
| 6154 | s->ethtxq[i].q.size = 1024; |
| 6155 | |
| 6156 | for (i = 0; i < ARRAY_SIZE(s->ctrlq); i++) |
| 6157 | s->ctrlq[i].q.size = 512; |
| 6158 | |
| 6159 | for (i = 0; i < ARRAY_SIZE(s->ofldtxq); i++) |
| 6160 | s->ofldtxq[i].q.size = 1024; |
| 6161 | |
| 6162 | for (i = 0; i < ARRAY_SIZE(s->ofldrxq); i++) { |
| 6163 | struct sge_ofld_rxq *r = &s->ofldrxq[i]; |
| 6164 | |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 6165 | init_rspq(adap, &r->rspq, 5, 1, 1024, 64); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6166 | r->rspq.uld = CXGB4_ULD_ISCSI; |
| 6167 | r->fl.size = 72; |
| 6168 | } |
| 6169 | |
| 6170 | for (i = 0; i < ARRAY_SIZE(s->rdmarxq); i++) { |
| 6171 | struct sge_ofld_rxq *r = &s->rdmarxq[i]; |
| 6172 | |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 6173 | init_rspq(adap, &r->rspq, 5, 1, 511, 64); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6174 | r->rspq.uld = CXGB4_ULD_RDMA; |
| 6175 | r->fl.size = 72; |
| 6176 | } |
| 6177 | |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 6178 | ciq_size = 64 + adap->vres.cq.size + adap->tids.nftids; |
| 6179 | if (ciq_size > SGE_MAX_IQ_SIZE) { |
| 6180 | CH_WARN(adap, "CIQ size too small for available IQs\n"); |
| 6181 | ciq_size = SGE_MAX_IQ_SIZE; |
| 6182 | } |
| 6183 | |
| 6184 | for (i = 0; i < ARRAY_SIZE(s->rdmaciq); i++) { |
| 6185 | struct sge_ofld_rxq *r = &s->rdmaciq[i]; |
| 6186 | |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 6187 | init_rspq(adap, &r->rspq, 5, 1, ciq_size, 64); |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 6188 | r->rspq.uld = CXGB4_ULD_RDMA; |
| 6189 | } |
| 6190 | |
Hariprasad Shenai | c887ad0 | 2014-06-06 21:40:45 +0530 | [diff] [blame] | 6191 | init_rspq(adap, &s->fw_evtq, 0, 1, 1024, 64); |
| 6192 | init_rspq(adap, &s->intrq, 0, 1, 2 * MAX_INGQ, 64); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6193 | } |
| 6194 | |
| 6195 | /* |
| 6196 | * Reduce the number of Ethernet queues across all ports to at most n. |
| 6197 | * n provides at least one queue per port. |
| 6198 | */ |
Bill Pemberton | 9174494 | 2012-12-03 09:23:02 -0500 | [diff] [blame] | 6199 | static void reduce_ethqs(struct adapter *adap, int n) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6200 | { |
| 6201 | int i; |
| 6202 | struct port_info *pi; |
| 6203 | |
| 6204 | while (n < adap->sge.ethqsets) |
| 6205 | for_each_port(adap, i) { |
| 6206 | pi = adap2pinfo(adap, i); |
| 6207 | if (pi->nqsets > 1) { |
| 6208 | pi->nqsets--; |
| 6209 | adap->sge.ethqsets--; |
| 6210 | if (adap->sge.ethqsets <= n) |
| 6211 | break; |
| 6212 | } |
| 6213 | } |
| 6214 | |
| 6215 | n = 0; |
| 6216 | for_each_port(adap, i) { |
| 6217 | pi = adap2pinfo(adap, i); |
| 6218 | pi->first_qset = n; |
| 6219 | n += pi->nqsets; |
| 6220 | } |
| 6221 | } |
| 6222 | |
| 6223 | /* 2 MSI-X vectors needed for the FW queue and non-data interrupts */ |
| 6224 | #define EXTRA_VECS 2 |
| 6225 | |
Bill Pemberton | 9174494 | 2012-12-03 09:23:02 -0500 | [diff] [blame] | 6226 | static int enable_msix(struct adapter *adap) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6227 | { |
| 6228 | int ofld_need = 0; |
Alexander Gordeev | c32ad22 | 2014-02-18 11:07:59 +0100 | [diff] [blame] | 6229 | int i, want, need; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6230 | struct sge *s = &adap->sge; |
| 6231 | unsigned int nchan = adap->params.nports; |
| 6232 | struct msix_entry entries[MAX_INGQ + 1]; |
| 6233 | |
| 6234 | for (i = 0; i < ARRAY_SIZE(entries); ++i) |
| 6235 | entries[i].entry = i; |
| 6236 | |
| 6237 | want = s->max_ethqsets + EXTRA_VECS; |
| 6238 | if (is_offload(adap)) { |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 6239 | want += s->rdmaqs + s->rdmaciqs + s->ofldqsets; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6240 | /* need nchan for each possible ULD */ |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 6241 | ofld_need = 3 * nchan; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6242 | } |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 6243 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 6244 | /* For Data Center Bridging we need 8 Ethernet TX Priority Queues for |
| 6245 | * each port. |
| 6246 | */ |
| 6247 | need = 8 * adap->params.nports + EXTRA_VECS + ofld_need; |
| 6248 | #else |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6249 | need = adap->params.nports + EXTRA_VECS + ofld_need; |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 6250 | #endif |
Alexander Gordeev | c32ad22 | 2014-02-18 11:07:59 +0100 | [diff] [blame] | 6251 | want = pci_enable_msix_range(adap->pdev, entries, need, want); |
| 6252 | if (want < 0) |
| 6253 | return want; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6254 | |
Alexander Gordeev | c32ad22 | 2014-02-18 11:07:59 +0100 | [diff] [blame] | 6255 | /* |
| 6256 | * Distribute available vectors to the various queue groups. |
| 6257 | * Every group gets its minimum requirement and NIC gets top |
| 6258 | * priority for leftovers. |
| 6259 | */ |
| 6260 | i = want - EXTRA_VECS - ofld_need; |
| 6261 | if (i < s->max_ethqsets) { |
| 6262 | s->max_ethqsets = i; |
| 6263 | if (i < s->ethqsets) |
| 6264 | reduce_ethqs(adap, i); |
| 6265 | } |
| 6266 | if (is_offload(adap)) { |
| 6267 | i = want - EXTRA_VECS - s->max_ethqsets; |
| 6268 | i -= ofld_need - nchan; |
| 6269 | s->ofldqsets = (i / nchan) * nchan; /* round down */ |
| 6270 | } |
| 6271 | for (i = 0; i < want; ++i) |
| 6272 | adap->msix_info[i].vec = entries[i].vector; |
| 6273 | |
| 6274 | return 0; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6275 | } |
| 6276 | |
| 6277 | #undef EXTRA_VECS |
| 6278 | |
Bill Pemberton | 9174494 | 2012-12-03 09:23:02 -0500 | [diff] [blame] | 6279 | static int init_rss(struct adapter *adap) |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 6280 | { |
| 6281 | unsigned int i, j; |
| 6282 | |
| 6283 | for_each_port(adap, i) { |
| 6284 | struct port_info *pi = adap2pinfo(adap, i); |
| 6285 | |
| 6286 | pi->rss = kcalloc(pi->rss_size, sizeof(u16), GFP_KERNEL); |
| 6287 | if (!pi->rss) |
| 6288 | return -ENOMEM; |
| 6289 | for (j = 0; j < pi->rss_size; j++) |
Ben Hutchings | 278bc42 | 2011-12-15 13:56:49 +0000 | [diff] [blame] | 6290 | pi->rss[j] = ethtool_rxfh_indir_default(j, pi->nqsets); |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 6291 | } |
| 6292 | return 0; |
| 6293 | } |
| 6294 | |
Bill Pemberton | 9174494 | 2012-12-03 09:23:02 -0500 | [diff] [blame] | 6295 | static void print_port_info(const struct net_device *dev) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6296 | { |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6297 | char buf[80]; |
Dimitris Michailidis | 118969e | 2010-12-14 21:36:48 +0000 | [diff] [blame] | 6298 | char *bufp = buf; |
Dimitris Michailidis | f1a051b | 2010-05-10 15:58:08 +0000 | [diff] [blame] | 6299 | const char *spd = ""; |
Dimitris Michailidis | 118969e | 2010-12-14 21:36:48 +0000 | [diff] [blame] | 6300 | const struct port_info *pi = netdev_priv(dev); |
| 6301 | const struct adapter *adap = pi->adapter; |
Dimitris Michailidis | f1a051b | 2010-05-10 15:58:08 +0000 | [diff] [blame] | 6302 | |
| 6303 | if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_2_5GB) |
| 6304 | spd = " 2.5 GT/s"; |
| 6305 | else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_5_0GB) |
| 6306 | spd = " 5 GT/s"; |
Roland Dreier | d2e752d | 2014-04-28 17:36:20 -0700 | [diff] [blame] | 6307 | else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_8_0GB) |
| 6308 | spd = " 8 GT/s"; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6309 | |
Dimitris Michailidis | 118969e | 2010-12-14 21:36:48 +0000 | [diff] [blame] | 6310 | if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_100M) |
| 6311 | bufp += sprintf(bufp, "100/"); |
| 6312 | if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_1G) |
| 6313 | bufp += sprintf(bufp, "1000/"); |
| 6314 | if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_10G) |
| 6315 | bufp += sprintf(bufp, "10G/"); |
Kumar Sanghvi | 72aca4b | 2014-02-18 17:56:08 +0530 | [diff] [blame] | 6316 | if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_40G) |
| 6317 | bufp += sprintf(bufp, "40G/"); |
Dimitris Michailidis | 118969e | 2010-12-14 21:36:48 +0000 | [diff] [blame] | 6318 | if (bufp != buf) |
| 6319 | --bufp; |
Kumar Sanghvi | 72aca4b | 2014-02-18 17:56:08 +0530 | [diff] [blame] | 6320 | sprintf(bufp, "BASE-%s", t4_get_port_type_description(pi->port_type)); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6321 | |
Dimitris Michailidis | 118969e | 2010-12-14 21:36:48 +0000 | [diff] [blame] | 6322 | netdev_info(dev, "Chelsio %s rev %d %s %sNIC PCIe x%d%s%s\n", |
Santosh Rastapur | 0a57a53 | 2013-03-14 05:08:49 +0000 | [diff] [blame] | 6323 | adap->params.vpd.id, |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 6324 | CHELSIO_CHIP_RELEASE(adap->params.chip), buf, |
Dimitris Michailidis | 118969e | 2010-12-14 21:36:48 +0000 | [diff] [blame] | 6325 | is_offload(adap) ? "R" : "", adap->params.pci.width, spd, |
| 6326 | (adap->flags & USING_MSIX) ? " MSI-X" : |
| 6327 | (adap->flags & USING_MSI) ? " MSI" : ""); |
Kumar Sanghvi | a94cd70 | 2014-02-18 17:56:09 +0530 | [diff] [blame] | 6328 | netdev_info(dev, "S/N: %s, P/N: %s\n", |
| 6329 | adap->params.vpd.sn, adap->params.vpd.pn); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6330 | } |
| 6331 | |
Bill Pemberton | 9174494 | 2012-12-03 09:23:02 -0500 | [diff] [blame] | 6332 | static void enable_pcie_relaxed_ordering(struct pci_dev *dev) |
Dimitris Michailidis | ef306b5 | 2010-12-14 21:36:44 +0000 | [diff] [blame] | 6333 | { |
Jiang Liu | e5c8ae5 | 2012-08-20 13:53:19 -0600 | [diff] [blame] | 6334 | pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN); |
Dimitris Michailidis | ef306b5 | 2010-12-14 21:36:44 +0000 | [diff] [blame] | 6335 | } |
| 6336 | |
Dimitris Michailidis | 0654639 | 2010-07-11 12:01:16 +0000 | [diff] [blame] | 6337 | /* |
| 6338 | * Free the following resources: |
| 6339 | * - memory used for tables |
| 6340 | * - MSI/MSI-X |
| 6341 | * - net devices |
| 6342 | * - resources FW is holding for us |
| 6343 | */ |
| 6344 | static void free_some_resources(struct adapter *adapter) |
| 6345 | { |
| 6346 | unsigned int i; |
| 6347 | |
| 6348 | t4_free_mem(adapter->l2t); |
| 6349 | t4_free_mem(adapter->tids.tid_tab); |
| 6350 | disable_msi(adapter); |
| 6351 | |
| 6352 | for_each_port(adapter, i) |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 6353 | if (adapter->port[i]) { |
| 6354 | kfree(adap2pinfo(adapter, i)->rss); |
Dimitris Michailidis | 0654639 | 2010-07-11 12:01:16 +0000 | [diff] [blame] | 6355 | free_netdev(adapter->port[i]); |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 6356 | } |
Dimitris Michailidis | 0654639 | 2010-07-11 12:01:16 +0000 | [diff] [blame] | 6357 | if (adapter->flags & FW_OK) |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 6358 | t4_fw_bye(adapter, adapter->fn); |
Dimitris Michailidis | 0654639 | 2010-07-11 12:01:16 +0000 | [diff] [blame] | 6359 | } |
| 6360 | |
Michał Mirosław | 2ed28ba | 2011-04-16 13:05:08 +0000 | [diff] [blame] | 6361 | #define TSO_FLAGS (NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN) |
Dimitris Michailidis | 35d3568 | 2010-08-02 13:19:20 +0000 | [diff] [blame] | 6362 | #define VLAN_FEAT (NETIF_F_SG | NETIF_F_IP_CSUM | TSO_FLAGS | \ |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6363 | NETIF_F_IPV6_CSUM | NETIF_F_HIGHDMA) |
Santosh Rastapur | 22adfe0 | 2013-03-14 05:08:51 +0000 | [diff] [blame] | 6364 | #define SEGMENT_SIZE 128 |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6365 | |
Greg Kroah-Hartman | 1dd06ae | 2012-12-06 14:30:56 +0000 | [diff] [blame] | 6366 | static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6367 | { |
Santosh Rastapur | 22adfe0 | 2013-03-14 05:08:51 +0000 | [diff] [blame] | 6368 | int func, i, err, s_qpp, qpp, num_seg; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6369 | struct port_info *pi; |
Michał Mirosław | c8f44af | 2011-11-15 15:29:55 +0000 | [diff] [blame] | 6370 | bool highdma = false; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6371 | struct adapter *adapter = NULL; |
| 6372 | |
| 6373 | printk_once(KERN_INFO "%s - version %s\n", DRV_DESC, DRV_VERSION); |
| 6374 | |
| 6375 | err = pci_request_regions(pdev, KBUILD_MODNAME); |
| 6376 | if (err) { |
| 6377 | /* Just info, some other driver may have claimed the device. */ |
| 6378 | dev_info(&pdev->dev, "cannot obtain PCI resources\n"); |
| 6379 | return err; |
| 6380 | } |
| 6381 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6382 | err = pci_enable_device(pdev); |
| 6383 | if (err) { |
| 6384 | dev_err(&pdev->dev, "cannot enable PCI device\n"); |
| 6385 | goto out_release_regions; |
| 6386 | } |
| 6387 | |
| 6388 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { |
Michał Mirosław | c8f44af | 2011-11-15 15:29:55 +0000 | [diff] [blame] | 6389 | highdma = true; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6390 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); |
| 6391 | if (err) { |
| 6392 | dev_err(&pdev->dev, "unable to obtain 64-bit DMA for " |
| 6393 | "coherent allocations\n"); |
| 6394 | goto out_disable_device; |
| 6395 | } |
| 6396 | } else { |
| 6397 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
| 6398 | if (err) { |
| 6399 | dev_err(&pdev->dev, "no usable DMA configuration\n"); |
| 6400 | goto out_disable_device; |
| 6401 | } |
| 6402 | } |
| 6403 | |
| 6404 | pci_enable_pcie_error_reporting(pdev); |
Dimitris Michailidis | ef306b5 | 2010-12-14 21:36:44 +0000 | [diff] [blame] | 6405 | enable_pcie_relaxed_ordering(pdev); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6406 | pci_set_master(pdev); |
| 6407 | pci_save_state(pdev); |
| 6408 | |
| 6409 | adapter = kzalloc(sizeof(*adapter), GFP_KERNEL); |
| 6410 | if (!adapter) { |
| 6411 | err = -ENOMEM; |
| 6412 | goto out_disable_device; |
| 6413 | } |
| 6414 | |
Gavin Shan | 144be3d | 2014-01-23 12:27:34 +0800 | [diff] [blame] | 6415 | /* PCI device has been enabled */ |
| 6416 | adapter->flags |= DEV_ENABLED; |
| 6417 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6418 | adapter->regs = pci_ioremap_bar(pdev, 0); |
| 6419 | if (!adapter->regs) { |
| 6420 | dev_err(&pdev->dev, "cannot map device registers\n"); |
| 6421 | err = -ENOMEM; |
| 6422 | goto out_free_adapter; |
| 6423 | } |
| 6424 | |
Hariprasad Shenai | 35b1de5 | 2014-06-27 19:23:47 +0530 | [diff] [blame] | 6425 | /* We control everything through one PF */ |
| 6426 | func = SOURCEPF_GET(readl(adapter->regs + PL_WHOAMI)); |
| 6427 | if ((pdev->device == 0xa000 && func != 0) || |
| 6428 | func != ent->driver_data) { |
| 6429 | pci_save_state(pdev); /* to restore SR-IOV later */ |
| 6430 | err = 0; |
| 6431 | goto out_unmap_bar0; |
| 6432 | } |
| 6433 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6434 | adapter->pdev = pdev; |
| 6435 | adapter->pdev_dev = &pdev->dev; |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 6436 | adapter->mbox = func; |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 6437 | adapter->fn = func; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6438 | adapter->msg_enable = dflt_msg_enable; |
| 6439 | memset(adapter->chan_map, 0xff, sizeof(adapter->chan_map)); |
| 6440 | |
| 6441 | spin_lock_init(&adapter->stats_lock); |
| 6442 | spin_lock_init(&adapter->tid_release_lock); |
| 6443 | |
| 6444 | INIT_WORK(&adapter->tid_release_task, process_tid_release_list); |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 6445 | INIT_WORK(&adapter->db_full_task, process_db_full); |
| 6446 | INIT_WORK(&adapter->db_drop_task, process_db_drop); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6447 | |
| 6448 | err = t4_prep_adapter(adapter); |
| 6449 | if (err) |
Santosh Rastapur | 22adfe0 | 2013-03-14 05:08:51 +0000 | [diff] [blame] | 6450 | goto out_unmap_bar0; |
| 6451 | |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 6452 | if (!is_t4(adapter->params.chip)) { |
Santosh Rastapur | 22adfe0 | 2013-03-14 05:08:51 +0000 | [diff] [blame] | 6453 | s_qpp = QUEUESPERPAGEPF1 * adapter->fn; |
| 6454 | qpp = 1 << QUEUESPERPAGEPF0_GET(t4_read_reg(adapter, |
| 6455 | SGE_EGRESS_QUEUES_PER_PAGE_PF) >> s_qpp); |
| 6456 | num_seg = PAGE_SIZE / SEGMENT_SIZE; |
| 6457 | |
| 6458 | /* Each segment size is 128B. Write coalescing is enabled only |
| 6459 | * when SGE_EGRESS_QUEUES_PER_PAGE_PF reg value for the |
| 6460 | * queue is less no of segments that can be accommodated in |
| 6461 | * a page size. |
| 6462 | */ |
| 6463 | if (qpp > num_seg) { |
| 6464 | dev_err(&pdev->dev, |
| 6465 | "Incorrect number of egress queues per page\n"); |
| 6466 | err = -EINVAL; |
| 6467 | goto out_unmap_bar0; |
| 6468 | } |
| 6469 | adapter->bar2 = ioremap_wc(pci_resource_start(pdev, 2), |
| 6470 | pci_resource_len(pdev, 2)); |
| 6471 | if (!adapter->bar2) { |
| 6472 | dev_err(&pdev->dev, "cannot map device bar2 region\n"); |
| 6473 | err = -ENOMEM; |
| 6474 | goto out_unmap_bar0; |
| 6475 | } |
| 6476 | } |
| 6477 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 6478 | setup_memwin(adapter); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6479 | err = adap_init0(adapter); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 6480 | setup_memwin_rdma(adapter); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6481 | if (err) |
| 6482 | goto out_unmap_bar; |
| 6483 | |
| 6484 | for_each_port(adapter, i) { |
| 6485 | struct net_device *netdev; |
| 6486 | |
| 6487 | netdev = alloc_etherdev_mq(sizeof(struct port_info), |
| 6488 | MAX_ETH_QSETS); |
| 6489 | if (!netdev) { |
| 6490 | err = -ENOMEM; |
| 6491 | goto out_free_dev; |
| 6492 | } |
| 6493 | |
| 6494 | SET_NETDEV_DEV(netdev, &pdev->dev); |
| 6495 | |
| 6496 | adapter->port[i] = netdev; |
| 6497 | pi = netdev_priv(netdev); |
| 6498 | pi->adapter = adapter; |
| 6499 | pi->xact_addr_filt = -1; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6500 | pi->port_id = i; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6501 | netdev->irq = pdev->irq; |
| 6502 | |
Michał Mirosław | 2ed28ba | 2011-04-16 13:05:08 +0000 | [diff] [blame] | 6503 | netdev->hw_features = NETIF_F_SG | TSO_FLAGS | |
| 6504 | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | |
| 6505 | NETIF_F_RXCSUM | NETIF_F_RXHASH | |
Patrick McHardy | f646968 | 2013-04-19 02:04:27 +0000 | [diff] [blame] | 6506 | NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; |
Michał Mirosław | c8f44af | 2011-11-15 15:29:55 +0000 | [diff] [blame] | 6507 | if (highdma) |
| 6508 | netdev->hw_features |= NETIF_F_HIGHDMA; |
| 6509 | netdev->features |= netdev->hw_features; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6510 | netdev->vlan_features = netdev->features & VLAN_FEAT; |
| 6511 | |
Jiri Pirko | 0178934 | 2011-08-16 06:29:00 +0000 | [diff] [blame] | 6512 | netdev->priv_flags |= IFF_UNICAST_FLT; |
| 6513 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6514 | netdev->netdev_ops = &cxgb4_netdev_ops; |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 6515 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 6516 | netdev->dcbnl_ops = &cxgb4_dcb_ops; |
| 6517 | cxgb4_dcb_state_init(netdev); |
| 6518 | #endif |
Wilfried Klaebe | 7ad24ea | 2014-05-11 00:12:32 +0000 | [diff] [blame] | 6519 | netdev->ethtool_ops = &cxgb_ethtool_ops; |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6520 | } |
| 6521 | |
| 6522 | pci_set_drvdata(pdev, adapter); |
| 6523 | |
| 6524 | if (adapter->flags & FW_OK) { |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 6525 | err = t4_port_init(adapter, func, func, 0); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6526 | if (err) |
| 6527 | goto out_free_dev; |
| 6528 | } |
| 6529 | |
| 6530 | /* |
| 6531 | * Configure queues and allocate tables now, they can be needed as |
| 6532 | * soon as the first register_netdev completes. |
| 6533 | */ |
| 6534 | cfg_queues(adapter); |
| 6535 | |
| 6536 | adapter->l2t = t4_init_l2t(); |
| 6537 | if (!adapter->l2t) { |
| 6538 | /* We tolerate a lack of L2T, giving up some functionality */ |
| 6539 | dev_warn(&pdev->dev, "could not allocate L2T, continuing\n"); |
| 6540 | adapter->params.offload = 0; |
| 6541 | } |
| 6542 | |
| 6543 | if (is_offload(adapter) && tid_init(&adapter->tids) < 0) { |
| 6544 | dev_warn(&pdev->dev, "could not allocate TID table, " |
| 6545 | "continuing\n"); |
| 6546 | adapter->params.offload = 0; |
| 6547 | } |
| 6548 | |
Dimitris Michailidis | f7cabcd | 2010-07-11 12:01:15 +0000 | [diff] [blame] | 6549 | /* See what interrupts we'll be using */ |
| 6550 | if (msi > 1 && enable_msix(adapter) == 0) |
| 6551 | adapter->flags |= USING_MSIX; |
| 6552 | else if (msi > 0 && pci_enable_msi(pdev) == 0) |
| 6553 | adapter->flags |= USING_MSI; |
| 6554 | |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 6555 | err = init_rss(adapter); |
| 6556 | if (err) |
| 6557 | goto out_free_dev; |
| 6558 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6559 | /* |
| 6560 | * The card is now ready to go. If any errors occur during device |
| 6561 | * registration we do not fail the whole card but rather proceed only |
| 6562 | * with the ports we manage to register successfully. However we must |
| 6563 | * register at least one net device. |
| 6564 | */ |
| 6565 | for_each_port(adapter, i) { |
Dimitris Michailidis | a57cabe | 2010-12-14 21:36:46 +0000 | [diff] [blame] | 6566 | pi = adap2pinfo(adapter, i); |
| 6567 | netif_set_real_num_tx_queues(adapter->port[i], pi->nqsets); |
| 6568 | netif_set_real_num_rx_queues(adapter->port[i], pi->nqsets); |
| 6569 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6570 | err = register_netdev(adapter->port[i]); |
| 6571 | if (err) |
Dimitris Michailidis | b1a3c2b | 2010-12-14 21:36:51 +0000 | [diff] [blame] | 6572 | break; |
Dimitris Michailidis | b1a3c2b | 2010-12-14 21:36:51 +0000 | [diff] [blame] | 6573 | adapter->chan_map[pi->tx_chan] = i; |
| 6574 | print_port_info(adapter->port[i]); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6575 | } |
Dimitris Michailidis | b1a3c2b | 2010-12-14 21:36:51 +0000 | [diff] [blame] | 6576 | if (i == 0) { |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6577 | dev_err(&pdev->dev, "could not register any net devices\n"); |
| 6578 | goto out_free_dev; |
| 6579 | } |
Dimitris Michailidis | b1a3c2b | 2010-12-14 21:36:51 +0000 | [diff] [blame] | 6580 | if (err) { |
| 6581 | dev_warn(&pdev->dev, "only %d net devices registered\n", i); |
| 6582 | err = 0; |
Joe Perches | 6403eab | 2011-06-03 11:51:20 +0000 | [diff] [blame] | 6583 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6584 | |
| 6585 | if (cxgb4_debugfs_root) { |
| 6586 | adapter->debugfs_root = debugfs_create_dir(pci_name(pdev), |
| 6587 | cxgb4_debugfs_root); |
| 6588 | setup_debugfs(adapter); |
| 6589 | } |
| 6590 | |
David S. Miller | 88c5100 | 2011-10-07 13:38:43 -0400 | [diff] [blame] | 6591 | /* PCIe EEH recovery on powerpc platforms needs fundamental reset */ |
| 6592 | pdev->needs_freset = 1; |
| 6593 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6594 | if (is_offload(adapter)) |
| 6595 | attach_ulds(adapter); |
| 6596 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6597 | #ifdef CONFIG_PCI_IOV |
Santosh Rastapur | 7d6727c | 2013-03-14 05:08:56 +0000 | [diff] [blame] | 6598 | if (func < ARRAY_SIZE(num_vf) && num_vf[func] > 0) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6599 | if (pci_enable_sriov(pdev, num_vf[func]) == 0) |
| 6600 | dev_info(&pdev->dev, |
| 6601 | "instantiated %u virtual functions\n", |
| 6602 | num_vf[func]); |
| 6603 | #endif |
| 6604 | return 0; |
| 6605 | |
| 6606 | out_free_dev: |
Dimitris Michailidis | 0654639 | 2010-07-11 12:01:16 +0000 | [diff] [blame] | 6607 | free_some_resources(adapter); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6608 | out_unmap_bar: |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 6609 | if (!is_t4(adapter->params.chip)) |
Santosh Rastapur | 22adfe0 | 2013-03-14 05:08:51 +0000 | [diff] [blame] | 6610 | iounmap(adapter->bar2); |
| 6611 | out_unmap_bar0: |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6612 | iounmap(adapter->regs); |
| 6613 | out_free_adapter: |
| 6614 | kfree(adapter); |
| 6615 | out_disable_device: |
| 6616 | pci_disable_pcie_error_reporting(pdev); |
| 6617 | pci_disable_device(pdev); |
| 6618 | out_release_regions: |
| 6619 | pci_release_regions(pdev); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6620 | return err; |
| 6621 | } |
| 6622 | |
Bill Pemberton | 9174494 | 2012-12-03 09:23:02 -0500 | [diff] [blame] | 6623 | static void remove_one(struct pci_dev *pdev) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6624 | { |
| 6625 | struct adapter *adapter = pci_get_drvdata(pdev); |
| 6626 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 6627 | #ifdef CONFIG_PCI_IOV |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6628 | pci_disable_sriov(pdev); |
| 6629 | |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 6630 | #endif |
| 6631 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6632 | if (adapter) { |
| 6633 | int i; |
| 6634 | |
| 6635 | if (is_offload(adapter)) |
| 6636 | detach_ulds(adapter); |
| 6637 | |
| 6638 | for_each_port(adapter, i) |
Dimitris Michailidis | 8f3a767 | 2010-12-14 21:36:52 +0000 | [diff] [blame] | 6639 | if (adapter->port[i]->reg_state == NETREG_REGISTERED) |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6640 | unregister_netdev(adapter->port[i]); |
| 6641 | |
Fabian Frederick | 9f16dc2 | 2014-06-27 22:51:52 +0200 | [diff] [blame] | 6642 | debugfs_remove_recursive(adapter->debugfs_root); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6643 | |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 6644 | /* If we allocated filters, free up state associated with any |
| 6645 | * valid filters ... |
| 6646 | */ |
| 6647 | if (adapter->tids.ftid_tab) { |
| 6648 | struct filter_entry *f = &adapter->tids.ftid_tab[0]; |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 6649 | for (i = 0; i < (adapter->tids.nftids + |
| 6650 | adapter->tids.nsftids); i++, f++) |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 6651 | if (f->valid) |
| 6652 | clear_filter(adapter, f); |
| 6653 | } |
| 6654 | |
Dimitris Michailidis | aaefae9 | 2010-05-18 10:07:12 +0000 | [diff] [blame] | 6655 | if (adapter->flags & FULL_INIT_DONE) |
| 6656 | cxgb_down(adapter); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6657 | |
Dimitris Michailidis | 0654639 | 2010-07-11 12:01:16 +0000 | [diff] [blame] | 6658 | free_some_resources(adapter); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6659 | iounmap(adapter->regs); |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 6660 | if (!is_t4(adapter->params.chip)) |
Santosh Rastapur | 22adfe0 | 2013-03-14 05:08:51 +0000 | [diff] [blame] | 6661 | iounmap(adapter->bar2); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6662 | pci_disable_pcie_error_reporting(pdev); |
Gavin Shan | 144be3d | 2014-01-23 12:27:34 +0800 | [diff] [blame] | 6663 | if ((adapter->flags & DEV_ENABLED)) { |
| 6664 | pci_disable_device(pdev); |
| 6665 | adapter->flags &= ~DEV_ENABLED; |
| 6666 | } |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6667 | pci_release_regions(pdev); |
Li RongQing | ee9a33b | 2014-06-20 17:32:36 +0800 | [diff] [blame] | 6668 | synchronize_rcu(); |
Gavin Shan | 8b662fe | 2014-01-24 17:12:03 +0800 | [diff] [blame] | 6669 | kfree(adapter); |
Dimitris Michailidis | a069ec9 | 2010-09-30 09:17:12 +0000 | [diff] [blame] | 6670 | } else |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6671 | pci_release_regions(pdev); |
| 6672 | } |
| 6673 | |
| 6674 | static struct pci_driver cxgb4_driver = { |
| 6675 | .name = KBUILD_MODNAME, |
| 6676 | .id_table = cxgb4_pci_tbl, |
| 6677 | .probe = init_one, |
Bill Pemberton | 9174494 | 2012-12-03 09:23:02 -0500 | [diff] [blame] | 6678 | .remove = remove_one, |
Thadeu Lima de Souza Cascardo | 687d705 | 2014-02-24 17:04:52 -0300 | [diff] [blame] | 6679 | .shutdown = remove_one, |
Dimitris Michailidis | 204dc3c | 2010-06-18 10:05:29 +0000 | [diff] [blame] | 6680 | .err_handler = &cxgb4_eeh, |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6681 | }; |
| 6682 | |
| 6683 | static int __init cxgb4_init_module(void) |
| 6684 | { |
| 6685 | int ret; |
| 6686 | |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 6687 | workq = create_singlethread_workqueue("cxgb4"); |
| 6688 | if (!workq) |
| 6689 | return -ENOMEM; |
| 6690 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6691 | /* Debugfs support is optional, just warn if this fails */ |
| 6692 | cxgb4_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); |
| 6693 | if (!cxgb4_debugfs_root) |
Joe Perches | 428ac43 | 2013-01-06 13:34:49 +0000 | [diff] [blame] | 6694 | pr_warn("could not create debugfs entry, continuing\n"); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6695 | |
| 6696 | ret = pci_register_driver(&cxgb4_driver); |
Wei Yang | 73a695f | 2013-09-15 21:53:00 +0800 | [diff] [blame] | 6697 | if (ret < 0) { |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6698 | debugfs_remove(cxgb4_debugfs_root); |
Wei Yang | 73a695f | 2013-09-15 21:53:00 +0800 | [diff] [blame] | 6699 | destroy_workqueue(workq); |
| 6700 | } |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 6701 | |
| 6702 | register_inet6addr_notifier(&cxgb4_inet6addr_notifier); |
| 6703 | |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6704 | return ret; |
| 6705 | } |
| 6706 | |
| 6707 | static void __exit cxgb4_cleanup_module(void) |
| 6708 | { |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 6709 | unregister_inet6addr_notifier(&cxgb4_inet6addr_notifier); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6710 | pci_unregister_driver(&cxgb4_driver); |
| 6711 | debugfs_remove(cxgb4_debugfs_root); /* NULL ok */ |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 6712 | flush_workqueue(workq); |
| 6713 | destroy_workqueue(workq); |
Dimitris Michailidis | b8ff05a | 2010-04-01 15:28:26 +0000 | [diff] [blame] | 6714 | } |
| 6715 | |
| 6716 | module_init(cxgb4_init_module); |
| 6717 | module_exit(cxgb4_cleanup_module); |