blob: a703b9e9aeb9d778b6591b066abb210811234705 [file] [log] [blame]
Alex Chiang2ceb3fb2009-10-21 21:45:20 -06001What: /sys/devices/system/cpu/
2Date: pre-git history
3Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
4Description:
5 A collection of both global and individual CPU attributes
6
7 Individual CPU attributes are contained in subdirectories
8 named by the kernel's logical CPU number, e.g.:
9
10 /sys/devices/system/cpu/cpu#/
11
Alex Chiange6dcfa72009-10-21 21:45:36 -060012What: /sys/devices/system/cpu/sched_mc_power_savings
13 /sys/devices/system/cpu/sched_smt_power_savings
14Date: June 2006
15Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
16Description: Discover and adjust the kernel's multi-core scheduler support.
17
18 Possible values are:
19
20 0 - No power saving load balance (default value)
21 1 - Fill one thread/core/package first for long running threads
22 2 - Also bias task wakeups to semi-idle cpu package for power
23 savings
24
25 sched_mc_power_savings is dependent upon SCHED_MC, which is
26 itself architecture dependent.
27
28 sched_smt_power_savings is dependent upon SCHED_SMT, which
29 is itself architecture dependent.
30
31 The two files are independent of each other. It is possible
32 that one file may be present without the other.
33
34 Introduced by git commit 5c45bf27.
35
Alex Chiang2ceb3fb2009-10-21 21:45:20 -060036
Alex Chiangd93fc862009-10-21 21:45:25 -060037What: /sys/devices/system/cpu/kernel_max
38 /sys/devices/system/cpu/offline
39 /sys/devices/system/cpu/online
40 /sys/devices/system/cpu/possible
41 /sys/devices/system/cpu/present
42Date: December 2008
43Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
44Description: CPU topology files that describe kernel limits related to
45 hotplug. Briefly:
46
47 kernel_max: the maximum cpu index allowed by the kernel
48 configuration.
49
50 offline: cpus that are not online because they have been
51 HOTPLUGGED off or exceed the limit of cpus allowed by the
52 kernel configuration (kernel_max above).
53
54 online: cpus that are online and being scheduled.
55
56 possible: cpus that have been allocated resources and can be
57 brought online if they are present.
58
59 present: cpus that have been identified as being present in
60 the system.
61
62 See Documentation/cputopology.txt for more information.
63
64
Alex Chiang657348a2009-10-21 22:15:30 -060065
66What: /sys/devices/system/cpu/cpu#/node
67Date: October 2009
68Contact: Linux memory management mailing list <linux-mm@kvack.org>
69Description: Discover NUMA node a CPU belongs to
70
71 When CONFIG_NUMA is enabled, a symbolic link that points
72 to the corresponding NUMA node directory.
73
74 For example, the following symlink is created for cpu42
75 in NUMA node 2:
76
77 /sys/devices/system/cpu/cpu42/node2 -> ../../node/node2
78
79
Alex Chiang663fb2f2009-10-21 21:45:31 -060080What: /sys/devices/system/cpu/cpu#/topology/core_id
81 /sys/devices/system/cpu/cpu#/topology/core_siblings
82 /sys/devices/system/cpu/cpu#/topology/core_siblings_list
83 /sys/devices/system/cpu/cpu#/topology/physical_package_id
84 /sys/devices/system/cpu/cpu#/topology/thread_siblings
85 /sys/devices/system/cpu/cpu#/topology/thread_siblings_list
86Date: December 2008
87Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
88Description: CPU topology files that describe a logical CPU's relationship
89 to other cores and threads in the same physical package.
90
91 One cpu# directory is created per logical CPU in the system,
92 e.g. /sys/devices/system/cpu/cpu42/.
93
94 Briefly, the files above are:
95
96 core_id: the CPU core ID of cpu#. Typically it is the
97 hardware platform's identifier (rather than the kernel's).
98 The actual value is architecture and platform dependent.
99
100 core_siblings: internal kernel map of cpu#'s hardware threads
101 within the same physical_package_id.
102
103 core_siblings_list: human-readable list of the logical CPU
104 numbers within the same physical_package_id as cpu#.
105
106 physical_package_id: physical package id of cpu#. Typically
107 corresponds to a physical socket number, but the actual value
108 is architecture and platform dependent.
109
110 thread_siblings: internel kernel map of cpu#'s hardware
111 threads within the same core as cpu#
112
113 thread_siblings_list: human-readable list of cpu#'s hardware
114 threads within the same core as cpu#
115
116 See Documentation/cputopology.txt for more information.
117
118
Alex Chiangc1fb5c42009-10-21 21:45:41 -0600119What: /sys/devices/system/cpu/cpuidle/current_driver
120 /sys/devices/system/cpu/cpuidle/current_governer_ro
121Date: September 2007
122Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
123Description: Discover cpuidle policy and mechanism
124
125 Various CPUs today support multiple idle levels that are
126 differentiated by varying exit latencies and power
127 consumption during idle.
128
129 Idle policy (governor) is differentiated from idle mechanism
130 (driver)
131
132 current_driver: displays current idle mechanism
133
134 current_governor_ro: displays current idle policy
135
136 See files in Documentation/cpuidle/ for more information.
137
138
Mark Langsdorf2fad2d92009-04-09 15:31:53 +0200139What: /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
140Date: August 2008
141KernelVersion: 2.6.27
142Contact: mark.langsdorf@amd.com
143Description: These files exist in every cpu's cache index directories.
144 There are currently 2 cache_disable_# files in each
145 directory. Reading from these files on a supported
146 processor will return that cache disable index value
147 for that processor and node. Writing to one of these
148 files will cause the specificed cache index to be disabled.
149
150 Currently, only AMD Family 10h Processors support cache index
151 disable, and only for their L3 caches. See the BIOS and
152 Kernel Developer's Guide at
153 http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf
154 for formatting information and other details on the
155 cache index disable.
156Users: joachim.deguara@amd.com