blob: 45b61c9b82b9a8672d658df5fd2d9be842ccc578 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * 4G Systems MTX-1 board setup.
5 *
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +04006 * Copyright 2003, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 * Bruno Randolf <bruno.randolf@4g-systems.biz>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
Manuel Laussbb706b22009-06-06 14:09:56 +020031#include <linux/gpio.h>
Sergei Shtylyovce28f942008-04-23 22:43:55 +040032#include <linux/init.h>
33
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include <asm/mach-au1x00/au1000.h>
35
Manuel Lauss71793802008-12-21 09:26:16 +010036#include <prom.h>
37
Florian Fainellibaa545f2007-03-02 22:07:48 +010038extern int (*board_pci_idsel)(unsigned int devsel, int assert);
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +040039int mtx1_pci_idsel(unsigned int devsel, int assert);
Florian Fainellibaa545f2007-03-02 22:07:48 +010040
Ralf Baechle49a89ef2007-10-11 23:46:15 +010041void board_reset(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070042{
43 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
44 au_writel(0x00000000, 0xAE00001C);
45}
46
47void __init board_setup(void)
48{
Manuel Lauss71793802008-12-21 09:26:16 +010049#ifdef CONFIG_SERIAL_8250_CONSOLE
50 char *argptr;
51 argptr = prom_getcmdline();
52 argptr = strstr(argptr, "console=");
53 if (argptr == NULL) {
54 argptr = prom_getcmdline();
55 strcat(argptr, " console=ttyS0,115200");
56 }
57#endif
58
Manuel Laussbb706b22009-06-06 14:09:56 +020059 alchemy_gpio2_enable();
60
Florian Fainellif7086312007-09-25 17:07:24 +020061#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +040062 /* Enable USB power switch */
Manuel Laussbb706b22009-06-06 14:09:56 +020063 alchemy_gpio_direction_output(204, 0);
Florian Fainellif7086312007-09-25 17:07:24 +020064#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
66#ifdef CONFIG_PCI
67#if defined(__MIPSEB__)
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +040068 au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
Linus Torvalds1da177e2005-04-16 15:20:36 -070069#else
70 au_writel(0xf, Au1500_PCI_CFG);
71#endif
Ralf Baechle39d22112009-10-12 02:23:48 +020072 board_pci_idsel = mtx1_pci_idsel;
Linus Torvalds1da177e2005-04-16 15:20:36 -070073#endif
74
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +040075 /* Initialize sys_pinfunc */
76 au_writel(SYS_PF_NI2, SYS_PINFUNC);
Linus Torvalds1da177e2005-04-16 15:20:36 -070077
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +040078 /* Initialize GPIO */
79 au_writel(0xFFFFFFFF, SYS_TRIOUTCLR);
Manuel Laussbb706b22009-06-06 14:09:56 +020080 alchemy_gpio_direction_output(0, 0); /* Disable M66EN (PCI 66MHz) */
81 alchemy_gpio_direction_output(3, 1); /* Disable PCI CLKRUN# */
82 alchemy_gpio_direction_output(1, 1); /* Enable EXT_IO3 */
83 alchemy_gpio_direction_output(5, 0); /* Disable eth PHY TX_ER */
Linus Torvalds1da177e2005-04-16 15:20:36 -070084
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +040085 /* Enable LED and set it to green */
Manuel Laussbb706b22009-06-06 14:09:56 +020086 alchemy_gpio_direction_output(211, 1); /* green on */
87 alchemy_gpio_direction_output(212, 0); /* red off */
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +040089 printk(KERN_INFO "4G Systems MTX-1 Board\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -070090}
Florian Fainellibaa545f2007-03-02 22:07:48 +010091
92int
93mtx1_pci_idsel(unsigned int devsel, int assert)
94{
95#define MTX_IDSEL_ONLY_0_AND_3 0
96#if MTX_IDSEL_ONLY_0_AND_3
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +040097 if (devsel != 0 && devsel != 3) {
98 printk(KERN_ERR "*** not 0 or 3\n");
99 return 0;
100 }
Florian Fainellibaa545f2007-03-02 22:07:48 +0100101#endif
102
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +0400103 if (assert && devsel != 0)
104 /* Suppress signal to Cardbus */
Manuel Laussbb706b22009-06-06 14:09:56 +0200105 gpio_set_value(1, 0); /* set EXT_IO3 OFF */
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +0400106 else
Manuel Laussbb706b22009-06-06 14:09:56 +0200107 gpio_set_value(1, 1); /* set EXT_IO3 ON */
108
Sergei Shtylyov1ff1a782008-04-30 23:30:12 +0400109 au_sync_udelay(1);
110 return 1;
Florian Fainellibaa545f2007-03-02 22:07:48 +0100111}