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gerrit-public.fairphone.software / kernel / msm-4.9 / 0530e2ff4969ef30da71126003ff821305040d01 / . / sound / soc / msm / msmfalcon-common.c
blob: 59289821e05fa9963c6eef658dedfac482140e6a [file] [log] [blame]
Banajit Goswami0530e2f2016-12-09 21:34:37 -0800[diff] [blame^]1/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/input.h>
14#include <linux/of_gpio.h>
15#include <linux/mfd/msm-cdc-pinctrl.h>
16#include <sound/pcm_params.h>
17#include <sound/q6afe-v2.h>
18#include "qdsp6v2/msm-pcm-routing-v2.h"
19#include "msm-audio-pinctrl.h"
20#include "msmfalcon-common.h"
21#include "msmfalcon-internal.h"
22#include "msmfalcon-external.h"
23#include "../codecs/msm8x16/msm8x16-wcd.h"
24#include "../codecs/wsa881x.h"
25
26#define DRV_NAME "msmfalcon-asoc-snd"
27
28#define DEV_NAME_STR_LEN 32
29#define DEFAULT_MCLK_RATE 9600000
30
31struct dev_config {
32 u32 sample_rate;
33 u32 bit_format;
34 u32 channels;
35};
36
37/* TDM default config */
38static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
39 { /* PRI TDM */
40 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
41 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
42 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
43 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
44 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
45 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
46 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
47 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
48 },
49 { /* SEC TDM */
50 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
51 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
52 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
53 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
54 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
55 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
56 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
57 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
58 },
59 { /* TERT TDM */
60 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
61 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
62 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
63 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
64 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
65 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
66 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
67 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
68 },
69 { /* QUAT TDM */
70 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
71 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
72 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
73 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
74 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
75 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
76 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
77 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
78 }
79};
80
81/* TDM default config */
82static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
83 { /* PRI TDM */
84 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
85 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
86 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
87 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
88 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
89 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
90 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
91 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
92 },
93 { /* SEC TDM */
94 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
95 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
96 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
97 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
98 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
99 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
100 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
101 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
102 },
103 { /* TERT TDM */
104 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
105 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
106 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
107 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
108 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
109 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
110 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
111 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
112 },
113 { /* QUAT TDM */
114 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
115 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
116 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
117 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
118 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
119 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
120 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
121 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
122 }
123};
124
125static struct dev_config usb_rx_cfg = {
126 .sample_rate = SAMPLING_RATE_48KHZ,
127 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
128 .channels = 2,
129};
130
131static struct dev_config usb_tx_cfg = {
132 .sample_rate = SAMPLING_RATE_48KHZ,
133 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
134 .channels = 1,
135};
136
137enum {
138 PRIM_MI2S = 0,
139 SEC_MI2S,
140 TERT_MI2S,
141 QUAT_MI2S,
142 MI2S_MAX,
143};
144
145enum {
146 PRIM_AUX_PCM = 0,
147 SEC_AUX_PCM,
148 TERT_AUX_PCM,
149 QUAT_AUX_PCM,
150 AUX_PCM_MAX,
151};
152
153enum {
154 PCM_I2S_SEL_PRIM = 0,
155 PCM_I2S_SEL_SEC,
156 PCM_I2S_SEL_TERT,
157 PCM_I2S_SEL_QUAT,
158 PCM_I2S_SEL_MAX,
159};
160
161struct mi2s_aux_pcm_common_conf {
162 struct mutex lock;
163 void *pcm_i2s_sel_vt_addr;
164};
165
166struct mi2s_conf {
167 struct mutex lock;
168 u32 ref_cnt;
169 u32 msm_is_mi2s_master;
170};
171
172struct auxpcm_conf {
173 struct mutex lock;
174 u32 ref_cnt;
175};
176
177struct msm_wsa881x_dev_info {
178 struct device_node *of_node;
179 u32 index;
180};
181static struct snd_soc_aux_dev *msm_aux_dev;
182static struct snd_soc_codec_conf *msm_codec_conf;
183
184static bool msm_swap_gnd_mic(struct snd_soc_codec *codec);
185
186static struct wcd_mbhc_config mbhc_cfg = {
187 .read_fw_bin = false,
188 .calibration = NULL,
189 .detect_extn_cable = true,
190 .mono_stero_detection = false,
191 .swap_gnd_mic = NULL,
192 .hs_ext_micbias = false,
193 .key_code[0] = KEY_MEDIA,
194 .key_code[1] = KEY_VOICECOMMAND,
195 .key_code[2] = KEY_VOLUMEUP,
196 .key_code[3] = KEY_VOLUMEDOWN,
197 .key_code[4] = 0,
198 .key_code[5] = 0,
199 .key_code[6] = 0,
200 .key_code[7] = 0,
201 .linein_th = 5000,
202 .moisture_en = false,
203 .mbhc_micbias = 0,
204 .anc_micbias = 0,
205 .enable_anc_mic_detect = false,
206};
207
208static struct dev_config proxy_rx_cfg = {
209 .sample_rate = SAMPLING_RATE_48KHZ,
210 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
211 .channels = 2,
212};
213
214/* Default configuration of MI2S channels */
215static struct dev_config mi2s_rx_cfg[] = {
216 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
217 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
218 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
219 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
220};
221
222static struct dev_config mi2s_tx_cfg[] = {
223 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
224 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
225 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
226 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
227};
228
229static struct dev_config aux_pcm_rx_cfg[] = {
230 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
231 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
232 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
233 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
234};
235
236static struct dev_config aux_pcm_tx_cfg[] = {
237 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
238 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
239 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
240 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
241};
242
243static char const *ch_text[] = {"Two", "Three", "Four", "Five",
244 "Six", "Seven", "Eight"};
245static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
246static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_16",
247 "KHZ_32", "KHZ_44P1", "KHZ_48",
248 "KHZ_96", "KHZ_192"};
249static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
250 "Five", "Six", "Seven",
251 "Eight"};
252static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
253 "S32_LE"};
254static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
255 "Five", "Six", "Seven", "Eight"};
256static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
257static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
258 "KHZ_44P1", "KHZ_48", "KHZ_96",
259 "KHZ_192", "KHZ_352P8", "KHZ_384"};
260static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
261 "Five", "Six", "Seven",
262 "Eight"};
263static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
264 "KHZ_16", "KHZ_22P05",
265 "KHZ_32", "KHZ_44P1", "KHZ_48",
266 "KHZ_96", "KHZ_192", "KHZ_384"};
267
268static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
269static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
270static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
271static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
272static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
273static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
274static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
275static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
276static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
277static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
278static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
279static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
280static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
281static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
282static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
283static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
284static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
285static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
286static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
287static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
288static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
289static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
290static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
291static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
292static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
293static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
294static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
295static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
296static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
297static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
298static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
299static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
300static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
301static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
302static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
303static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
304static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
305
306static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
307 {
308 AFE_API_VERSION_I2S_CONFIG,
309 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
310 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
311 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
312 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
313 0,
314 },
315 {
316 AFE_API_VERSION_I2S_CONFIG,
317 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
318 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
319 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
320 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
321 0,
322 },
323 {
324 AFE_API_VERSION_I2S_CONFIG,
325 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
326 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
327 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
328 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
329 0,
330 },
331 {
332 AFE_API_VERSION_I2S_CONFIG,
333 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
334 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
335 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
336 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
337 0,
338 }
339};
340
341static struct mi2s_aux_pcm_common_conf mi2s_auxpcm_conf[PCM_I2S_SEL_MAX];
342static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
343static struct auxpcm_conf auxpcm_intf_conf[AUX_PCM_MAX];
344
345static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
346 struct snd_ctl_elem_value *ucontrol)
347{
348 pr_debug("%s: proxy_rx channels = %d\n",
349 __func__, proxy_rx_cfg.channels);
350 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
351
352 return 0;
353}
354
355static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
356 struct snd_ctl_elem_value *ucontrol)
357{
358 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
359 pr_debug("%s: proxy_rx channels = %d\n",
360 __func__, proxy_rx_cfg.channels);
361
362 return 1;
363}
364
365static int tdm_get_sample_rate(int value)
366{
367 int sample_rate = 0;
368
369 switch (value) {
370 case 0:
371 sample_rate = SAMPLING_RATE_8KHZ;
372 break;
373 case 1:
374 sample_rate = SAMPLING_RATE_16KHZ;
375 break;
376 case 2:
377 sample_rate = SAMPLING_RATE_32KHZ;
378 break;
379 case 3:
380 sample_rate = SAMPLING_RATE_44P1KHZ;
381 break;
382 case 4:
383 sample_rate = SAMPLING_RATE_48KHZ;
384 break;
385 case 5:
386 sample_rate = SAMPLING_RATE_96KHZ;
387 break;
388 case 6:
389 sample_rate = SAMPLING_RATE_192KHZ;
390 break;
391 case 7:
392 sample_rate = SAMPLING_RATE_352P8KHZ;
393 break;
394 case 8:
395 sample_rate = SAMPLING_RATE_384KHZ;
396 break;
397 default:
398 sample_rate = SAMPLING_RATE_48KHZ;
399 break;
400 }
401 return sample_rate;
402}
403
404static int tdm_get_sample_rate_val(int sample_rate)
405{
406 int sample_rate_val = 0;
407
408 switch (sample_rate) {
409 case SAMPLING_RATE_8KHZ:
410 sample_rate_val = 0;
411 break;
412 case SAMPLING_RATE_16KHZ:
413 sample_rate_val = 1;
414 break;
415 case SAMPLING_RATE_32KHZ:
416 sample_rate_val = 2;
417 break;
418 case SAMPLING_RATE_44P1KHZ:
419 sample_rate_val = 3;
420 break;
421 case SAMPLING_RATE_48KHZ:
422 sample_rate_val = 4;
423 break;
424 case SAMPLING_RATE_96KHZ:
425 sample_rate_val = 5;
426 break;
427 case SAMPLING_RATE_192KHZ:
428 sample_rate_val = 6;
429 break;
430 case SAMPLING_RATE_352P8KHZ:
431 sample_rate_val = 7;
432 break;
433 case SAMPLING_RATE_384KHZ:
434 sample_rate_val = 8;
435 break;
436 default:
437 sample_rate_val = 4;
438 break;
439 }
440 return sample_rate_val;
441}
442
443static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
444 struct tdm_port *port)
445{
446 if (port) {
447 if (strnstr(kcontrol->id.name, "PRI",
448 sizeof(kcontrol->id.name))) {
449 port->mode = TDM_PRI;
450 } else if (strnstr(kcontrol->id.name, "SEC",
451 sizeof(kcontrol->id.name))) {
452 port->mode = TDM_SEC;
453 } else if (strnstr(kcontrol->id.name, "TERT",
454 sizeof(kcontrol->id.name))) {
455 port->mode = TDM_TERT;
456 } else if (strnstr(kcontrol->id.name, "QUAT",
457 sizeof(kcontrol->id.name))) {
458 port->mode = TDM_QUAT;
459 } else {
460 pr_err("%s: unsupported mode in: %s",
461 __func__, kcontrol->id.name);
462 return -EINVAL;
463 }
464
465 if (strnstr(kcontrol->id.name, "RX_0",
466 sizeof(kcontrol->id.name)) ||
467 strnstr(kcontrol->id.name, "TX_0",
468 sizeof(kcontrol->id.name))) {
469 port->channel = TDM_0;
470 } else if (strnstr(kcontrol->id.name, "RX_1",
471 sizeof(kcontrol->id.name)) ||
472 strnstr(kcontrol->id.name, "TX_1",
473 sizeof(kcontrol->id.name))) {
474 port->channel = TDM_1;
475 } else if (strnstr(kcontrol->id.name, "RX_2",
476 sizeof(kcontrol->id.name)) ||
477 strnstr(kcontrol->id.name, "TX_2",
478 sizeof(kcontrol->id.name))) {
479 port->channel = TDM_2;
480 } else if (strnstr(kcontrol->id.name, "RX_3",
481 sizeof(kcontrol->id.name)) ||
482 strnstr(kcontrol->id.name, "TX_3",
483 sizeof(kcontrol->id.name))) {
484 port->channel = TDM_3;
485 } else if (strnstr(kcontrol->id.name, "RX_4",
486 sizeof(kcontrol->id.name)) ||
487 strnstr(kcontrol->id.name, "TX_4",
488 sizeof(kcontrol->id.name))) {
489 port->channel = TDM_4;
490 } else if (strnstr(kcontrol->id.name, "RX_5",
491 sizeof(kcontrol->id.name)) ||
492 strnstr(kcontrol->id.name, "TX_5",
493 sizeof(kcontrol->id.name))) {
494 port->channel = TDM_5;
495 } else if (strnstr(kcontrol->id.name, "RX_6",
496 sizeof(kcontrol->id.name)) ||
497 strnstr(kcontrol->id.name, "TX_6",
498 sizeof(kcontrol->id.name))) {
499 port->channel = TDM_6;
500 } else if (strnstr(kcontrol->id.name, "RX_7",
501 sizeof(kcontrol->id.name)) ||
502 strnstr(kcontrol->id.name, "TX_7",
503 sizeof(kcontrol->id.name))) {
504 port->channel = TDM_7;
505 } else {
506 pr_err("%s: unsupported channel in: %s",
507 __func__, kcontrol->id.name);
508 return -EINVAL;
509 }
510 } else
511 return -EINVAL;
512 return 0;
513}
514
515static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_value *ucontrol)
517{
518 struct tdm_port port;
519 int ret = tdm_get_port_idx(kcontrol, &port);
520
521 if (ret) {
522 pr_err("%s: unsupported control: %s",
523 __func__, kcontrol->id.name);
524 } else {
525 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
526 tdm_rx_cfg[port.mode][port.channel].sample_rate);
527
528 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
529 tdm_rx_cfg[port.mode][port.channel].sample_rate,
530 ucontrol->value.enumerated.item[0]);
531 }
532 return ret;
533}
534
535static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
536 struct snd_ctl_elem_value *ucontrol)
537{
538 struct tdm_port port;
539 int ret = tdm_get_port_idx(kcontrol, &port);
540
541 if (ret) {
542 pr_err("%s: unsupported control: %s",
543 __func__, kcontrol->id.name);
544 } else {
545 tdm_rx_cfg[port.mode][port.channel].sample_rate =
546 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
547
548 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
549 tdm_rx_cfg[port.mode][port.channel].sample_rate,
550 ucontrol->value.enumerated.item[0]);
551 }
552 return ret;
553}
554
555static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
556 struct snd_ctl_elem_value *ucontrol)
557{
558 struct tdm_port port;
559 int ret = tdm_get_port_idx(kcontrol, &port);
560
561 if (ret) {
562 pr_err("%s: unsupported control: %s",
563 __func__, kcontrol->id.name);
564 } else {
565 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
566 tdm_tx_cfg[port.mode][port.channel].sample_rate);
567
568 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
569 tdm_tx_cfg[port.mode][port.channel].sample_rate,
570 ucontrol->value.enumerated.item[0]);
571 }
572 return ret;
573}
574
575static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
576 struct snd_ctl_elem_value *ucontrol)
577{
578 struct tdm_port port;
579 int ret = tdm_get_port_idx(kcontrol, &port);
580
581 if (ret) {
582 pr_err("%s: unsupported control: %s",
583 __func__, kcontrol->id.name);
584 } else {
585 tdm_tx_cfg[port.mode][port.channel].sample_rate =
586 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
587
588 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
589 tdm_tx_cfg[port.mode][port.channel].sample_rate,
590 ucontrol->value.enumerated.item[0]);
591 }
592 return ret;
593}
594
595static int tdm_get_format(int value)
596{
597 int format = 0;
598
599 switch (value) {
600 case 0:
601 format = SNDRV_PCM_FORMAT_S16_LE;
602 break;
603 case 1:
604 format = SNDRV_PCM_FORMAT_S24_LE;
605 break;
606 case 2:
607 format = SNDRV_PCM_FORMAT_S32_LE;
608 break;
609 default:
610 format = SNDRV_PCM_FORMAT_S16_LE;
611 break;
612 }
613 return format;
614}
615
616static int tdm_get_format_val(int format)
617{
618 int value = 0;
619
620 switch (format) {
621 case SNDRV_PCM_FORMAT_S16_LE:
622 value = 0;
623 break;
624 case SNDRV_PCM_FORMAT_S24_LE:
625 value = 1;
626 break;
627 case SNDRV_PCM_FORMAT_S32_LE:
628 value = 2;
629 break;
630 default:
631 value = 0;
632 break;
633 }
634 return value;
635}
636
637static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
638 struct snd_ctl_elem_value *ucontrol)
639{
640 struct tdm_port port;
641 int ret = tdm_get_port_idx(kcontrol, &port);
642
643 if (ret) {
644 pr_err("%s: unsupported control: %s",
645 __func__, kcontrol->id.name);
646 } else {
647 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
648 tdm_rx_cfg[port.mode][port.channel].bit_format);
649
650 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
651 tdm_rx_cfg[port.mode][port.channel].bit_format,
652 ucontrol->value.enumerated.item[0]);
653 }
654 return ret;
655}
656
657static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
658 struct snd_ctl_elem_value *ucontrol)
659{
660 struct tdm_port port;
661 int ret = tdm_get_port_idx(kcontrol, &port);
662
663 if (ret) {
664 pr_err("%s: unsupported control: %s",
665 __func__, kcontrol->id.name);
666 } else {
667 tdm_rx_cfg[port.mode][port.channel].bit_format =
668 tdm_get_format(ucontrol->value.enumerated.item[0]);
669
670 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
671 tdm_rx_cfg[port.mode][port.channel].bit_format,
672 ucontrol->value.enumerated.item[0]);
673 }
674 return ret;
675}
676
677static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
678 struct snd_ctl_elem_value *ucontrol)
679{
680 struct tdm_port port;
681 int ret = tdm_get_port_idx(kcontrol, &port);
682
683 if (ret) {
684 pr_err("%s: unsupported control: %s",
685 __func__, kcontrol->id.name);
686 } else {
687 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
688 tdm_tx_cfg[port.mode][port.channel].bit_format);
689
690 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
691 tdm_tx_cfg[port.mode][port.channel].bit_format,
692 ucontrol->value.enumerated.item[0]);
693 }
694 return ret;
695}
696
697static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
698 struct snd_ctl_elem_value *ucontrol)
699{
700 struct tdm_port port;
701 int ret = tdm_get_port_idx(kcontrol, &port);
702
703 if (ret) {
704 pr_err("%s: unsupported control: %s",
705 __func__, kcontrol->id.name);
706 } else {
707 tdm_tx_cfg[port.mode][port.channel].bit_format =
708 tdm_get_format(ucontrol->value.enumerated.item[0]);
709
710 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
711 tdm_tx_cfg[port.mode][port.channel].bit_format,
712 ucontrol->value.enumerated.item[0]);
713 }
714 return ret;
715}
716
717static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
718 struct snd_ctl_elem_value *ucontrol)
719{
720 struct tdm_port port;
721 int ret = tdm_get_port_idx(kcontrol, &port);
722
723 if (ret) {
724 pr_err("%s: unsupported control: %s",
725 __func__, kcontrol->id.name);
726 } else {
727
728 ucontrol->value.enumerated.item[0] =
729 tdm_rx_cfg[port.mode][port.channel].channels - 1;
730
731 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
732 tdm_rx_cfg[port.mode][port.channel].channels - 1,
733 ucontrol->value.enumerated.item[0]);
734 }
735 return ret;
736}
737
738static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
739 struct snd_ctl_elem_value *ucontrol)
740{
741 struct tdm_port port;
742 int ret = tdm_get_port_idx(kcontrol, &port);
743
744 if (ret) {
745 pr_err("%s: unsupported control: %s",
746 __func__, kcontrol->id.name);
747 } else {
748 tdm_rx_cfg[port.mode][port.channel].channels =
749 ucontrol->value.enumerated.item[0] + 1;
750
751 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
752 tdm_rx_cfg[port.mode][port.channel].channels,
753 ucontrol->value.enumerated.item[0] + 1);
754 }
755 return ret;
756}
757
758static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
759 struct snd_ctl_elem_value *ucontrol)
760{
761 struct tdm_port port;
762 int ret = tdm_get_port_idx(kcontrol, &port);
763
764 if (ret) {
765 pr_err("%s: unsupported control: %s",
766 __func__, kcontrol->id.name);
767 } else {
768 ucontrol->value.enumerated.item[0] =
769 tdm_tx_cfg[port.mode][port.channel].channels - 1;
770
771 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
772 tdm_tx_cfg[port.mode][port.channel].channels - 1,
773 ucontrol->value.enumerated.item[0]);
774 }
775 return ret;
776}
777
778static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
779 struct snd_ctl_elem_value *ucontrol)
780{
781 struct tdm_port port;
782 int ret = tdm_get_port_idx(kcontrol, &port);
783
784 if (ret) {
785 pr_err("%s: unsupported control: %s",
786 __func__, kcontrol->id.name);
787 } else {
788 tdm_tx_cfg[port.mode][port.channel].channels =
789 ucontrol->value.enumerated.item[0] + 1;
790
791 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
792 tdm_tx_cfg[port.mode][port.channel].channels,
793 ucontrol->value.enumerated.item[0] + 1);
794 }
795 return ret;
796}
797
798static int aux_pcm_get_sample_rate(int value)
799{
800 int sample_rate;
801
802 switch (value) {
803 case 1:
804 sample_rate = SAMPLING_RATE_16KHZ;
805 break;
806 case 0:
807 default:
808 sample_rate = SAMPLING_RATE_8KHZ;
809 break;
810 }
811 return sample_rate;
812}
813
814static int aux_pcm_get_sample_rate_val(int sample_rate)
815{
816 int sample_rate_val;
817
818 switch (sample_rate) {
819 case SAMPLING_RATE_16KHZ:
820 sample_rate_val = 1;
821 break;
822 case SAMPLING_RATE_8KHZ:
823 default:
824 sample_rate_val = 0;
825 break;
826 }
827 return sample_rate_val;
828}
829
830static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
831{
832 int idx;
833
834 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
835 sizeof("PRIM_AUX_PCM")))
836 idx = PRIM_AUX_PCM;
837 else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
838 sizeof("SEC_AUX_PCM")))
839 idx = SEC_AUX_PCM;
840 else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
841 sizeof("TERT_AUX_PCM")))
842 idx = TERT_AUX_PCM;
843 else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
844 sizeof("QUAT_AUX_PCM")))
845 idx = QUAT_AUX_PCM;
846 else {
847 pr_err("%s: unsupported port: %s",
848 __func__, kcontrol->id.name);
849 idx = -EINVAL;
850 }
851
852 return idx;
853}
854
855static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
856 struct snd_ctl_elem_value *ucontrol)
857{
858 int idx = aux_pcm_get_port_idx(kcontrol);
859
860 if (idx < 0)
861 return idx;
862
863 aux_pcm_rx_cfg[idx].sample_rate =
864 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
865
866 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
867 idx, aux_pcm_rx_cfg[idx].sample_rate,
868 ucontrol->value.enumerated.item[0]);
869
870 return 0;
871}
872
873static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
874 struct snd_ctl_elem_value *ucontrol)
875{
876 int idx = aux_pcm_get_port_idx(kcontrol);
877
878 if (idx < 0)
879 return idx;
880
881 ucontrol->value.enumerated.item[0] =
882 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
883
884 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
885 idx, aux_pcm_rx_cfg[idx].sample_rate,
886 ucontrol->value.enumerated.item[0]);
887
888 return 0;
889}
890
891static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
892 struct snd_ctl_elem_value *ucontrol)
893{
894 int idx = aux_pcm_get_port_idx(kcontrol);
895
896 if (idx < 0)
897 return idx;
898
899 aux_pcm_tx_cfg[idx].sample_rate =
900 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
901
902 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
903 idx, aux_pcm_tx_cfg[idx].sample_rate,
904 ucontrol->value.enumerated.item[0]);
905
906 return 0;
907}
908
909static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
910 struct snd_ctl_elem_value *ucontrol)
911{
912 int idx = aux_pcm_get_port_idx(kcontrol);
913
914 if (idx < 0)
915 return idx;
916
917 ucontrol->value.enumerated.item[0] =
918 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
919
920 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
921 idx, aux_pcm_tx_cfg[idx].sample_rate,
922 ucontrol->value.enumerated.item[0]);
923
924 return 0;
925}
926
927static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
928{
929 int idx;
930
931 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
932 sizeof("PRIM_MI2S_RX")))
933 idx = PRIM_MI2S;
934 else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
935 sizeof("SEC_MI2S_RX")))
936 idx = SEC_MI2S;
937 else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
938 sizeof("TERT_MI2S_RX")))
939 idx = TERT_MI2S;
940 else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
941 sizeof("QUAT_MI2S_RX")))
942 idx = QUAT_MI2S;
943 else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
944 sizeof("PRIM_MI2S_TX")))
945 idx = PRIM_MI2S;
946 else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
947 sizeof("SEC_MI2S_TX")))
948 idx = SEC_MI2S;
949 else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
950 sizeof("TERT_MI2S_TX")))
951 idx = TERT_MI2S;
952 else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
953 sizeof("QUAT_MI2S_TX")))
954 idx = QUAT_MI2S;
955 else {
956 pr_err("%s: unsupported channel: %s",
957 __func__, kcontrol->id.name);
958 idx = -EINVAL;
959 }
960
961 return idx;
962}
963
964static int mi2s_get_sample_rate_val(int sample_rate)
965{
966 int sample_rate_val;
967
968 switch (sample_rate) {
969 case SAMPLING_RATE_8KHZ:
970 sample_rate_val = 0;
971 break;
972 case SAMPLING_RATE_16KHZ:
973 sample_rate_val = 1;
974 break;
975 case SAMPLING_RATE_32KHZ:
976 sample_rate_val = 2;
977 break;
978 case SAMPLING_RATE_44P1KHZ:
979 sample_rate_val = 3;
980 break;
981 case SAMPLING_RATE_48KHZ:
982 sample_rate_val = 4;
983 break;
984 case SAMPLING_RATE_96KHZ:
985 sample_rate_val = 5;
986 break;
987 case SAMPLING_RATE_192KHZ:
988 sample_rate_val = 6;
989 break;
990 default:
991 sample_rate_val = 4;
992 break;
993 }
994 return sample_rate_val;
995}
996
997static int mi2s_get_sample_rate(int value)
998{
999 int sample_rate;
1000
1001 switch (value) {
1002 case 0:
1003 sample_rate = SAMPLING_RATE_8KHZ;
1004 break;
1005 case 1:
1006 sample_rate = SAMPLING_RATE_16KHZ;
1007 break;
1008 case 2:
1009 sample_rate = SAMPLING_RATE_32KHZ;
1010 break;
1011 case 3:
1012 sample_rate = SAMPLING_RATE_44P1KHZ;
1013 break;
1014 case 4:
1015 sample_rate = SAMPLING_RATE_48KHZ;
1016 break;
1017 case 5:
1018 sample_rate = SAMPLING_RATE_96KHZ;
1019 break;
1020 case 6:
1021 sample_rate = SAMPLING_RATE_192KHZ;
1022 break;
1023 default:
1024 sample_rate = SAMPLING_RATE_48KHZ;
1025 break;
1026 }
1027 return sample_rate;
1028}
1029
1030static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1031 struct snd_ctl_elem_value *ucontrol)
1032{
1033 int idx = mi2s_get_port_idx(kcontrol);
1034
1035 if (idx < 0)
1036 return idx;
1037
1038 mi2s_rx_cfg[idx].sample_rate =
1039 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1040
1041 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1042 idx, mi2s_rx_cfg[idx].sample_rate,
1043 ucontrol->value.enumerated.item[0]);
1044
1045 return 0;
1046}
1047
1048static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1049 struct snd_ctl_elem_value *ucontrol)
1050{
1051 int idx = mi2s_get_port_idx(kcontrol);
1052
1053 if (idx < 0)
1054 return idx;
1055
1056 ucontrol->value.enumerated.item[0] =
1057 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
1058
1059 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1060 idx, mi2s_rx_cfg[idx].sample_rate,
1061 ucontrol->value.enumerated.item[0]);
1062
1063 return 0;
1064}
1065
1066static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1067 struct snd_ctl_elem_value *ucontrol)
1068{
1069 int idx = mi2s_get_port_idx(kcontrol);
1070
1071 if (idx < 0)
1072 return idx;
1073
1074 mi2s_tx_cfg[idx].sample_rate =
1075 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1076
1077 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1078 idx, mi2s_tx_cfg[idx].sample_rate,
1079 ucontrol->value.enumerated.item[0]);
1080
1081 return 0;
1082}
1083
1084static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1085 struct snd_ctl_elem_value *ucontrol)
1086{
1087 int idx = mi2s_get_port_idx(kcontrol);
1088
1089 if (idx < 0)
1090 return idx;
1091
1092 ucontrol->value.enumerated.item[0] =
1093 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
1094
1095 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1096 idx, mi2s_tx_cfg[idx].sample_rate,
1097 ucontrol->value.enumerated.item[0]);
1098
1099 return 0;
1100}
1101
1102static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_value *ucontrol)
1104{
1105 int idx = mi2s_get_port_idx(kcontrol);
1106
1107 if (idx < 0)
1108 return idx;
1109
1110 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1111 idx, mi2s_rx_cfg[idx].channels);
1112 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
1113
1114 return 0;
1115}
1116
1117static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
1118 struct snd_ctl_elem_value *ucontrol)
1119{
1120 int idx = mi2s_get_port_idx(kcontrol);
1121
1122 if (idx < 0)
1123 return idx;
1124
1125 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1126 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1127 idx, mi2s_rx_cfg[idx].channels);
1128
1129 return 1;
1130}
1131
1132static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
1133 struct snd_ctl_elem_value *ucontrol)
1134{
1135 int idx = mi2s_get_port_idx(kcontrol);
1136
1137 if (idx < 0)
1138 return idx;
1139
1140 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1141 idx, mi2s_tx_cfg[idx].channels);
1142 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
1143
1144 return 0;
1145}
1146
1147static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
1148 struct snd_ctl_elem_value *ucontrol)
1149{
1150 int idx = mi2s_get_port_idx(kcontrol);
1151
1152 if (idx < 0)
1153 return idx;
1154
1155 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1156 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1157 idx, mi2s_tx_cfg[idx].channels);
1158
1159 return 1;
1160}
1161
1162static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1163 struct snd_ctl_elem_value *ucontrol)
1164{
1165 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1166 usb_rx_cfg.channels);
1167 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1168 return 0;
1169}
1170
1171static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1172 struct snd_ctl_elem_value *ucontrol)
1173{
1174 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1175
1176 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1177 return 1;
1178}
1179
1180static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1181 struct snd_ctl_elem_value *ucontrol)
1182{
1183 int sample_rate_val;
1184
1185 switch (usb_rx_cfg.sample_rate) {
1186 case SAMPLING_RATE_384KHZ:
1187 sample_rate_val = 9;
1188 break;
1189 case SAMPLING_RATE_192KHZ:
1190 sample_rate_val = 8;
1191 break;
1192 case SAMPLING_RATE_96KHZ:
1193 sample_rate_val = 7;
1194 break;
1195 case SAMPLING_RATE_48KHZ:
1196 sample_rate_val = 6;
1197 break;
1198 case SAMPLING_RATE_44P1KHZ:
1199 sample_rate_val = 5;
1200 break;
1201 case SAMPLING_RATE_32KHZ:
1202 sample_rate_val = 4;
1203 break;
1204 case SAMPLING_RATE_22P05KHZ:
1205 sample_rate_val = 3;
1206 break;
1207 case SAMPLING_RATE_16KHZ:
1208 sample_rate_val = 2;
1209 break;
1210 case SAMPLING_RATE_11P025KHZ:
1211 sample_rate_val = 1;
1212 break;
1213 case SAMPLING_RATE_8KHZ:
1214 default:
1215 sample_rate_val = 0;
1216 break;
1217 }
1218
1219 ucontrol->value.integer.value[0] = sample_rate_val;
1220 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1221 usb_rx_cfg.sample_rate);
1222 return 0;
1223}
1224
1225static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1226 struct snd_ctl_elem_value *ucontrol)
1227{
1228 switch (ucontrol->value.integer.value[0]) {
1229 case 9:
1230 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1231 break;
1232 case 8:
1233 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1234 break;
1235 case 7:
1236 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1237 break;
1238 case 6:
1239 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1240 break;
1241 case 5:
1242 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1243 break;
1244 case 4:
1245 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1246 break;
1247 case 3:
1248 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1249 break;
1250 case 2:
1251 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1252 break;
1253 case 1:
1254 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1255 break;
1256 case 0:
1257 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1258 break;
1259 default:
1260 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1261 break;
1262 }
1263
1264 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1265 __func__, ucontrol->value.integer.value[0],
1266 usb_rx_cfg.sample_rate);
1267 return 0;
1268}
1269
1270static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1271 struct snd_ctl_elem_value *ucontrol)
1272{
1273 switch (usb_rx_cfg.bit_format) {
1274 case SNDRV_PCM_FORMAT_S32_LE:
1275 ucontrol->value.integer.value[0] = 3;
1276 break;
1277 case SNDRV_PCM_FORMAT_S24_3LE:
1278 ucontrol->value.integer.value[0] = 2;
1279 break;
1280 case SNDRV_PCM_FORMAT_S24_LE:
1281 ucontrol->value.integer.value[0] = 1;
1282 break;
1283 case SNDRV_PCM_FORMAT_S16_LE:
1284 default:
1285 ucontrol->value.integer.value[0] = 0;
1286 break;
1287 }
1288
1289 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1290 __func__, usb_rx_cfg.bit_format,
1291 ucontrol->value.integer.value[0]);
1292 return 0;
1293}
1294
1295static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1296 struct snd_ctl_elem_value *ucontrol)
1297{
1298 int rc = 0;
1299
1300 switch (ucontrol->value.integer.value[0]) {
1301 case 3:
1302 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1303 break;
1304 case 2:
1305 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1306 break;
1307 case 1:
1308 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1309 break;
1310 case 0:
1311 default:
1312 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1313 break;
1314 }
1315 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1316 __func__, usb_rx_cfg.bit_format,
1317 ucontrol->value.integer.value[0]);
1318
1319 return rc;
1320}
1321
1322static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1323 struct snd_ctl_elem_value *ucontrol)
1324{
1325 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1326 usb_tx_cfg.channels);
1327 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1328 return 0;
1329}
1330
1331static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1332 struct snd_ctl_elem_value *ucontrol)
1333{
1334 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1335
1336 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1337 return 1;
1338}
1339
1340static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1341 struct snd_ctl_elem_value *ucontrol)
1342{
1343 int sample_rate_val;
1344
1345 switch (usb_tx_cfg.sample_rate) {
1346 case SAMPLING_RATE_384KHZ:
1347 sample_rate_val = 9;
1348 break;
1349 case SAMPLING_RATE_192KHZ:
1350 sample_rate_val = 8;
1351 break;
1352 case SAMPLING_RATE_96KHZ:
1353 sample_rate_val = 7;
1354 break;
1355 case SAMPLING_RATE_48KHZ:
1356 sample_rate_val = 6;
1357 break;
1358 case SAMPLING_RATE_44P1KHZ:
1359 sample_rate_val = 5;
1360 break;
1361 case SAMPLING_RATE_32KHZ:
1362 sample_rate_val = 4;
1363 break;
1364 case SAMPLING_RATE_22P05KHZ:
1365 sample_rate_val = 3;
1366 break;
1367 case SAMPLING_RATE_16KHZ:
1368 sample_rate_val = 2;
1369 break;
1370 case SAMPLING_RATE_11P025KHZ:
1371 sample_rate_val = 1;
1372 break;
1373 case SAMPLING_RATE_8KHZ:
1374 sample_rate_val = 0;
1375 break;
1376 default:
1377 sample_rate_val = 6;
1378 break;
1379 }
1380
1381 ucontrol->value.integer.value[0] = sample_rate_val;
1382 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1383 usb_tx_cfg.sample_rate);
1384 return 0;
1385}
1386
1387static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1388 struct snd_ctl_elem_value *ucontrol)
1389{
1390 switch (ucontrol->value.integer.value[0]) {
1391 case 9:
1392 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1393 break;
1394 case 8:
1395 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1396 break;
1397 case 7:
1398 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1399 break;
1400 case 6:
1401 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1402 break;
1403 case 5:
1404 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1405 break;
1406 case 4:
1407 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1408 break;
1409 case 3:
1410 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1411 break;
1412 case 2:
1413 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1414 break;
1415 case 1:
1416 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1417 break;
1418 case 0:
1419 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1420 break;
1421 default:
1422 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1423 break;
1424 }
1425
1426 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1427 __func__, ucontrol->value.integer.value[0],
1428 usb_tx_cfg.sample_rate);
1429 return 0;
1430}
1431
1432static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1433 struct snd_ctl_elem_value *ucontrol)
1434{
1435 switch (usb_tx_cfg.bit_format) {
1436 case SNDRV_PCM_FORMAT_S32_LE:
1437 ucontrol->value.integer.value[0] = 3;
1438 break;
1439 case SNDRV_PCM_FORMAT_S24_3LE:
1440 ucontrol->value.integer.value[0] = 2;
1441 break;
1442 case SNDRV_PCM_FORMAT_S24_LE:
1443 ucontrol->value.integer.value[0] = 1;
1444 break;
1445 case SNDRV_PCM_FORMAT_S16_LE:
1446 default:
1447 ucontrol->value.integer.value[0] = 0;
1448 break;
1449 }
1450
1451 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1452 __func__, usb_tx_cfg.bit_format,
1453 ucontrol->value.integer.value[0]);
1454 return 0;
1455}
1456
1457static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1458 struct snd_ctl_elem_value *ucontrol)
1459{
1460 int rc = 0;
1461
1462 switch (ucontrol->value.integer.value[0]) {
1463 case 3:
1464 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1465 break;
1466 case 2:
1467 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1468 break;
1469 case 1:
1470 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1471 break;
1472 case 0:
1473 default:
1474 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1475 break;
1476 }
1477 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1478 __func__, usb_tx_cfg.bit_format,
1479 ucontrol->value.integer.value[0]);
1480
1481 return rc;
1482}
1483
1484const struct snd_kcontrol_new msm_common_snd_controls[] = {
1485 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
1486 proxy_rx_ch_get, proxy_rx_ch_put),
1487 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
1488 aux_pcm_rx_sample_rate_get,
1489 aux_pcm_rx_sample_rate_put),
1490 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
1491 aux_pcm_rx_sample_rate_get,
1492 aux_pcm_rx_sample_rate_put),
1493 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
1494 aux_pcm_rx_sample_rate_get,
1495 aux_pcm_rx_sample_rate_put),
1496 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
1497 aux_pcm_rx_sample_rate_get,
1498 aux_pcm_rx_sample_rate_put),
1499 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
1500 aux_pcm_tx_sample_rate_get,
1501 aux_pcm_tx_sample_rate_put),
1502 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
1503 aux_pcm_tx_sample_rate_get,
1504 aux_pcm_tx_sample_rate_put),
1505 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
1506 aux_pcm_tx_sample_rate_get,
1507 aux_pcm_tx_sample_rate_put),
1508 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
1509 aux_pcm_tx_sample_rate_get,
1510 aux_pcm_tx_sample_rate_put),
1511 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
1512 mi2s_rx_sample_rate_get,
1513 mi2s_rx_sample_rate_put),
1514 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
1515 mi2s_rx_sample_rate_get,
1516 mi2s_rx_sample_rate_put),
1517 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
1518 mi2s_rx_sample_rate_get,
1519 mi2s_rx_sample_rate_put),
1520 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
1521 mi2s_rx_sample_rate_get,
1522 mi2s_rx_sample_rate_put),
1523 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
1524 mi2s_tx_sample_rate_get,
1525 mi2s_tx_sample_rate_put),
1526 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
1527 mi2s_tx_sample_rate_get,
1528 mi2s_tx_sample_rate_put),
1529 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
1530 mi2s_tx_sample_rate_get,
1531 mi2s_tx_sample_rate_put),
1532 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
1533 mi2s_tx_sample_rate_get,
1534 mi2s_tx_sample_rate_put),
1535 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
1536 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1537 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
1538 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1539 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
1540 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1541 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
1542 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1543 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
1544 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1545 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
1546 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1547 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
1548 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1549 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
1550 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1551 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
1552 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
1553 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
1554 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
1555 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
1556 usb_audio_rx_format_get, usb_audio_rx_format_put),
1557 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
1558 usb_audio_tx_format_get, usb_audio_tx_format_put),
1559 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
1560 usb_audio_rx_sample_rate_get,
1561 usb_audio_rx_sample_rate_put),
1562 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
1563 usb_audio_tx_sample_rate_get,
1564 usb_audio_tx_sample_rate_put),
1565 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1566 tdm_rx_sample_rate_get,
1567 tdm_rx_sample_rate_put),
1568 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1569 tdm_tx_sample_rate_get,
1570 tdm_tx_sample_rate_put),
1571 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
1572 tdm_rx_format_get,
1573 tdm_rx_format_put),
1574 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
1575 tdm_tx_format_get,
1576 tdm_tx_format_put),
1577 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
1578 tdm_rx_ch_get,
1579 tdm_rx_ch_put),
1580 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
1581 tdm_tx_ch_get,
1582 tdm_tx_ch_put),
1583 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1584 tdm_rx_sample_rate_get,
1585 tdm_rx_sample_rate_put),
1586 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1587 tdm_tx_sample_rate_get,
1588 tdm_tx_sample_rate_put),
1589 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
1590 tdm_rx_format_get,
1591 tdm_rx_format_put),
1592 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
1593 tdm_tx_format_get,
1594 tdm_tx_format_put),
1595 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
1596 tdm_rx_ch_get,
1597 tdm_rx_ch_put),
1598 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
1599 tdm_tx_ch_get,
1600 tdm_tx_ch_put),
1601 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1602 tdm_rx_sample_rate_get,
1603 tdm_rx_sample_rate_put),
1604 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1605 tdm_tx_sample_rate_get,
1606 tdm_tx_sample_rate_put),
1607 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
1608 tdm_rx_format_get,
1609 tdm_rx_format_put),
1610 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
1611 tdm_tx_format_get,
1612 tdm_tx_format_put),
1613 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
1614 tdm_rx_ch_get,
1615 tdm_rx_ch_put),
1616 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
1617 tdm_tx_ch_get,
1618 tdm_tx_ch_put),
1619 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1620 tdm_rx_sample_rate_get,
1621 tdm_rx_sample_rate_put),
1622 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1623 tdm_tx_sample_rate_get,
1624 tdm_tx_sample_rate_put),
1625 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
1626 tdm_rx_format_get,
1627 tdm_rx_format_put),
1628 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
1629 tdm_tx_format_get,
1630 tdm_tx_format_put),
1631 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
1632 tdm_rx_ch_get,
1633 tdm_rx_ch_put),
1634 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
1635 tdm_tx_ch_get,
1636 tdm_tx_ch_put),
1637};
1638
1639static inline int param_is_mask(int p)
1640{
1641 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
1642 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
1643}
1644
1645static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
1646 int n)
1647{
1648 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
1649}
1650
1651static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned int bit)
1652{
1653 if (bit >= SNDRV_MASK_MAX)
1654 return;
1655 if (param_is_mask(n)) {
1656 struct snd_mask *m = param_to_mask(p, n);
1657
1658 m->bits[0] = 0;
1659 m->bits[1] = 0;
1660 m->bits[bit >> 5] |= (1 << (bit & 31));
1661 }
1662}
1663
1664/**
1665 * msm_common_be_hw_params_fixup - updates settings of ALSA BE hw params.
1666 *
1667 * @rtd: runtime dailink instance
1668 * @params: HW params of associated backend dailink.
1669 *
1670 * Returns 0.
1671 */
1672int msm_common_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
1673 struct snd_pcm_hw_params *params)
1674{
1675 struct snd_soc_dai_link *dai_link = rtd->dai_link;
1676 struct snd_interval *rate = hw_param_interval(params,
1677 SNDRV_PCM_HW_PARAM_RATE);
1678 struct snd_interval *channels = hw_param_interval(params,
1679 SNDRV_PCM_HW_PARAM_CHANNELS);
1680 int rc = 0;
1681
1682 pr_debug("%s: format = %d, rate = %d\n",
1683 __func__, params_format(params), params_rate(params));
1684
1685 switch (dai_link->be_id) {
1686 case MSM_BACKEND_DAI_USB_RX:
1687 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1688 usb_rx_cfg.bit_format);
1689 rate->min = rate->max = usb_rx_cfg.sample_rate;
1690 channels->min = channels->max = usb_rx_cfg.channels;
1691 break;
1692
1693 case MSM_BACKEND_DAI_USB_TX:
1694 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1695 usb_tx_cfg.bit_format);
1696 rate->min = rate->max = usb_tx_cfg.sample_rate;
1697 channels->min = channels->max = usb_tx_cfg.channels;
1698 break;
1699
1700 case MSM_BACKEND_DAI_AFE_PCM_RX:
1701 channels->min = channels->max = proxy_rx_cfg.channels;
1702 rate->min = rate->max = SAMPLING_RATE_48KHZ;
1703 break;
1704
1705 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
1706 channels->min = channels->max =
1707 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
1708 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1709 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
1710 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
1711 break;
1712
1713 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
1714 channels->min = channels->max =
1715 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
1716 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1717 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
1718 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
1719 break;
1720
1721 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
1722 channels->min = channels->max =
1723 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
1724 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1725 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
1726 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
1727 break;
1728
1729 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
1730 channels->min = channels->max =
1731 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
1732 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1733 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
1734 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
1735 break;
1736
1737 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
1738 channels->min = channels->max =
1739 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
1740 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1741 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
1742 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
1743 break;
1744
1745 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
1746 channels->min = channels->max =
1747 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
1748 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1749 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
1750 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
1751 break;
1752
1753 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
1754 channels->min = channels->max =
1755 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
1756 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1757 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
1758 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
1759 break;
1760
1761 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
1762 channels->min = channels->max =
1763 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
1764 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1765 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
1766 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
1767 break;
1768
1769 case MSM_BACKEND_DAI_AUXPCM_RX:
1770 rate->min = rate->max =
1771 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
1772 channels->min = channels->max =
1773 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
1774 break;
1775
1776 case MSM_BACKEND_DAI_AUXPCM_TX:
1777 rate->min = rate->max =
1778 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
1779 channels->min = channels->max =
1780 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
1781 break;
1782
1783 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
1784 rate->min = rate->max =
1785 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
1786 channels->min = channels->max =
1787 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
1788 break;
1789
1790 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
1791 rate->min = rate->max =
1792 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
1793 channels->min = channels->max =
1794 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
1795 break;
1796
1797 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
1798 rate->min = rate->max =
1799 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
1800 channels->min = channels->max =
1801 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
1802 break;
1803
1804 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
1805 rate->min = rate->max =
1806 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
1807 channels->min = channels->max =
1808 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
1809 break;
1810
1811 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
1812 rate->min = rate->max =
1813 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
1814 channels->min = channels->max =
1815 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
1816 break;
1817
1818 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
1819 rate->min = rate->max =
1820 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
1821 channels->min = channels->max =
1822 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
1823 break;
1824
1825 case MSM_BACKEND_DAI_PRI_MI2S_RX:
1826 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
1827 channels->min = channels->max =
1828 mi2s_rx_cfg[PRIM_MI2S].channels;
1829 break;
1830
1831 case MSM_BACKEND_DAI_PRI_MI2S_TX:
1832 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
1833 channels->min = channels->max =
1834 mi2s_tx_cfg[PRIM_MI2S].channels;
1835 break;
1836
1837 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
1838 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
1839 channels->min = channels->max =
1840 mi2s_rx_cfg[SEC_MI2S].channels;
1841 break;
1842
1843 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
1844 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
1845 channels->min = channels->max =
1846 mi2s_tx_cfg[SEC_MI2S].channels;
1847 break;
1848
1849 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
1850 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
1851 channels->min = channels->max =
1852 mi2s_rx_cfg[TERT_MI2S].channels;
1853 break;
1854
1855 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
1856 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
1857 channels->min = channels->max =
1858 mi2s_tx_cfg[TERT_MI2S].channels;
1859 break;
1860
1861 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
1862 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
1863 channels->min = channels->max =
1864 mi2s_rx_cfg[QUAT_MI2S].channels;
1865 break;
1866
1867 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
1868 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
1869 channels->min = channels->max =
1870 mi2s_tx_cfg[QUAT_MI2S].channels;
1871 break;
1872
1873 default:
1874 rate->min = rate->max = SAMPLING_RATE_48KHZ;
1875 break;
1876 }
1877 return rc;
1878}
1879EXPORT_SYMBOL(msm_common_be_hw_params_fixup);
1880
1881/**
1882 * msm_aux_pcm_snd_startup - startup ops of auxpcm.
1883 *
1884 * @substream: PCM stream pointer of associated backend dailink
1885 *
1886 * Returns 0 on success or -EINVAL on error.
1887 */
1888int msm_aux_pcm_snd_startup(struct snd_pcm_substream *substream)
1889{
1890 int ret = 0;
1891 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1892 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1893 int index = cpu_dai->id - 1;
1894 return ret = 0;
1895
1896 dev_dbg(rtd->card->dev,
1897 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
1898 __func__, substream->name, substream->stream,
1899 cpu_dai->name, cpu_dai->id);
1900
1901 if (index < PRIM_AUX_PCM || index > QUAT_AUX_PCM) {
1902 ret = -EINVAL;
1903 dev_err(rtd->card->dev,
1904 "%s: CPU DAI id (%d) out of range\n",
1905 __func__, cpu_dai->id);
1906 goto done;
1907 }
1908
1909 mutex_lock(&auxpcm_intf_conf[index].lock);
1910 if (++auxpcm_intf_conf[index].ref_cnt == 1) {
1911 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
1912 mutex_lock(&mi2s_auxpcm_conf[index].lock);
1913 iowrite32(1,
1914 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
1915 mutex_unlock(&mi2s_auxpcm_conf[index].lock);
1916 } else {
1917 dev_err(rtd->card->dev,
1918 "%s lpaif_tert_muxsel_virt_addr is NULL\n",
1919 __func__);
1920 ret = -EINVAL;
1921 }
1922 }
1923 if (IS_ERR_VALUE(ret))
1924 auxpcm_intf_conf[index].ref_cnt--;
1925
1926 mutex_unlock(&auxpcm_intf_conf[index].lock);
1927
1928done:
1929 return ret;
1930}
1931EXPORT_SYMBOL(msm_aux_pcm_snd_startup);
1932
1933/**
1934 * msm_aux_pcm_snd_shutdown - shutdown ops of auxpcm.
1935 *
1936 * @substream: PCM stream pointer of associated backend dailink
1937 */
1938void msm_aux_pcm_snd_shutdown(struct snd_pcm_substream *substream)
1939{
1940 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1941 int index = rtd->cpu_dai->id - 1;
1942
1943 dev_dbg(rtd->card->dev,
1944 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
1945 __func__,
1946 substream->name, substream->stream,
1947 rtd->cpu_dai->name, rtd->cpu_dai->id);
1948
1949 if (index < PRIM_AUX_PCM || index > QUAT_AUX_PCM) {
1950 dev_err(rtd->card->dev,
1951 "%s: CPU DAI id (%d) out of range\n",
1952 __func__, rtd->cpu_dai->id);
1953 return;
1954 }
1955
1956 mutex_lock(&auxpcm_intf_conf[index].lock);
1957 if (--auxpcm_intf_conf[index].ref_cnt == 0) {
1958 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
1959 mutex_lock(&mi2s_auxpcm_conf[index].lock);
1960 iowrite32(0,
1961 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
1962 mutex_unlock(&mi2s_auxpcm_conf[index].lock);
1963 } else {
1964 dev_err(rtd->card->dev,
1965 "%s lpaif_tert_muxsel_virt_addr is NULL\n",
1966 __func__);
1967 auxpcm_intf_conf[index].ref_cnt++;
1968 }
1969 }
1970 mutex_unlock(&auxpcm_intf_conf[index].lock);
1971}
1972EXPORT_SYMBOL(msm_aux_pcm_snd_shutdown);
1973
1974static int msm_get_port_id(int be_id)
1975{
1976 int afe_port_id;
1977
1978 switch (be_id) {
1979 case MSM_BACKEND_DAI_PRI_MI2S_RX:
1980 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
1981 break;
1982 case MSM_BACKEND_DAI_PRI_MI2S_TX:
1983 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
1984 break;
1985 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
1986 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
1987 break;
1988 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
1989 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
1990 break;
1991 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
1992 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
1993 break;
1994 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
1995 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
1996 break;
1997 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
1998 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
1999 break;
2000 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2001 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2002 break;
2003 default:
2004 pr_err("%s: Invalid be_id: %d\n", __func__, be_id);
2005 afe_port_id = -EINVAL;
2006 }
2007
2008 return afe_port_id;
2009}
2010
2011static u32 get_mi2s_bits_per_sample(u32 bit_format)
2012{
2013 u32 bit_per_sample;
2014
2015 switch (bit_format) {
2016 case SNDRV_PCM_FORMAT_S24_3LE:
2017 case SNDRV_PCM_FORMAT_S24_LE:
2018 bit_per_sample = 32;
2019 break;
2020 case SNDRV_PCM_FORMAT_S16_LE:
2021 default:
2022 bit_per_sample = 16;
2023 break;
2024 }
2025
2026 return bit_per_sample;
2027}
2028
2029static void update_mi2s_clk_val(int dai_id, int stream)
2030{
2031 u32 bit_per_sample;
2032
2033 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2034 bit_per_sample =
2035 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2036 mi2s_clk[dai_id].clk_freq_in_hz =
2037 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2038 } else {
2039 bit_per_sample =
2040 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2041 mi2s_clk[dai_id].clk_freq_in_hz =
2042 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2043 }
2044
2045 if (!mi2s_intf_conf[dai_id].msm_is_mi2s_master)
2046 mi2s_clk[dai_id].clk_freq_in_hz = 0;
2047}
2048
2049static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2050{
2051 int ret = 0;
2052 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2053 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2054 int port_id = 0;
2055 int index = cpu_dai->id;
2056
2057 port_id = msm_get_port_id(rtd->dai_link->be_id);
2058 if (IS_ERR_VALUE(port_id)) {
2059 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2060 ret = port_id;
2061 goto done;
2062 }
2063
2064 if (enable) {
2065 update_mi2s_clk_val(index, substream->stream);
2066 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2067 mi2s_clk[index].clk_freq_in_hz);
2068 }
2069
2070 mi2s_clk[index].enable = enable;
2071 ret = afe_set_lpass_clock_v2(port_id,
2072 &mi2s_clk[index]);
2073 if (ret < 0) {
2074 dev_err(rtd->card->dev,
2075 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2076 __func__, port_id, ret);
2077 goto done;
2078 }
2079
2080done:
2081 return ret;
2082}
2083
2084/**
2085 * msm_mi2s_snd_startup - startup ops of mi2s.
2086 *
2087 * @substream: PCM stream pointer of associated backend dailink
2088 *
2089 * Returns 0 on success or -EINVAL on error.
2090 */
2091int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
2092{
2093 int ret = 0;
2094 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2095 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2096 int index = cpu_dai->id;
2097 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
2098
2099 dev_dbg(rtd->card->dev,
2100 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
2101 __func__, substream->name, substream->stream,
2102 cpu_dai->name, cpu_dai->id);
2103
2104 if (index < PRIM_MI2S || index > QUAT_MI2S) {
2105 ret = -EINVAL;
2106 dev_err(rtd->card->dev,
2107 "%s: CPU DAI id (%d) out of range\n",
2108 __func__, cpu_dai->id);
2109 goto done;
2110 }
2111 /*
2112 * Muxtex protection in case the same MI2S
2113 * interface using for both TX and RX so
2114 * that the same clock won't be enable twice.
2115 */
2116 mutex_lock(&mi2s_intf_conf[index].lock);
2117 if (++mi2s_intf_conf[index].ref_cnt == 1) {
2118 ret = msm_mi2s_set_sclk(substream, true);
2119 if (IS_ERR_VALUE(ret)) {
2120 dev_err(rtd->card->dev,
2121 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
2122 __func__, ret);
2123 goto clean_up;
2124 }
2125 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
2126 mutex_lock(&mi2s_auxpcm_conf[index].lock);
2127 iowrite32(0,
2128 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
2129 mutex_unlock(&mi2s_auxpcm_conf[index].lock);
2130 } else {
2131 dev_err(rtd->card->dev,
2132 "%s lpaif_muxsel_virt_addr is NULL for dai %d\n",
2133 __func__, index);
2134 ret = -EINVAL;
2135 goto clk_off;
2136 }
2137 /* Check if msm needs to provide the clock to the interface */
2138 if (!mi2s_intf_conf[index].msm_is_mi2s_master)
2139 fmt = SND_SOC_DAIFMT_CBM_CFM;
2140 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
2141 if (IS_ERR_VALUE(ret)) {
2142 dev_err(rtd->card->dev,
2143 "%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
2144 __func__, index, ret);
2145 goto clk_off;
2146 }
2147 }
2148clk_off:
2149 if (IS_ERR_VALUE(ret))
2150 msm_mi2s_set_sclk(substream, false);
2151clean_up:
2152 if (IS_ERR_VALUE(ret))
2153 mi2s_intf_conf[index].ref_cnt--;
2154 mutex_unlock(&mi2s_intf_conf[index].lock);
2155done:
2156 return ret;
2157}
2158EXPORT_SYMBOL(msm_mi2s_snd_startup);
2159
2160/**
2161 * msm_mi2s_snd_shutdown - shutdown ops of mi2s.
2162 *
2163 * @substream: PCM stream pointer of associated backend dailink
2164 */
2165void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
2166{
2167 int ret;
2168 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2169 int index = rtd->cpu_dai->id;
2170
2171 pr_debug("%s(): substream = %s stream = %d\n", __func__,
2172 substream->name, substream->stream);
2173 if (index < PRIM_MI2S || index > QUAT_MI2S) {
2174 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
2175 return;
2176 }
2177
2178 mutex_lock(&mi2s_intf_conf[index].lock);
2179 if (--mi2s_intf_conf[index].ref_cnt == 0) {
2180 ret = msm_mi2s_set_sclk(substream, false);
2181 if (ret < 0) {
2182 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
2183 __func__, index, ret);
2184 mi2s_intf_conf[index].ref_cnt++;
2185 }
2186 }
2187 mutex_unlock(&mi2s_intf_conf[index].lock);
2188}
2189EXPORT_SYMBOL(msm_mi2s_snd_shutdown);
2190
2191/* Validate whether US EU switch is present or not */
2192static int msm_prepare_us_euro(struct snd_soc_card *card)
2193{
2194 struct msm_asoc_mach_data *pdata =
2195 snd_soc_card_get_drvdata(card);
2196 int ret = 0;
2197
2198 if (pdata->us_euro_gpio >= 0) {
2199 dev_dbg(card->dev, "%s: us_euro gpio request %d", __func__,
2200 pdata->us_euro_gpio);
2201 ret = gpio_request(pdata->us_euro_gpio, "TASHA_CODEC_US_EURO");
2202 if (ret) {
2203 dev_err(card->dev,
2204 "%s: Failed to request codec US/EURO gpio %d error %d\n",
2205 __func__, pdata->us_euro_gpio, ret);
2206 }
2207 }
2208
2209 return ret;
2210}
2211
2212static bool msm_swap_gnd_mic(struct snd_soc_codec *codec)
2213{
2214 struct snd_soc_card *card = codec->component.card;
2215 struct msm_asoc_mach_data *pdata =
2216 snd_soc_card_get_drvdata(card);
2217 int value = 0;
2218
2219 if (pdata->us_euro_gpio_p) {
2220 value = msm_cdc_pinctrl_get_state(pdata->us_euro_gpio_p);
2221 if (value)
2222 msm_cdc_pinctrl_select_sleep_state(
2223 pdata->us_euro_gpio_p);
2224 else
2225 msm_cdc_pinctrl_select_active_state(
2226 pdata->us_euro_gpio_p);
2227 } else if (pdata->us_euro_gpio >= 0) {
2228 value = gpio_get_value_cansleep(pdata->us_euro_gpio);
2229 gpio_set_value_cansleep(pdata->us_euro_gpio, !value);
2230 }
2231 pr_debug("%s: swap select switch %d to %d\n", __func__, value, !value);
2232 return true;
2233}
2234
2235static int msm_populate_dai_link_component_of_node(
2236 struct snd_soc_card *card)
2237{
2238 int i, index, ret = 0;
2239 struct device *cdev = card->dev;
2240 struct snd_soc_dai_link *dai_link = card->dai_link;
2241 struct device_node *phandle;
2242
2243 if (!cdev) {
2244 pr_err("%s: Sound card device memory NULL\n", __func__);
2245 return -ENODEV;
2246 }
2247
2248 for (i = 0; i < card->num_links; i++) {
2249 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
2250 continue;
2251
2252 /* populate platform_of_node for snd card dai links */
2253 if (dai_link[i].platform_name &&
2254 !dai_link[i].platform_of_node) {
2255 index = of_property_match_string(cdev->of_node,
2256 "asoc-platform-names",
2257 dai_link[i].platform_name);
2258 if (index < 0) {
2259 pr_err("%s: No match found for platform name: %s\n",
2260 __func__, dai_link[i].platform_name);
2261 ret = index;
2262 goto cpu_dai;
2263 }
2264 phandle = of_parse_phandle(cdev->of_node,
2265 "asoc-platform",
2266 index);
2267 if (!phandle) {
2268 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
2269 __func__, dai_link[i].platform_name,
2270 index);
2271 ret = -ENODEV;
2272 goto err;
2273 }
2274 dai_link[i].platform_of_node = phandle;
2275 dai_link[i].platform_name = NULL;
2276 }
2277cpu_dai:
2278 /* populate cpu_of_node for snd card dai links */
2279 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
2280 index = of_property_match_string(cdev->of_node,
2281 "asoc-cpu-names",
2282 dai_link[i].cpu_dai_name);
2283 if (index < 0)
2284 goto codec_dai;
2285 phandle = of_parse_phandle(cdev->of_node, "asoc-cpu",
2286 index);
2287 if (!phandle) {
2288 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
2289 __func__, dai_link[i].cpu_dai_name);
2290 ret = -ENODEV;
2291 goto err;
2292 }
2293 dai_link[i].cpu_of_node = phandle;
2294 dai_link[i].cpu_dai_name = NULL;
2295 }
2296codec_dai:
2297 /* populate codec_of_node for snd card dai links */
2298 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
2299 index = of_property_match_string(cdev->of_node,
2300 "asoc-codec-names",
2301 dai_link[i].codec_name);
2302 if (index < 0)
2303 continue;
2304 phandle = of_parse_phandle(cdev->of_node, "asoc-codec",
2305 index);
2306 if (!phandle) {
2307 pr_err("%s: retrieving phandle for codec dai %s failed\n",
2308 __func__, dai_link[i].codec_name);
2309 ret = -ENODEV;
2310 goto err;
2311 }
2312 dai_link[i].codec_of_node = phandle;
2313 dai_link[i].codec_name = NULL;
2314 }
2315 }
2316err:
2317 return ret;
2318}
2319
2320static int msm_wsa881x_init(struct snd_soc_component *component)
2321{
2322 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {100, 101, 102, 106};
2323 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {103, 104, 105, 107};
2324 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
2325 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
2326 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
2327 struct msm_asoc_mach_data *pdata;
2328 struct snd_soc_dapm_context *dapm =
2329 snd_soc_codec_get_dapm(codec);
2330
2331 if (!codec) {
2332 pr_err("%s codec is NULL\n", __func__);
2333 return -EINVAL;
2334 }
2335
2336 if (!strcmp(component->name_prefix, "SpkrLeft")) {
2337 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
2338 __func__, codec->component.name);
2339 wsa881x_set_channel_map(codec, &spkleft_ports[0],
2340 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
2341 &ch_rate[0]);
2342 if (dapm->component) {
2343 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
2344 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
2345 }
2346 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
2347 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
2348 __func__, codec->component.name);
2349 wsa881x_set_channel_map(codec, &spkright_ports[0],
2350 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
2351 &ch_rate[0]);
2352 if (dapm->component) {
2353 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
2354 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
2355 }
2356 } else {
2357 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
2358 codec->component.name);
2359 return -EINVAL;
2360 }
2361
2362
2363 pdata = snd_soc_card_get_drvdata(component->card);
2364 if (pdata && pdata->codec_root)
2365 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
2366 codec);
2367 return 0;
2368}
2369
2370
2371static int msm_init_wsa_dev(struct platform_device *pdev,
2372 struct snd_soc_card *card)
2373{
2374 struct device_node *wsa_of_node;
2375 u32 wsa_max_devs;
2376 u32 wsa_dev_cnt;
2377 char *dev_name_str = NULL;
2378 struct msm_wsa881x_dev_info *wsa881x_dev_info;
2379 const char *wsa_auxdev_name_prefix[1];
2380 int found = 0;
2381 int i;
2382 int ret;
2383
2384 /* Get maximum WSA device count for this platform */
2385 ret = of_property_read_u32(pdev->dev.of_node,
2386 "qcom,wsa-max-devs", &wsa_max_devs);
2387 if (ret) {
2388 dev_dbg(&pdev->dev,
2389 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
2390 __func__, pdev->dev.of_node->full_name, ret);
2391 goto err_dt;
2392 }
2393 if (wsa_max_devs == 0) {
2394 dev_warn(&pdev->dev,
2395 "%s: Max WSA devices is 0 for this target?\n",
2396 __func__);
2397 goto err_dt;
2398 }
2399
2400 /* Get count of WSA device phandles for this platform */
2401 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
2402 "qcom,wsa-devs", NULL);
2403 if (wsa_dev_cnt == -ENOENT) {
2404 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
2405 __func__);
2406 goto err_dt;
2407 } else if (wsa_dev_cnt <= 0) {
2408 dev_err(&pdev->dev,
2409 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
2410 __func__, wsa_dev_cnt);
2411 ret = -EINVAL;
2412 goto err_dt;
2413 }
2414
2415 /*
2416 * Expect total phandles count to be NOT less than maximum possible
2417 * WSA count. However, if it is less, then assign same value to
2418 * max count as well.
2419 */
2420 if (wsa_dev_cnt < wsa_max_devs) {
2421 dev_dbg(&pdev->dev,
2422 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
2423 __func__, wsa_max_devs, wsa_dev_cnt);
2424 wsa_max_devs = wsa_dev_cnt;
2425 }
2426
2427 /* Make sure prefix string passed for each WSA device */
2428 ret = of_property_count_strings(pdev->dev.of_node,
2429 "qcom,wsa-aux-dev-prefix");
2430 if (ret != wsa_dev_cnt) {
2431 dev_err(&pdev->dev,
2432 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
2433 __func__, wsa_dev_cnt, ret);
2434 ret = -EINVAL;
2435 goto err_dt;
2436 }
2437
2438 /*
2439 * Alloc mem to store phandle and index info of WSA device, if already
2440 * registered with ALSA core
2441 */
2442 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
2443 sizeof(struct msm_wsa881x_dev_info),
2444 GFP_KERNEL);
2445 if (!wsa881x_dev_info) {
2446 ret = -ENOMEM;
2447 goto err_mem;
2448 }
2449
2450 /*
2451 * search and check whether all WSA devices are already
2452 * registered with ALSA core or not. If found a node, store
2453 * the node and the index in a local array of struct for later
2454 * use.
2455 */
2456 for (i = 0; i < wsa_dev_cnt; i++) {
2457 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
2458 "qcom,wsa-devs", i);
2459 if (unlikely(!wsa_of_node)) {
2460 /* we should not be here */
2461 dev_err(&pdev->dev,
2462 "%s: wsa dev node is not present\n",
2463 __func__);
2464 ret = -EINVAL;
2465 goto err_dev_node;
2466 }
2467 if (soc_find_component(wsa_of_node, NULL)) {
2468 /* WSA device registered with ALSA core */
2469 wsa881x_dev_info[found].of_node = wsa_of_node;
2470 wsa881x_dev_info[found].index = i;
2471 found++;
2472 if (found == wsa_max_devs)
2473 break;
2474 }
2475 }
2476
2477 if (found < wsa_max_devs) {
2478 dev_dbg(&pdev->dev,
2479 "%s: failed to find %d components. Found only %d\n",
2480 __func__, wsa_max_devs, found);
2481 return -EPROBE_DEFER;
2482 }
2483 dev_info(&pdev->dev,
2484 "%s: found %d wsa881x devices registered with ALSA core\n",
2485 __func__, found);
2486
2487 card->num_aux_devs = wsa_max_devs;
2488 card->num_configs = wsa_max_devs;
2489
2490 /* Alloc array of AUX devs struct */
2491 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
2492 sizeof(struct snd_soc_aux_dev),
2493 GFP_KERNEL);
2494 if (!msm_aux_dev) {
2495 ret = -ENOMEM;
2496 goto err_auxdev_mem;
2497 }
2498
2499 /* Alloc array of codec conf struct */
2500 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs,
2501 sizeof(struct snd_soc_codec_conf),
2502 GFP_KERNEL);
2503 if (!msm_codec_conf) {
2504 ret = -ENOMEM;
2505 goto err_codec_conf;
2506 }
2507
2508 for (i = 0; i < card->num_aux_devs; i++) {
2509 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
2510 GFP_KERNEL);
2511 if (!dev_name_str) {
2512 ret = -ENOMEM;
2513 goto err_dev_str;
2514 }
2515
2516 ret = of_property_read_string_index(pdev->dev.of_node,
2517 "qcom,wsa-aux-dev-prefix",
2518 wsa881x_dev_info[i].index,
2519 wsa_auxdev_name_prefix);
2520 if (ret) {
2521 dev_err(&pdev->dev,
2522 "%s: failed to read wsa aux dev prefix, ret = %d\n",
2523 __func__, ret);
2524 ret = -EINVAL;
2525 goto err_dt_prop;
2526 }
2527
2528 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
2529 msm_aux_dev[i].name = dev_name_str;
2530 msm_aux_dev[i].codec_name = NULL;
2531 msm_aux_dev[i].codec_of_node =
2532 wsa881x_dev_info[i].of_node;
2533 msm_aux_dev[i].init = msm_wsa881x_init;
2534 msm_codec_conf[i].dev_name = NULL;
2535 msm_codec_conf[i].name_prefix = wsa_auxdev_name_prefix[0];
2536 msm_codec_conf[i].of_node = wsa881x_dev_info[i].of_node;
2537 }
2538 card->codec_conf = msm_codec_conf;
2539 card->aux_dev = msm_aux_dev;
2540
2541 return 0;
2542
2543err_dt_prop:
2544 devm_kfree(&pdev->dev, dev_name_str);
2545err_dev_str:
2546 devm_kfree(&pdev->dev, msm_codec_conf);
2547err_codec_conf:
2548 devm_kfree(&pdev->dev, msm_aux_dev);
2549err_auxdev_mem:
2550err_dev_node:
2551 devm_kfree(&pdev->dev, wsa881x_dev_info);
2552err_mem:
2553err_dt:
2554 return ret;
2555}
2556
2557static void msm_free_auxdev_mem(struct platform_device *pdev)
2558{
2559 struct snd_soc_card *card = platform_get_drvdata(pdev);
2560 int i;
2561
2562 if (card->num_aux_devs > 0) {
2563 for (i = 0; i < card->num_aux_devs; i++) {
2564 kfree(msm_aux_dev[i].codec_name);
2565 kfree(msm_codec_conf[i].dev_name);
2566 kfree(msm_codec_conf[i].name_prefix);
2567 }
2568 }
2569}
2570
2571static void i2s_auxpcm_init(struct platform_device *pdev)
2572{
2573 struct resource *muxsel;
2574 int count;
2575 u32 mi2s_master_slave[MI2S_MAX];
2576 int ret;
2577 char *str[PCM_I2S_SEL_MAX] = {
2578 "lpaif_pri_mode_muxsel",
2579 "lpaif_sec_mode_muxsel",
2580 "lpaif_tert_mode_muxsel",
2581 "lpaif_quat_mode_muxsel"
2582 };
2583
2584 for (count = 0; count < MI2S_MAX; count++) {
2585 mutex_init(&mi2s_intf_conf[count].lock);
2586 mi2s_intf_conf[count].ref_cnt = 0;
2587 }
2588
2589 for (count = 0; count < AUX_PCM_MAX; count++) {
2590 mutex_init(&auxpcm_intf_conf[count].lock);
2591 auxpcm_intf_conf[count].ref_cnt = 0;
2592 }
2593
2594 for (count = 0; count < PCM_I2S_SEL_MAX; count++) {
2595 mutex_init(&mi2s_auxpcm_conf[count].lock);
2596 mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr = NULL;
2597 }
2598
2599 for (count = 0; count < PCM_I2S_SEL_MAX; count++) {
2600 muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2601 str[count]);
2602 if (muxsel) {
2603 mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr
2604 = ioremap(muxsel->start, resource_size(muxsel));
2605 }
2606 }
2607
2608 ret = of_property_read_u32_array(pdev->dev.of_node,
2609 "qcom,msm-mi2s-master",
2610 mi2s_master_slave, MI2S_MAX);
2611 if (ret) {
2612 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
2613 __func__);
2614 } else {
2615 for (count = 0; count < MI2S_MAX; count++) {
2616 mi2s_intf_conf[count].msm_is_mi2s_master =
2617 mi2s_master_slave[count];
2618 }
2619 }
2620}
2621
2622static void i2s_auxpcm_deinit(void)
2623{
2624 int count;
2625
2626 for (count = 0; count < PCM_I2S_SEL_MAX; count++)
2627 if (mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr !=
2628 NULL)
2629 iounmap(
2630 mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr);
2631}
2632
2633static const struct of_device_id msmfalcon_asoc_machine_of_match[] = {
2634 { .compatible = "qcom,msmfalcon-asoc-snd",
2635 .data = "internal_codec"},
2636 { .compatible = "qcom,msmfalcon-asoc-snd-tasha",
2637 .data = "tasha_codec"},
2638 { .compatible = "qcom,msmfalcon-asoc-snd-tavil",
2639 .data = "tavil_codec"},
2640 {},
2641};
2642
2643static int msm_asoc_machine_probe(struct platform_device *pdev)
2644{
2645 struct snd_soc_card *card = NULL;
2646 struct msm_asoc_mach_data *pdata = NULL;
2647 const char *mclk = "qcom,msm-mclk-freq";
2648 int ret = -EINVAL, id;
2649 const struct of_device_id *match;
2650
2651 pdata = devm_kzalloc(&pdev->dev,
2652 sizeof(struct msm_asoc_mach_data),
2653 GFP_KERNEL);
2654 if (!pdata)
2655 return -ENOMEM;
2656
2657 match = of_match_node(msmfalcon_asoc_machine_of_match,
2658 pdev->dev.of_node);
2659 if (!match)
2660 goto err;
2661
2662 ret = of_property_read_u32(pdev->dev.of_node, mclk, &id);
2663 if (ret) {
2664 dev_err(&pdev->dev,
2665 "%s: missing %s in dt node\n", __func__, mclk);
2666 id = DEFAULT_MCLK_RATE;
2667 }
2668 pdata->mclk_freq = id;
2669
2670 if (!strcmp(match->data, "tasha_codec") ||
2671 !strcmp(match->data, "tavil_codec")) {
2672 if (!strcmp(match->data, "tasha_codec"))
2673 pdata->snd_card_val = EXT_SND_CARD_TASHA;
2674 else
2675 pdata->snd_card_val = EXT_SND_CARD_TAVIL;
2676 ret = msm_ext_cdc_init(pdev, pdata, &card, &mbhc_cfg);
2677 if (ret)
2678 goto err;
2679 } else if (!strcmp(match->data, "internal_codec")) {
2680 pdata->snd_card_val = INT_SND_CARD;
2681 ret = msm_int_cdc_init(pdev, pdata, &card, &mbhc_cfg);
2682 if (ret)
2683 goto err;
2684 } else {
2685 dev_err(&pdev->dev,
2686 "%s: Not a matching DT sound node\n", __func__);
2687 goto err;
2688 }
2689 if (!card)
2690 goto err;
2691
2692 if (pdata->snd_card_val == INT_SND_CARD) {
2693 /*reading the gpio configurations from dtsi file*/
2694 ret = msm_gpioset_initialize(CLIENT_WCD, &pdev->dev);
2695 if (ret < 0) {
2696 dev_err(&pdev->dev,
2697 "%s: error reading dtsi files%d\n",
2698 __func__, ret);
2699 goto err;
2700 }
2701 }
2702
2703 /*
2704 * Parse US-Euro gpio info from DT. Report no error if us-euro
2705 * entry is not found in DT file as some targets do not support
2706 * US-Euro detection
2707 */
2708 pdata->us_euro_gpio = of_get_named_gpio(pdev->dev.of_node,
2709 "qcom,us-euro-gpios", 0);
2710 if (!gpio_is_valid(pdata->us_euro_gpio))
2711 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
2712 "qcom,us-euro-gpios", 0);
2713 if (!gpio_is_valid(pdata->us_euro_gpio) && (!pdata->us_euro_gpio_p)) {
2714 dev_dbg(&pdev->dev, "property %s not detected in node %s",
2715 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
2716 } else {
2717 dev_dbg(&pdev->dev, "%s detected",
2718 "qcom,us-euro-gpios");
2719 mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
2720 }
2721
2722 ret = msm_prepare_us_euro(card);
2723 if (ret)
2724 dev_dbg(&pdev->dev, "msm_prepare_us_euro failed (%d)\n",
2725 ret);
2726
2727 i2s_auxpcm_init(pdev);
2728
2729 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
2730 if (ret)
2731 goto err;
2732
2733 ret = msm_populate_dai_link_component_of_node(card);
2734 if (ret) {
2735 ret = -EPROBE_DEFER;
2736 goto err;
2737 }
2738 ret = msm_init_wsa_dev(pdev, card);
2739 if (ret)
2740 goto err;
2741
2742
2743 ret = devm_snd_soc_register_card(&pdev->dev, card);
2744 if (ret) {
2745 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
2746 ret);
2747 goto err;
2748 }
2749 if (pdata->snd_card_val != INT_SND_CARD)
2750 msm_ext_register_audio_notifier();
2751 return 0;
2752err:
2753 if (pdata->us_euro_gpio > 0) {
2754 dev_dbg(&pdev->dev, "%s free us_euro gpio %d\n",
2755 __func__, pdata->us_euro_gpio);
2756 pdata->us_euro_gpio = 0;
2757 }
2758 if (pdata->hph_en1_gpio > 0) {
2759 dev_dbg(&pdev->dev, "%s free hph_en1_gpio %d\n",
2760 __func__, pdata->hph_en1_gpio);
2761 gpio_free(pdata->hph_en1_gpio);
2762 pdata->hph_en1_gpio = 0;
2763 }
2764 if (pdata->hph_en0_gpio > 0) {
2765 dev_dbg(&pdev->dev, "%s free hph_en0_gpio %d\n",
2766 __func__, pdata->hph_en0_gpio);
2767 gpio_free(pdata->hph_en0_gpio);
2768 pdata->hph_en0_gpio = 0;
2769 }
2770 devm_kfree(&pdev->dev, pdata);
2771 return ret;
2772}
2773
2774static int msm_asoc_machine_remove(struct platform_device *pdev)
2775{
2776 struct snd_soc_card *card = platform_get_drvdata(pdev);
2777 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
2778
2779 if (pdata->snd_card_val == INT_SND_CARD)
2780 mutex_destroy(&pdata->cdc_int_mclk0_mutex);
2781 msm_free_auxdev_mem(pdev);
2782
2783 gpio_free(pdata->us_euro_gpio);
2784 gpio_free(pdata->hph_en1_gpio);
2785 gpio_free(pdata->hph_en0_gpio);
2786 i2s_auxpcm_deinit();
2787 snd_soc_unregister_card(card);
2788 return 0;
2789}
2790
2791static struct platform_driver msmfalcon_asoc_machine_driver = {
2792 .driver = {
2793 .name = DRV_NAME,
2794 .owner = THIS_MODULE,
2795 .pm = &snd_soc_pm_ops,
2796 .of_match_table = msmfalcon_asoc_machine_of_match,
2797 },
2798 .probe = msm_asoc_machine_probe,
2799 .remove = msm_asoc_machine_remove,
2800};
2801module_platform_driver(msmfalcon_asoc_machine_driver);
2802
2803MODULE_DESCRIPTION("ALSA SoC msm");
2804MODULE_LICENSE("GPL v2");
2805MODULE_ALIAS("platform:" DRV_NAME);
2806MODULE_DEVICE_TABLE(of, msmfalcon_asoc_machine_of_match);