blob: 8837928fbf33744249765eaedab779494a452d92 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * File pci-acpi.h
3 *
4 * Copyright (C) 2004 Intel
5 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
6 */
7
8#ifndef _PCI_ACPI_H_
9#define _PCI_ACPI_H_
10
11#define OSC_QUERY_TYPE 0
12#define OSC_SUPPORT_TYPE 1
13#define OSC_CONTROL_TYPE 2
14#define OSC_SUPPORT_MASKS 0x1f
15
16/*
17 * _OSC DW0 Definition
18 */
19#define OSC_QUERY_ENABLE 1
20#define OSC_REQUEST_ERROR 2
21#define OSC_INVALID_UUID_ERROR 4
22#define OSC_INVALID_REVISION_ERROR 8
23#define OSC_CAPABILITIES_MASK_ERROR 16
24
25/*
26 * _OSC DW1 Definition (OS Support Fields)
27 */
28#define OSC_EXT_PCI_CONFIG_SUPPORT 1
29#define OSC_ACTIVE_STATE_PWR_SUPPORT 2
30#define OSC_CLOCK_PWR_CAPABILITY_SUPPORT 4
31#define OSC_PCI_SEGMENT_GROUPS_SUPPORT 8
32#define OSC_MSI_SUPPORT 16
33
34/*
35 * _OSC DW1 Definition (OS Control Fields)
36 */
37#define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL 1
38#define OSC_SHPC_NATIVE_HP_CONTROL 2
39#define OSC_PCI_EXPRESS_PME_CONTROL 4
40#define OSC_PCI_EXPRESS_AER_CONTROL 8
41#define OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL 16
42
43#define OSC_CONTROL_MASKS (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL | \
44 OSC_SHPC_NATIVE_HP_CONTROL | \
45 OSC_PCI_EXPRESS_PME_CONTROL | \
46 OSC_PCI_EXPRESS_AER_CONTROL | \
47 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL)
48
49#ifdef CONFIG_ACPI
rajesh.shah@intel.com427bf532005-10-31 16:20:11 -080050extern acpi_status pci_osc_control_set(acpi_handle handle, u32 flags);
Andrew Pattersonc2778352008-01-22 17:18:12 -070051extern acpi_status __pci_osc_support_set(u32 flags, const char *hid);
52static inline acpi_status pci_osc_support_set(u32 flags)
53{
54 return __pci_osc_support_set(flags, PCI_ROOT_HID_STRING);
55}
56static inline acpi_status pcie_osc_support_set(u32 flags)
57{
58 return __pci_osc_support_set(flags, PCI_EXPRESS_ROOT_HID_STRING);
59}
Jiri Slaby056c58e2008-08-18 20:22:54 +020060static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
61{
62 /* Find root host bridge */
63 while (pdev->bus->self)
64 pdev = pdev->bus->self;
65
66 return acpi_get_pci_rootbridge_handle(pci_domain_nr(pdev->bus),
67 pdev->bus->number);
68}
Linus Torvalds1da177e2005-04-16 15:20:36 -070069#else
akpm@osdl.org0ce03032006-05-13 08:30:52 -070070#if !defined(AE_ERROR)
Linus Torvalds1da177e2005-04-16 15:20:36 -070071typedef u32 acpi_status;
72#define AE_ERROR (acpi_status) (0x0001)
73#endif
rajesh.shah@intel.com427bf532005-10-31 16:20:11 -080074static inline acpi_status pci_osc_control_set(acpi_handle handle, u32 flags)
75{return AE_ERROR;}
Linus Torvalds1da177e2005-04-16 15:20:36 -070076static inline acpi_status pci_osc_support_set(u32 flags) {return AE_ERROR;}
Andrew Pattersonc2778352008-01-22 17:18:12 -070077static inline acpi_status pcie_osc_support_set(u32 flags) {return AE_ERROR;}
Jiri Slaby056c58e2008-08-18 20:22:54 +020078static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
79{ return NULL; }
Linus Torvalds1da177e2005-04-16 15:20:36 -070080#endif
81
82#endif /* _PCI_ACPI_H_ */