blob: 123d393658afac004bc541532ca02193b6478ee4 [file] [log] [blame]
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +02001#include <linux/types.h>
2#include <linux/kernel.h>
3#include <linux/ide.h>
4#include <linux/scatterlist.h>
5#include <linux/dma-mapping.h>
6#include <linux/io.h>
7
8/**
9 * config_drive_for_dma - attempt to activate IDE DMA
10 * @drive: the drive to place in DMA mode
11 *
12 * If the drive supports at least mode 2 DMA or UDMA of any kind
13 * then attempt to place it into DMA mode. Drives that are known to
14 * support DMA but predate the DMA properties or that are known
15 * to have DMA handling bugs are also set up appropriately based
16 * on the good/bad drive lists.
17 */
18
19int config_drive_for_dma(ide_drive_t *drive)
20{
21 ide_hwif_t *hwif = drive->hwif;
22 u16 *id = drive->id;
23
24 if (drive->media != ide_disk) {
25 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
26 return 0;
27 }
28
29 /*
30 * Enable DMA on any drive that has
31 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
32 */
33 if ((id[ATA_ID_FIELD_VALID] & 4) &&
34 ((id[ATA_ID_UDMA_MODES] >> 8) & 0x7f))
35 return 1;
36
37 /*
38 * Enable DMA on any drive that has mode2 DMA
39 * (multi or single) enabled
40 */
41 if (id[ATA_ID_FIELD_VALID] & 2) /* regular DMA */
42 if ((id[ATA_ID_MWDMA_MODES] & 0x404) == 0x404 ||
43 (id[ATA_ID_SWDMA_MODES] & 0x404) == 0x404)
44 return 1;
45
46 /* Consult the list of known "good" drives */
47 if (ide_dma_good_drive(drive))
48 return 1;
49
50 return 0;
51}
52
Sergei Shtylyov592b5312009-01-06 17:21:02 +010053u8 ide_dma_sff_read_status(ide_hwif_t *hwif)
54{
55 unsigned long addr = hwif->dma_base + ATA_DMA_STATUS;
56
57 if (hwif->host_flags & IDE_HFLAG_MMIO)
58 return readb((void __iomem *)addr);
59 else
60 return inb(addr);
61}
62EXPORT_SYMBOL_GPL(ide_dma_sff_read_status);
63
Sergei Shtylyov05789632009-01-06 17:21:02 +010064static void ide_dma_sff_write_status(ide_hwif_t *hwif, u8 val)
65{
66 unsigned long addr = hwif->dma_base + ATA_DMA_STATUS;
67
68 if (hwif->host_flags & IDE_HFLAG_MMIO)
69 writeb(val, (void __iomem *)addr);
70 else
71 outb(val, addr);
72}
73
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +020074/**
75 * ide_dma_host_set - Enable/disable DMA on a host
76 * @drive: drive to control
77 *
78 * Enable/disable DMA on an IDE controller following generic
79 * bus-mastering IDE controller behaviour.
80 */
81
82void ide_dma_host_set(ide_drive_t *drive, int on)
83{
84 ide_hwif_t *hwif = drive->hwif;
85 u8 unit = drive->dn & 1;
Sergei Shtylyov592b5312009-01-06 17:21:02 +010086 u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +020087
88 if (on)
89 dma_stat |= (1 << (5 + unit));
90 else
91 dma_stat &= ~(1 << (5 + unit));
92
Sergei Shtylyov05789632009-01-06 17:21:02 +010093 ide_dma_sff_write_status(hwif, dma_stat);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +020094}
95EXPORT_SYMBOL_GPL(ide_dma_host_set);
96
97/**
98 * ide_build_dmatable - build IDE DMA table
99 *
100 * ide_build_dmatable() prepares a dma request. We map the command
101 * to get the pci bus addresses of the buffers and then build up
102 * the PRD table that the IDE layer wants to be fed.
103 *
104 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
105 * but at least one (e.g. CS5530) misinterprets it as zero (!).
106 * So we break the 64KB entry into two 32KB entries instead.
107 *
108 * Returns the number of built PRD entries if all went okay,
109 * returns 0 otherwise.
110 *
111 * May also be invoked from trm290.c
112 */
113
114int ide_build_dmatable(ide_drive_t *drive, struct request *rq)
115{
116 ide_hwif_t *hwif = drive->hwif;
117 __le32 *table = (__le32 *)hwif->dmatable_cpu;
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200118 unsigned int count = 0;
119 int i;
120 struct scatterlist *sg;
Bartlomiej Zolnierkiewicz1f660192008-12-29 20:27:34 +0100121 u8 is_trm290 = !!(hwif->host_flags & IDE_HFLAG_TRM290);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200122
123 hwif->sg_nents = ide_build_sglist(drive, rq);
124 if (hwif->sg_nents == 0)
125 return 0;
126
127 for_each_sg(hwif->sg_table, sg, hwif->sg_nents, i) {
128 u32 cur_addr, cur_len, xcount, bcount;
129
130 cur_addr = sg_dma_address(sg);
131 cur_len = sg_dma_len(sg);
132
133 /*
134 * Fill in the dma table, without crossing any 64kB boundaries.
135 * Most hardware requires 16-bit alignment of all blocks,
136 * but the trm290 requires 32-bit alignment.
137 */
138
139 while (cur_len) {
140 if (count++ >= PRD_ENTRIES)
141 goto use_pio_instead;
142
143 bcount = 0x10000 - (cur_addr & 0xffff);
144 if (bcount > cur_len)
145 bcount = cur_len;
146 *table++ = cpu_to_le32(cur_addr);
147 xcount = bcount & 0xffff;
148 if (is_trm290)
149 xcount = ((xcount >> 2) - 1) << 16;
Bartlomiej Zolnierkiewicz769b49c2008-10-17 18:09:18 +0200150 else if (xcount == 0x0000) {
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200151 if (count++ >= PRD_ENTRIES)
152 goto use_pio_instead;
153 *table++ = cpu_to_le32(0x8000);
154 *table++ = cpu_to_le32(cur_addr + 0x8000);
155 xcount = 0x8000;
156 }
157 *table++ = cpu_to_le32(xcount);
158 cur_addr += bcount;
159 cur_len -= bcount;
160 }
161 }
162
163 if (count) {
164 if (!is_trm290)
165 *--table |= cpu_to_le32(0x80000000);
166 return count;
167 }
168
169use_pio_instead:
170 printk(KERN_ERR "%s: %s\n", drive->name,
171 count ? "DMA table too small" : "empty DMA table?");
172
173 ide_destroy_dmatable(drive);
174
175 return 0; /* revert to PIO for this request */
176}
177EXPORT_SYMBOL_GPL(ide_build_dmatable);
178
179/**
180 * ide_dma_setup - begin a DMA phase
181 * @drive: target device
182 *
183 * Build an IDE DMA PRD (IDE speak for scatter gather table)
184 * and then set up the DMA transfer registers for a device
185 * that follows generic IDE PCI DMA behaviour. Controllers can
186 * override this function if they need to
187 *
188 * Returns 0 on success. If a PIO fallback is required then 1
189 * is returned.
190 */
191
192int ide_dma_setup(ide_drive_t *drive)
193{
194 ide_hwif_t *hwif = drive->hwif;
Bartlomiej Zolnierkiewiczb65fac32009-01-06 17:20:50 +0100195 struct request *rq = hwif->rq;
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100196 unsigned int reading = rq_data_dir(rq) ? 0 : ATA_DMA_WR;
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200197 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
198 u8 dma_stat;
199
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200200 /* fall back to pio! */
201 if (!ide_build_dmatable(drive, rq)) {
202 ide_map_sg(drive, rq);
203 return 1;
204 }
205
206 /* PRD table */
Sergei Shtylyov05789632009-01-06 17:21:02 +0100207 if (mmio)
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200208 writel(hwif->dmatable_dma,
209 (void __iomem *)(hwif->dma_base + ATA_DMA_TABLE_OFS));
210 else
211 outl(hwif->dmatable_dma, hwif->dma_base + ATA_DMA_TABLE_OFS);
212
213 /* specify r/w */
214 if (mmio)
215 writeb(reading, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
216 else
217 outb(reading, hwif->dma_base + ATA_DMA_CMD);
218
219 /* read DMA status for INTR & ERROR flags */
Sergei Shtylyov592b5312009-01-06 17:21:02 +0100220 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200221
222 /* clear INTR & ERROR flags */
Sergei Shtylyov05789632009-01-06 17:21:02 +0100223 ide_dma_sff_write_status(hwif, dma_stat | ATA_DMA_ERR | ATA_DMA_INTR);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200224
225 drive->waiting_for_dma = 1;
226 return 0;
227}
228EXPORT_SYMBOL_GPL(ide_dma_setup);
229
230/**
231 * dma_timer_expiry - handle a DMA timeout
232 * @drive: Drive that timed out
233 *
234 * An IDE DMA transfer timed out. In the event of an error we ask
235 * the driver to resolve the problem, if a DMA transfer is still
236 * in progress we continue to wait (arguably we need to add a
237 * secondary 'I don't care what the drive thinks' timeout here)
238 * Finally if we have an interrupt we let it complete the I/O.
239 * But only one time - we clear expiry and if it's still not
240 * completed after WAIT_CMD, we error and retry in PIO.
241 * This can occur if an interrupt is lost or due to hang or bugs.
242 */
243
244static int dma_timer_expiry(ide_drive_t *drive)
245{
246 ide_hwif_t *hwif = drive->hwif;
Sergei Shtylyov592b5312009-01-06 17:21:02 +0100247 u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200248
249 printk(KERN_WARNING "%s: %s: DMA status (0x%02x)\n",
250 drive->name, __func__, dma_stat);
251
252 if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
253 return WAIT_CMD;
254
Bartlomiej Zolnierkiewiczb65fac32009-01-06 17:20:50 +0100255 hwif->expiry = NULL; /* one free ride for now */
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200256
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100257 if (dma_stat & ATA_DMA_ERR) /* ERROR */
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200258 return -1;
259
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100260 if (dma_stat & ATA_DMA_ACTIVE) /* DMAing */
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200261 return WAIT_CMD;
262
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100263 if (dma_stat & ATA_DMA_INTR) /* Got an Interrupt */
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200264 return WAIT_CMD;
265
266 return 0; /* Status is unknown -- reset the bus */
267}
268
269void ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
270{
271 /* issue cmd to drive */
272 ide_execute_command(drive, command, &ide_dma_intr, 2 * WAIT_CMD,
273 dma_timer_expiry);
274}
275EXPORT_SYMBOL_GPL(ide_dma_exec_cmd);
276
277void ide_dma_start(ide_drive_t *drive)
278{
279 ide_hwif_t *hwif = drive->hwif;
280 u8 dma_cmd;
281
282 /* Note that this is done *after* the cmd has
283 * been issued to the drive, as per the BM-IDE spec.
284 * The Promise Ultra33 doesn't work correctly when
285 * we do this part before issuing the drive cmd.
286 */
287 if (hwif->host_flags & IDE_HFLAG_MMIO) {
288 dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100289 writeb(dma_cmd | ATA_DMA_START,
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200290 (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
291 } else {
292 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100293 outb(dma_cmd | ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200294 }
295
296 wmb();
297}
298EXPORT_SYMBOL_GPL(ide_dma_start);
299
300/* returns 1 on error, 0 otherwise */
301int ide_dma_end(ide_drive_t *drive)
302{
303 ide_hwif_t *hwif = drive->hwif;
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100304 u8 dma_stat = 0, dma_cmd = 0, mask;
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200305
306 drive->waiting_for_dma = 0;
307
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100308 /* stop DMA */
Sergei Shtylyov05789632009-01-06 17:21:02 +0100309 if (hwif->host_flags & IDE_HFLAG_MMIO) {
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200310 dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100311 writeb(dma_cmd & ~ATA_DMA_START,
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200312 (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
313 } else {
314 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100315 outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200316 }
317
318 /* get DMA status */
Sergei Shtylyov592b5312009-01-06 17:21:02 +0100319 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200320
Sergei Shtylyov05789632009-01-06 17:21:02 +0100321 /* clear INTR & ERROR bits */
322 ide_dma_sff_write_status(hwif, dma_stat | ATA_DMA_ERR | ATA_DMA_INTR);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200323
324 /* purge DMA mappings */
325 ide_destroy_dmatable(drive);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200326 wmb();
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100327
328 /* verify good DMA status */
329 mask = ATA_DMA_ACTIVE | ATA_DMA_ERR | ATA_DMA_INTR;
330 if ((dma_stat & mask) != ATA_DMA_INTR)
331 return 0x10 | dma_stat;
332 return 0;
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200333}
334EXPORT_SYMBOL_GPL(ide_dma_end);
335
336/* returns 1 if dma irq issued, 0 otherwise */
337int ide_dma_test_irq(ide_drive_t *drive)
338{
339 ide_hwif_t *hwif = drive->hwif;
Sergei Shtylyov592b5312009-01-06 17:21:02 +0100340 u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200341
Bartlomiej Zolnierkiewicz1d353642008-12-29 20:27:37 +0100342 return (dma_stat & ATA_DMA_INTR) ? 1 : 0;
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200343}
344EXPORT_SYMBOL_GPL(ide_dma_test_irq);
345
346const struct ide_dma_ops sff_dma_ops = {
347 .dma_host_set = ide_dma_host_set,
348 .dma_setup = ide_dma_setup,
349 .dma_exec_cmd = ide_dma_exec_cmd,
350 .dma_start = ide_dma_start,
351 .dma_end = ide_dma_end,
352 .dma_test_irq = ide_dma_test_irq,
353 .dma_timeout = ide_dma_timeout,
354 .dma_lost_irq = ide_dma_lost_irq,
Sergei Shtylyov592b5312009-01-06 17:21:02 +0100355 .dma_sff_read_status = ide_dma_sff_read_status,
Bartlomiej Zolnierkiewicz2dbe7e92008-10-13 21:39:47 +0200356};
357EXPORT_SYMBOL_GPL(sff_dma_ops);