blob: 7aacc7b5c1b203c3cca8ad78ac7253d254893786 [file] [log] [blame]
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001/*
2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27/*
28 * Set enviroment defines for rt2x00.h
29 */
30#define DRV_NAME "rt2500usb"
31
32#include <linux/delay.h>
33#include <linux/etherdevice.h>
34#include <linux/init.h>
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/usb.h>
38
39#include "rt2x00.h"
40#include "rt2x00usb.h"
41#include "rt2500usb.h"
42
43/*
44 * Register access.
45 * All access to the CSR registers will go through the methods
46 * rt2500usb_register_read and rt2500usb_register_write.
47 * BBP and RF register require indirect register access,
48 * and use the CSR registers BBPCSR and RFCSR to achieve this.
49 * These indirect registers work with busy bits,
50 * and we will try maximal REGISTER_BUSY_COUNT times to access
51 * the register while taking a REGISTER_BUSY_DELAY us delay
52 * between each attampt. When the busy bit is still set at that time,
53 * the access attempt is considered to have failed,
54 * and we will print an error.
55 */
56static inline void rt2500usb_register_read(const struct rt2x00_dev *rt2x00dev,
57 const unsigned int offset,
58 u16 *value)
59{
60 __le16 reg;
61 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
62 USB_VENDOR_REQUEST_IN, offset,
63 &reg, sizeof(u16), REGISTER_TIMEOUT);
64 *value = le16_to_cpu(reg);
65}
66
67static inline void rt2500usb_register_multiread(const struct rt2x00_dev
68 *rt2x00dev,
69 const unsigned int offset,
70 void *value, const u16 length)
71{
72 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
73 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
74 USB_VENDOR_REQUEST_IN, offset,
75 value, length, timeout);
76}
77
78static inline void rt2500usb_register_write(const struct rt2x00_dev *rt2x00dev,
79 const unsigned int offset,
80 u16 value)
81{
82 __le16 reg = cpu_to_le16(value);
83 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
84 USB_VENDOR_REQUEST_OUT, offset,
85 &reg, sizeof(u16), REGISTER_TIMEOUT);
86}
87
88static inline void rt2500usb_register_multiwrite(const struct rt2x00_dev
89 *rt2x00dev,
90 const unsigned int offset,
91 void *value, const u16 length)
92{
93 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
94 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
95 USB_VENDOR_REQUEST_OUT, offset,
96 value, length, timeout);
97}
98
99static u16 rt2500usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
100{
101 u16 reg;
102 unsigned int i;
103
104 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
105 rt2500usb_register_read(rt2x00dev, PHY_CSR8, &reg);
106 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
107 break;
108 udelay(REGISTER_BUSY_DELAY);
109 }
110
111 return reg;
112}
113
114static void rt2500usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
115 const unsigned int word, const u8 value)
116{
117 u16 reg;
118
119 /*
120 * Wait until the BBP becomes ready.
121 */
122 reg = rt2500usb_bbp_check(rt2x00dev);
123 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
124 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
125 return;
126 }
127
128 /*
129 * Write the data into the BBP.
130 */
131 reg = 0;
132 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
133 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
134 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
135
136 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
137}
138
139static void rt2500usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
140 const unsigned int word, u8 *value)
141{
142 u16 reg;
143
144 /*
145 * Wait until the BBP becomes ready.
146 */
147 reg = rt2500usb_bbp_check(rt2x00dev);
148 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
149 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
150 return;
151 }
152
153 /*
154 * Write the request into the BBP.
155 */
156 reg = 0;
157 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
158 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
159
160 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
161
162 /*
163 * Wait until the BBP becomes ready.
164 */
165 reg = rt2500usb_bbp_check(rt2x00dev);
166 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
167 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
168 *value = 0xff;
169 return;
170 }
171
172 rt2500usb_register_read(rt2x00dev, PHY_CSR7, &reg);
173 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
174}
175
176static void rt2500usb_rf_write(const struct rt2x00_dev *rt2x00dev,
177 const unsigned int word, const u32 value)
178{
179 u16 reg;
180 unsigned int i;
181
182 if (!word)
183 return;
184
185 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
186 rt2500usb_register_read(rt2x00dev, PHY_CSR10, &reg);
187 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
188 goto rf_write;
189 udelay(REGISTER_BUSY_DELAY);
190 }
191
192 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
193 return;
194
195rf_write:
196 reg = 0;
197 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
198 rt2500usb_register_write(rt2x00dev, PHY_CSR9, reg);
199
200 reg = 0;
201 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
202 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
203 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
204 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
205
206 rt2500usb_register_write(rt2x00dev, PHY_CSR10, reg);
207 rt2x00_rf_write(rt2x00dev, word, value);
208}
209
210#ifdef CONFIG_RT2X00_LIB_DEBUGFS
211#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
212
213static void rt2500usb_read_csr(const struct rt2x00_dev *rt2x00dev,
214 const unsigned int word, u32 *data)
215{
216 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
217}
218
219static void rt2500usb_write_csr(const struct rt2x00_dev *rt2x00dev,
220 const unsigned int word, u32 data)
221{
222 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
223}
224
225static const struct rt2x00debug rt2500usb_rt2x00debug = {
226 .owner = THIS_MODULE,
227 .csr = {
228 .read = rt2500usb_read_csr,
229 .write = rt2500usb_write_csr,
230 .word_size = sizeof(u16),
231 .word_count = CSR_REG_SIZE / sizeof(u16),
232 },
233 .eeprom = {
234 .read = rt2x00_eeprom_read,
235 .write = rt2x00_eeprom_write,
236 .word_size = sizeof(u16),
237 .word_count = EEPROM_SIZE / sizeof(u16),
238 },
239 .bbp = {
240 .read = rt2500usb_bbp_read,
241 .write = rt2500usb_bbp_write,
242 .word_size = sizeof(u8),
243 .word_count = BBP_SIZE / sizeof(u8),
244 },
245 .rf = {
246 .read = rt2x00_rf_read,
247 .write = rt2500usb_rf_write,
248 .word_size = sizeof(u32),
249 .word_count = RF_SIZE / sizeof(u32),
250 },
251};
252#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
253
254/*
255 * Configuration handlers.
256 */
257static void rt2500usb_config_mac_addr(struct rt2x00_dev *rt2x00dev, u8 *addr)
258{
259 __le16 reg[3];
260
261 memset(&reg, 0, sizeof(reg));
262 memcpy(&reg, addr, ETH_ALEN);
263
264 /*
265 * The MAC address is passed to us as an array of bytes,
266 * that array is little endian, so no need for byte ordering.
267 */
268 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, &reg, sizeof(reg));
269}
270
271static void rt2500usb_config_bssid(struct rt2x00_dev *rt2x00dev, u8 *bssid)
272{
273 __le16 reg[3];
274
275 memset(&reg, 0, sizeof(reg));
276 memcpy(&reg, bssid, ETH_ALEN);
277
278 /*
279 * The BSSID is passed to us as an array of bytes,
280 * that array is little endian, so no need for byte ordering.
281 */
282 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, &reg, sizeof(reg));
283}
284
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700285static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev, const int type)
286{
Johannes Berg4150c572007-09-17 01:29:23 -0400287 struct interface *intf = &rt2x00dev->interface;
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700288 u16 reg;
289
290 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
291
292 /*
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700293 * Enable beacon config
294 */
295 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
296 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET,
297 (PREAMBLE + get_duration(IEEE80211_HEADER, 2)) >> 6);
Johannes Berg4150c572007-09-17 01:29:23 -0400298 if (is_interface_type(intf, IEEE80211_IF_TYPE_STA))
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700299 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 0);
300 else
301 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 2);
302 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
303
304 /*
305 * Enable synchronisation.
306 */
307 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
308 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
309 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
310
311 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
Johannes Berg4150c572007-09-17 01:29:23 -0400312 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
313 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700314 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
Johannes Berg4150c572007-09-17 01:29:23 -0400315 if (is_interface_type(intf, IEEE80211_IF_TYPE_IBSS) ||
316 is_interface_type(intf, IEEE80211_IF_TYPE_AP))
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700317 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 2);
Johannes Berg4150c572007-09-17 01:29:23 -0400318 else if (is_interface_type(intf, IEEE80211_IF_TYPE_STA))
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700319 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 1);
Johannes Berg4150c572007-09-17 01:29:23 -0400320 else
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700321 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700322 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
323}
324
325static void rt2500usb_config_rate(struct rt2x00_dev *rt2x00dev, const int rate)
326{
327 struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
328 u16 reg;
329 u16 value;
330 u16 preamble;
331
332 if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE))
333 preamble = SHORT_PREAMBLE;
334 else
335 preamble = PREAMBLE;
336
337 reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK;
338
339 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, reg);
340
341 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
342 value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ?
343 SHORT_DIFS : DIFS) +
344 PLCP + preamble + get_duration(ACK_SIZE, 10);
345 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, value);
346 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
347
348 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
349 if (preamble == SHORT_PREAMBLE)
350 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 1);
351 else
352 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 0);
353 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
354}
355
356static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
357 const int phymode)
358{
359 struct ieee80211_hw_mode *mode;
360 struct ieee80211_rate *rate;
361
362 if (phymode == MODE_IEEE80211A)
363 rt2x00dev->curr_hwmode = HWMODE_A;
364 else if (phymode == MODE_IEEE80211B)
365 rt2x00dev->curr_hwmode = HWMODE_B;
366 else
367 rt2x00dev->curr_hwmode = HWMODE_G;
368
369 mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
370 rate = &mode->rates[mode->num_rates - 1];
371
372 rt2500usb_config_rate(rt2x00dev, rate->val2);
373
374 if (phymode == MODE_IEEE80211B) {
375 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b);
376 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040);
377 } else {
378 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0005);
379 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x016c);
380 }
381}
382
383static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
384 const int index, const int channel,
385 const int txpower)
386{
387 struct rf_channel reg;
388
389 /*
390 * Fill rf_reg structure.
391 */
392 memcpy(&reg, &rt2x00dev->spec.channels[index], sizeof(reg));
393
394 /*
395 * Set TXpower.
396 */
397 rt2x00_set_field32(&reg.rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
398
399 /*
400 * For RT2525E we should first set the channel to half band higher.
401 */
402 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
403 static const u32 vals[] = {
404 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
405 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
406 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
407 0x00000902, 0x00000906
408 };
409
410 rt2500usb_rf_write(rt2x00dev, 2, vals[channel - 1]);
411 if (reg.rf4)
412 rt2500usb_rf_write(rt2x00dev, 4, reg.rf4);
413 }
414
415 rt2500usb_rf_write(rt2x00dev, 1, reg.rf1);
416 rt2500usb_rf_write(rt2x00dev, 2, reg.rf2);
417 rt2500usb_rf_write(rt2x00dev, 3, reg.rf3);
418 if (reg.rf4)
419 rt2500usb_rf_write(rt2x00dev, 4, reg.rf4);
420}
421
422static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
423 const int txpower)
424{
425 u32 rf3;
426
427 rt2x00_rf_read(rt2x00dev, 3, &rf3);
428 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
429 rt2500usb_rf_write(rt2x00dev, 3, rf3);
430}
431
432static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
433 const int antenna_tx, const int antenna_rx)
434{
435 u8 r2;
436 u8 r14;
437 u16 csr5;
438 u16 csr6;
439
440 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
441 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
442 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
443 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
444
445 /*
446 * Configure the TX antenna.
447 */
448 switch (antenna_tx) {
449 case ANTENNA_SW_DIVERSITY:
450 case ANTENNA_HW_DIVERSITY:
451 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
452 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
453 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
454 break;
455 case ANTENNA_A:
456 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
457 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
458 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
459 break;
460 case ANTENNA_B:
461 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
462 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
463 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
464 break;
465 }
466
467 /*
468 * Configure the RX antenna.
469 */
470 switch (antenna_rx) {
471 case ANTENNA_SW_DIVERSITY:
472 case ANTENNA_HW_DIVERSITY:
473 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
474 break;
475 case ANTENNA_A:
476 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
477 break;
478 case ANTENNA_B:
479 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
480 break;
481 }
482
483 /*
484 * RT2525E and RT5222 need to flip TX I/Q
485 */
486 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
487 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
488 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
489 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
490 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
491
492 /*
493 * RT2525E does not need RX I/Q Flip.
494 */
495 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
496 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
497 } else {
498 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
499 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
500 }
501
502 rt2500usb_bbp_write(rt2x00dev, 2, r2);
503 rt2500usb_bbp_write(rt2x00dev, 14, r14);
504 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
505 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
506}
507
508static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
509 const int short_slot_time,
510 const int beacon_int)
511{
512 u16 reg;
513
514 rt2500usb_register_write(rt2x00dev, MAC_CSR10,
515 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
516
517 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
518 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, beacon_int * 4);
519 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
520}
521
522static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
523 const unsigned int flags,
524 struct ieee80211_conf *conf)
525{
526 int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
527
528 if (flags & CONFIG_UPDATE_PHYMODE)
529 rt2500usb_config_phymode(rt2x00dev, conf->phymode);
530 if (flags & CONFIG_UPDATE_CHANNEL)
531 rt2500usb_config_channel(rt2x00dev, conf->channel_val,
532 conf->channel, conf->power_level);
533 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
534 rt2500usb_config_txpower(rt2x00dev, conf->power_level);
535 if (flags & CONFIG_UPDATE_ANTENNA)
536 rt2500usb_config_antenna(rt2x00dev, conf->antenna_sel_tx,
537 conf->antenna_sel_rx);
538 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
539 rt2500usb_config_duration(rt2x00dev, short_slot_time,
540 conf->beacon_int);
541}
542
543/*
544 * LED functions.
545 */
546static void rt2500usb_enable_led(struct rt2x00_dev *rt2x00dev)
547{
548 u16 reg;
549
550 rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
551 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
552 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
553 rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
554
555 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
556
557 if (rt2x00dev->led_mode == LED_MODE_TXRX_ACTIVITY) {
558 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
559 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
560 } else if (rt2x00dev->led_mode == LED_MODE_ASUS) {
561 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
562 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
563 } else {
564 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
565 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
566 }
567
568 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
569}
570
571static void rt2500usb_disable_led(struct rt2x00_dev *rt2x00dev)
572{
573 u16 reg;
574
575 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
576 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
577 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
578 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
579}
580
581/*
582 * Link tuning
583 */
584static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev)
585{
586 u16 reg;
587
588 /*
589 * Update FCS error count from register.
590 */
591 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
592 rt2x00dev->link.rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
593
594 /*
595 * Update False CCA count from register.
596 */
597 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
598 rt2x00dev->link.false_cca =
599 rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
600}
601
602static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
603{
604 u16 eeprom;
605 u16 value;
606
607 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
608 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
609 rt2500usb_bbp_write(rt2x00dev, 24, value);
610
611 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
612 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
613 rt2500usb_bbp_write(rt2x00dev, 25, value);
614
615 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
616 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
617 rt2500usb_bbp_write(rt2x00dev, 61, value);
618
619 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
620 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
621 rt2500usb_bbp_write(rt2x00dev, 17, value);
622
623 rt2x00dev->link.vgc_level = value;
624}
625
626static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
627{
628 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
629 u16 bbp_thresh;
630 u16 vgc_bound;
631 u16 sens;
632 u16 r24;
633 u16 r25;
634 u16 r61;
635 u16 r17_sens;
636 u8 r17;
637 u8 up_bound;
638 u8 low_bound;
639
640 /*
641 * Determine the BBP tuning threshold and correctly
642 * set BBP 24, 25 and 61.
643 */
644 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
645 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
646
647 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
648 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
649 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
650
651 if ((rssi + bbp_thresh) > 0) {
652 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
653 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
654 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
655 } else {
656 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
657 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
658 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
659 }
660
661 rt2500usb_bbp_write(rt2x00dev, 24, r24);
662 rt2500usb_bbp_write(rt2x00dev, 25, r25);
663 rt2500usb_bbp_write(rt2x00dev, 61, r61);
664
665 /*
666 * Read current r17 value, as well as the sensitivity values
667 * for the r17 register.
668 */
669 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
670 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
671
672 /*
673 * A too low RSSI will cause too much false CCA which will
674 * then corrupt the R17 tuning. To remidy this the tuning should
675 * be stopped (While making sure the R17 value will not exceed limits)
676 */
677 if (rssi >= -40) {
678 if (r17 != 0x60)
679 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
680 return;
681 }
682
683 /*
684 * Special big-R17 for short distance
685 */
686 if (rssi >= -58) {
687 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
688 if (r17 != sens)
689 rt2500usb_bbp_write(rt2x00dev, 17, sens);
690 return;
691 }
692
693 /*
694 * Special mid-R17 for middle distance
695 */
696 if (rssi >= -74) {
697 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
698 if (r17 != sens)
699 rt2500usb_bbp_write(rt2x00dev, 17, sens);
700 return;
701 }
702
703 /*
704 * Leave short or middle distance condition, restore r17
705 * to the dynamic tuning range.
706 */
707 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
708 vgc_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
709
710 low_bound = 0x32;
711 if (rssi >= -77)
712 up_bound = vgc_bound;
713 else
714 up_bound = vgc_bound - (-77 - rssi);
715
716 if (up_bound < low_bound)
717 up_bound = low_bound;
718
719 if (r17 > up_bound) {
720 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
721 rt2x00dev->link.vgc_level = up_bound;
722 } else if (rt2x00dev->link.false_cca > 512 && r17 < up_bound) {
723 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
724 rt2x00dev->link.vgc_level = r17;
725 } else if (rt2x00dev->link.false_cca < 100 && r17 > low_bound) {
726 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
727 rt2x00dev->link.vgc_level = r17;
728 }
729}
730
731/*
732 * Initialization functions.
733 */
734static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
735{
736 u16 reg;
737
738 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
739 USB_MODE_TEST, REGISTER_TIMEOUT);
740 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
741 0x00f0, REGISTER_TIMEOUT);
742
743 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
744 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
745 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
746
747 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
748 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
749
750 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
751 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
752 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
753 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
754 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
755
756 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
757 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
758 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
759 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
760 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
761
762 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
763 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
764 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
765 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
766 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
767 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
768
769 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
770 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
771 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
772 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
773 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
774 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
775
776 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
777 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
778 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
779 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
780 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
781 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
782
783 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
784 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
785 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
786 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
787 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
788 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
789
790 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
791 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
792
793 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
794 return -EBUSY;
795
796 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
797 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
798 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
799 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
800 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
801
802 if (rt2x00_get_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
803 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
804 reg &= ~0x0002;
805 } else {
806 reg = 0x3002;
807 }
808 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
809
810 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
811 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
812 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
813 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
814
815 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
816 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
817 rt2x00dev->rx->data_size);
818 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
819
820 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
821 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
822 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
823 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
824
825 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
826 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
827 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
828
829 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
830 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
831 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
832
833 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
834 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
835 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
836
837 return 0;
838}
839
840static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
841{
842 unsigned int i;
843 u16 eeprom;
844 u8 value;
845 u8 reg_id;
846
847 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
848 rt2500usb_bbp_read(rt2x00dev, 0, &value);
849 if ((value != 0xff) && (value != 0x00))
850 goto continue_csr_init;
851 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
852 udelay(REGISTER_BUSY_DELAY);
853 }
854
855 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
856 return -EACCES;
857
858continue_csr_init:
859 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
860 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
861 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
862 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
863 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
864 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
865 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
866 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
867 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
868 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
869 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
870 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
871 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
872 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
873 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
874 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
875 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
876 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
877 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
878 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
879 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
880 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
881 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
882 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
883 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
884 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
885 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
886 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
887 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
888 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
889 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
890
891 DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
892 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
893 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
894
895 if (eeprom != 0xffff && eeprom != 0x0000) {
896 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
897 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
898 DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
899 reg_id, value);
900 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
901 }
902 }
903 DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
904
905 return 0;
906}
907
908/*
909 * Device state switch handlers.
910 */
911static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
912 enum dev_state state)
913{
914 u16 reg;
915
916 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
917 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
918 state == STATE_RADIO_RX_OFF);
919 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
920}
921
922static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
923{
924 /*
925 * Initialize all registers.
926 */
927 if (rt2500usb_init_registers(rt2x00dev) ||
928 rt2500usb_init_bbp(rt2x00dev)) {
929 ERROR(rt2x00dev, "Register initialization failed.\n");
930 return -EIO;
931 }
932
933 rt2x00usb_enable_radio(rt2x00dev);
934
935 /*
936 * Enable LED
937 */
938 rt2500usb_enable_led(rt2x00dev);
939
940 return 0;
941}
942
943static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
944{
945 /*
946 * Disable LED
947 */
948 rt2500usb_disable_led(rt2x00dev);
949
950 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
951 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
952
953 /*
954 * Disable synchronisation.
955 */
956 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
957
958 rt2x00usb_disable_radio(rt2x00dev);
959}
960
961static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
962 enum dev_state state)
963{
964 u16 reg;
965 u16 reg2;
966 unsigned int i;
967 char put_to_sleep;
968 char bbp_state;
969 char rf_state;
970
971 put_to_sleep = (state != STATE_AWAKE);
972
973 reg = 0;
974 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
975 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
976 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
977 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
978 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
979 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
980
981 /*
982 * Device is not guaranteed to be in the requested state yet.
983 * We must wait until the register indicates that the
984 * device has entered the correct state.
985 */
986 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
987 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
988 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
989 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
990 if (bbp_state == state && rf_state == state)
991 return 0;
992 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
993 msleep(30);
994 }
995
996 NOTICE(rt2x00dev, "Device failed to enter state %d, "
997 "current device state: bbp %d and rf %d.\n",
998 state, bbp_state, rf_state);
999
1000 return -EBUSY;
1001}
1002
1003static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1004 enum dev_state state)
1005{
1006 int retval = 0;
1007
1008 switch (state) {
1009 case STATE_RADIO_ON:
1010 retval = rt2500usb_enable_radio(rt2x00dev);
1011 break;
1012 case STATE_RADIO_OFF:
1013 rt2500usb_disable_radio(rt2x00dev);
1014 break;
1015 case STATE_RADIO_RX_ON:
1016 case STATE_RADIO_RX_OFF:
1017 rt2500usb_toggle_rx(rt2x00dev, state);
1018 break;
1019 case STATE_DEEP_SLEEP:
1020 case STATE_SLEEP:
1021 case STATE_STANDBY:
1022 case STATE_AWAKE:
1023 retval = rt2500usb_set_state(rt2x00dev, state);
1024 break;
1025 default:
1026 retval = -ENOTSUPP;
1027 break;
1028 }
1029
1030 return retval;
1031}
1032
1033/*
1034 * TX descriptor initialization
1035 */
1036static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1037 struct data_desc *txd,
Johannes Berg4150c572007-09-17 01:29:23 -04001038 struct txdata_entry_desc *desc,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001039 struct ieee80211_hdr *ieee80211hdr,
1040 unsigned int length,
1041 struct ieee80211_tx_control *control)
1042{
1043 u32 word;
1044
1045 /*
1046 * Start writing the descriptor words.
1047 */
1048 rt2x00_desc_read(txd, 1, &word);
1049 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1050 rt2x00_set_field32(&word, TXD_W1_AIFS, desc->aifs);
1051 rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1052 rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1053 rt2x00_desc_write(txd, 1, word);
1054
1055 rt2x00_desc_read(txd, 2, &word);
1056 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1057 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1058 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1059 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1060 rt2x00_desc_write(txd, 2, word);
1061
1062 rt2x00_desc_read(txd, 0, &word);
1063 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1064 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1065 test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1066 rt2x00_set_field32(&word, TXD_W0_ACK,
1067 !(control->flags & IEEE80211_TXCTL_NO_ACK));
1068 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1069 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1070 rt2x00_set_field32(&word, TXD_W0_OFDM,
1071 test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1072 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1073 !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
1074 rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1075 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1076 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1077 rt2x00_desc_write(txd, 0, word);
1078}
1079
1080/*
1081 * TX data initialization
1082 */
1083static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1084 unsigned int queue)
1085{
1086 u16 reg;
1087
1088 if (queue != IEEE80211_TX_QUEUE_BEACON)
1089 return;
1090
1091 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1092 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1093 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1094 /*
1095 * Beacon generation will fail initially.
1096 * To prevent this we need to register the TXRX_CSR19
1097 * register several times.
1098 */
1099 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1100 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1101 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1102 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1103 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1104 }
1105}
1106
1107/*
1108 * RX control handlers
1109 */
Johannes Berg4150c572007-09-17 01:29:23 -04001110static void rt2500usb_fill_rxdone(struct data_entry *entry,
1111 struct rxdata_entry_desc *desc)
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001112{
1113 struct urb *urb = entry->priv;
1114 struct data_desc *rxd = (struct data_desc *)(entry->skb->data +
1115 (urb->actual_length -
1116 entry->ring->desc_size));
1117 u32 word0;
1118 u32 word1;
1119
1120 rt2x00_desc_read(rxd, 0, &word0);
1121 rt2x00_desc_read(rxd, 1, &word1);
1122
Johannes Berg4150c572007-09-17 01:29:23 -04001123 desc->flags = 0;
1124 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1125 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1126 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1127 desc->flags |= RX_FLAG_FAILED_PLCP_CRC;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001128
1129 /*
1130 * Obtain the status about this packet.
1131 */
Johannes Berg4150c572007-09-17 01:29:23 -04001132 desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1133 desc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001134 entry->ring->rt2x00dev->rssi_offset;
Johannes Berg4150c572007-09-17 01:29:23 -04001135 desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1136 desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001137
Johannes Berg4150c572007-09-17 01:29:23 -04001138 return;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001139}
1140
1141/*
1142 * Interrupt functions.
1143 */
1144static void rt2500usb_beacondone(struct urb *urb)
1145{
1146 struct data_entry *entry = (struct data_entry *)urb->context;
1147 struct data_ring *ring = entry->ring;
1148
1149 if (!test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags))
1150 return;
1151
1152 /*
1153 * Check if this was the guardian beacon,
1154 * if that was the case we need to send the real beacon now.
1155 * Otherwise we should free the sk_buffer, the device
1156 * should be doing the rest of the work now.
1157 */
1158 if (ring->index == 1) {
1159 rt2x00_ring_index_done_inc(ring);
1160 entry = rt2x00_get_data_entry(ring);
1161 usb_submit_urb(entry->priv, GFP_ATOMIC);
1162 rt2x00_ring_index_inc(ring);
1163 } else if (ring->index_done == 1) {
1164 entry = rt2x00_get_data_entry_done(ring);
1165 if (entry->skb) {
1166 dev_kfree_skb(entry->skb);
1167 entry->skb = NULL;
1168 }
1169 rt2x00_ring_index_done_inc(ring);
1170 }
1171}
1172
1173/*
1174 * Device probe functions.
1175 */
1176static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1177{
1178 u16 word;
1179 u8 *mac;
1180
1181 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1182
1183 /*
1184 * Start validation of the data that has been read.
1185 */
1186 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1187 if (!is_valid_ether_addr(mac)) {
Joe Perches0795af52007-10-03 17:59:30 -07001188 DECLARE_MAC_BUF(macbuf);
1189
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001190 random_ether_addr(mac);
Joe Perches0795af52007-10-03 17:59:30 -07001191 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001192 }
1193
1194 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1195 if (word == 0xffff) {
1196 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1197 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 0);
1198 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 0);
1199 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 0);
1200 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1201 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1202 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1203 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1204 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1205 }
1206
1207 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1208 if (word == 0xffff) {
1209 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1210 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1211 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1212 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1213 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1214 }
1215
1216 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1217 if (word == 0xffff) {
1218 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1219 DEFAULT_RSSI_OFFSET);
1220 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1221 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1222 }
1223
1224 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1225 if (word == 0xffff) {
1226 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1227 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1228 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1229 }
1230
1231 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1232 if (word == 0xffff) {
1233 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1234 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1235 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1236 }
1237
1238 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1239 if (word == 0xffff) {
1240 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1241 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1242 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1243 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1244 }
1245
1246 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1247 if (word == 0xffff) {
1248 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1249 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1250 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1251 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1252 }
1253
1254 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1255 if (word == 0xffff) {
1256 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1257 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1258 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1259 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1260 }
1261
1262 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1263 if (word == 0xffff) {
1264 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1265 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1266 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1267 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1268 }
1269
1270 return 0;
1271}
1272
1273static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1274{
1275 u16 reg;
1276 u16 value;
1277 u16 eeprom;
1278
1279 /*
1280 * Read EEPROM word for configuration.
1281 */
1282 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1283
1284 /*
1285 * Identify RF chipset.
1286 */
1287 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1288 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1289 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1290
1291 if (rt2x00_rev(&rt2x00dev->chip, 0xffff0)) {
1292 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1293 return -ENODEV;
1294 }
1295
1296 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1297 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1298 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1299 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1300 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1301 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1302 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1303 return -ENODEV;
1304 }
1305
1306 /*
1307 * Identify default antenna configuration.
1308 */
1309 rt2x00dev->hw->conf.antenna_sel_tx =
1310 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1311 rt2x00dev->hw->conf.antenna_sel_rx =
1312 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1313
1314 /*
1315 * Store led mode, for correct led behaviour.
1316 */
1317 rt2x00dev->led_mode =
1318 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1319
1320 /*
1321 * Check if the BBP tuning should be disabled.
1322 */
1323 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1324 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1325 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1326
1327 /*
1328 * Read the RSSI <-> dBm offset information.
1329 */
1330 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1331 rt2x00dev->rssi_offset =
1332 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1333
1334 return 0;
1335}
1336
1337/*
1338 * RF value list for RF2522
1339 * Supports: 2.4 GHz
1340 */
1341static const struct rf_channel rf_vals_bg_2522[] = {
1342 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1343 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1344 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1345 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1346 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1347 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1348 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1349 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1350 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1351 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1352 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1353 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1354 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1355 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1356};
1357
1358/*
1359 * RF value list for RF2523
1360 * Supports: 2.4 GHz
1361 */
1362static const struct rf_channel rf_vals_bg_2523[] = {
1363 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1364 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1365 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1366 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1367 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1368 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1369 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1370 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1371 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1372 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1373 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1374 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1375 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1376 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1377};
1378
1379/*
1380 * RF value list for RF2524
1381 * Supports: 2.4 GHz
1382 */
1383static const struct rf_channel rf_vals_bg_2524[] = {
1384 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1385 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1386 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1387 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1388 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1389 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1390 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1391 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1392 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1393 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1394 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1395 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1396 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1397 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1398};
1399
1400/*
1401 * RF value list for RF2525
1402 * Supports: 2.4 GHz
1403 */
1404static const struct rf_channel rf_vals_bg_2525[] = {
1405 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1406 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1407 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1408 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1409 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1410 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1411 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1412 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1413 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1414 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1415 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1416 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1417 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1418 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1419};
1420
1421/*
1422 * RF value list for RF2525e
1423 * Supports: 2.4 GHz
1424 */
1425static const struct rf_channel rf_vals_bg_2525e[] = {
1426 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1427 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1428 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1429 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1430 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1431 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1432 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1433 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1434 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1435 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1436 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1437 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1438 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1439 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1440};
1441
1442/*
1443 * RF value list for RF5222
1444 * Supports: 2.4 GHz & 5.2 GHz
1445 */
1446static const struct rf_channel rf_vals_5222[] = {
1447 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1448 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1449 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1450 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1451 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1452 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1453 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1454 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1455 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1456 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1457 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1458 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1459 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1460 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1461
1462 /* 802.11 UNI / HyperLan 2 */
1463 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1464 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1465 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1466 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1467 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1468 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1469 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1470 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1471
1472 /* 802.11 HyperLan 2 */
1473 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1474 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1475 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1476 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1477 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1478 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1479 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1480 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1481 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1482 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1483
1484 /* 802.11 UNII */
1485 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1486 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1487 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1488 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1489 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1490};
1491
1492static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1493{
1494 struct hw_mode_spec *spec = &rt2x00dev->spec;
1495 u8 *txpower;
1496 unsigned int i;
1497
1498 /*
1499 * Initialize all hw fields.
1500 */
1501 rt2x00dev->hw->flags =
1502 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1503 IEEE80211_HW_RX_INCLUDES_FCS |
Johannes Berg4150c572007-09-17 01:29:23 -04001504 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001505 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1506 rt2x00dev->hw->max_signal = MAX_SIGNAL;
1507 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1508 rt2x00dev->hw->queues = 2;
1509
1510 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1511 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1512 rt2x00_eeprom_addr(rt2x00dev,
1513 EEPROM_MAC_ADDR_0));
1514
1515 /*
1516 * Convert tx_power array in eeprom.
1517 */
1518 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1519 for (i = 0; i < 14; i++)
1520 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1521
1522 /*
1523 * Initialize hw_mode information.
1524 */
1525 spec->num_modes = 2;
1526 spec->num_rates = 12;
1527 spec->tx_power_a = NULL;
1528 spec->tx_power_bg = txpower;
1529 spec->tx_power_default = DEFAULT_TXPOWER;
1530
1531 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1532 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1533 spec->channels = rf_vals_bg_2522;
1534 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1535 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1536 spec->channels = rf_vals_bg_2523;
1537 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1538 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1539 spec->channels = rf_vals_bg_2524;
1540 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1541 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1542 spec->channels = rf_vals_bg_2525;
1543 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1544 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1545 spec->channels = rf_vals_bg_2525e;
1546 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1547 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1548 spec->channels = rf_vals_5222;
1549 spec->num_modes = 3;
1550 }
1551}
1552
1553static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1554{
1555 int retval;
1556
1557 /*
1558 * Allocate eeprom data.
1559 */
1560 retval = rt2500usb_validate_eeprom(rt2x00dev);
1561 if (retval)
1562 return retval;
1563
1564 retval = rt2500usb_init_eeprom(rt2x00dev);
1565 if (retval)
1566 return retval;
1567
1568 /*
1569 * Initialize hw specifications.
1570 */
1571 rt2500usb_probe_hw_mode(rt2x00dev);
1572
1573 /*
Johannes Berg4150c572007-09-17 01:29:23 -04001574 * This device requires the beacon ring
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001575 */
Ivo van Doorn066cb632007-09-25 20:55:39 +02001576 __set_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001577
1578 /*
1579 * Set the rssi offset.
1580 */
1581 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1582
1583 return 0;
1584}
1585
1586/*
1587 * IEEE80211 stack callback functions.
1588 */
Johannes Berg4150c572007-09-17 01:29:23 -04001589static void rt2500usb_configure_filter(struct ieee80211_hw *hw,
1590 unsigned int changed_flags,
1591 unsigned int *total_flags,
1592 int mc_count,
1593 struct dev_addr_list *mc_list)
1594{
1595 struct rt2x00_dev *rt2x00dev = hw->priv;
1596 struct interface *intf = &rt2x00dev->interface;
1597 u16 reg;
1598
1599 /*
1600 * Mask off any flags we are going to ignore from
1601 * the total_flags field.
1602 */
1603 *total_flags &=
1604 FIF_ALLMULTI |
1605 FIF_FCSFAIL |
1606 FIF_PLCPFAIL |
1607 FIF_CONTROL |
1608 FIF_OTHER_BSS |
1609 FIF_PROMISC_IN_BSS;
1610
1611 /*
1612 * Apply some rules to the filters:
1613 * - Some filters imply different filters to be set.
1614 * - Some things we can't filter out at all.
1615 * - Some filters are set based on interface type.
1616 */
1617 if (mc_count)
1618 *total_flags |= FIF_ALLMULTI;
1619 if (changed_flags & FIF_OTHER_BSS ||
1620 changed_flags & FIF_PROMISC_IN_BSS)
1621 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1622 if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1623 *total_flags |= FIF_PROMISC_IN_BSS;
1624
1625 /*
1626 * Check if there is any work left for us.
1627 */
1628 if (intf->filter == *total_flags)
1629 return;
1630 intf->filter = *total_flags;
1631
1632 /*
1633 * When in atomic context, reschedule and let rt2x00lib
1634 * call this function again.
1635 */
1636 if (in_atomic()) {
1637 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1638 return;
1639 }
1640
1641 /*
1642 * Start configuration steps.
1643 * Note that the version error will always be dropped
1644 * and broadcast frames will always be accepted since
1645 * there is no filter for it at this time.
1646 */
1647 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1648 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
1649 !(*total_flags & FIF_FCSFAIL));
1650 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
1651 !(*total_flags & FIF_PLCPFAIL));
1652 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
1653 !(*total_flags & FIF_CONTROL));
1654 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
1655 !(*total_flags & FIF_PROMISC_IN_BSS));
1656 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
1657 !(*total_flags & FIF_PROMISC_IN_BSS));
1658 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
1659 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
1660 !(*total_flags & FIF_ALLMULTI));
1661 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
1662 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1663}
1664
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001665static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
1666 struct sk_buff *skb,
1667 struct ieee80211_tx_control *control)
1668{
1669 struct rt2x00_dev *rt2x00dev = hw->priv;
1670 struct usb_device *usb_dev =
1671 interface_to_usbdev(rt2x00dev_usb(rt2x00dev));
1672 struct data_ring *ring =
1673 rt2x00lib_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1674 struct data_entry *beacon;
1675 struct data_entry *guardian;
1676 int length;
1677
1678 /*
1679 * Just in case the ieee80211 doesn't set this,
1680 * but we need this queue set for the descriptor
1681 * initialization.
1682 */
1683 control->queue = IEEE80211_TX_QUEUE_BEACON;
1684
1685 /*
1686 * Obtain 2 entries, one for the guardian byte,
1687 * the second for the actual beacon.
1688 */
1689 guardian = rt2x00_get_data_entry(ring);
1690 rt2x00_ring_index_inc(ring);
1691 beacon = rt2x00_get_data_entry(ring);
1692
1693 /*
1694 * First we create the beacon.
1695 */
1696 skb_push(skb, ring->desc_size);
1697 rt2x00lib_write_tx_desc(rt2x00dev, (struct data_desc *)skb->data,
1698 (struct ieee80211_hdr *)(skb->data +
1699 ring->desc_size),
1700 skb->len - ring->desc_size, control);
1701
1702 /*
1703 * Length passed to usb_fill_urb cannot be an odd number,
1704 * so add 1 byte to make it even.
1705 */
1706 length = skb->len;
1707 if (length % 2)
1708 length++;
1709
1710 usb_fill_bulk_urb(beacon->priv, usb_dev,
1711 usb_sndbulkpipe(usb_dev, 1),
1712 skb->data, length, rt2500usb_beacondone, beacon);
1713
1714 beacon->skb = skb;
1715
1716 /*
1717 * Second we need to create the guardian byte.
1718 * We only need a single byte, so lets recycle
1719 * the 'flags' field we are not using for beacons.
1720 */
1721 guardian->flags = 0;
1722 usb_fill_bulk_urb(guardian->priv, usb_dev,
1723 usb_sndbulkpipe(usb_dev, 1),
1724 &guardian->flags, 1, rt2500usb_beacondone, guardian);
1725
1726 /*
1727 * Send out the guardian byte.
1728 */
1729 usb_submit_urb(guardian->priv, GFP_ATOMIC);
1730
1731 /*
1732 * Enable beacon generation.
1733 */
1734 rt2500usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1735
1736 return 0;
1737}
1738
1739static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1740 .tx = rt2x00mac_tx,
Johannes Berg4150c572007-09-17 01:29:23 -04001741 .start = rt2x00mac_start,
1742 .stop = rt2x00mac_stop,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001743 .add_interface = rt2x00mac_add_interface,
1744 .remove_interface = rt2x00mac_remove_interface,
1745 .config = rt2x00mac_config,
1746 .config_interface = rt2x00mac_config_interface,
Johannes Berg4150c572007-09-17 01:29:23 -04001747 .configure_filter = rt2500usb_configure_filter,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001748 .get_stats = rt2x00mac_get_stats,
1749 .conf_tx = rt2x00mac_conf_tx,
1750 .get_tx_stats = rt2x00mac_get_tx_stats,
1751 .beacon_update = rt2500usb_beacon_update,
1752};
1753
1754static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1755 .probe_hw = rt2500usb_probe_hw,
1756 .initialize = rt2x00usb_initialize,
1757 .uninitialize = rt2x00usb_uninitialize,
1758 .set_device_state = rt2500usb_set_device_state,
1759 .link_stats = rt2500usb_link_stats,
1760 .reset_tuner = rt2500usb_reset_tuner,
1761 .link_tuner = rt2500usb_link_tuner,
1762 .write_tx_desc = rt2500usb_write_tx_desc,
1763 .write_tx_data = rt2x00usb_write_tx_data,
1764 .kick_tx_queue = rt2500usb_kick_tx_queue,
1765 .fill_rxdone = rt2500usb_fill_rxdone,
1766 .config_mac_addr = rt2500usb_config_mac_addr,
1767 .config_bssid = rt2500usb_config_bssid,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001768 .config_type = rt2500usb_config_type,
1769 .config = rt2500usb_config,
1770};
1771
1772static const struct rt2x00_ops rt2500usb_ops = {
1773 .name = DRV_NAME,
1774 .rxd_size = RXD_DESC_SIZE,
1775 .txd_size = TXD_DESC_SIZE,
1776 .eeprom_size = EEPROM_SIZE,
1777 .rf_size = RF_SIZE,
1778 .lib = &rt2500usb_rt2x00_ops,
1779 .hw = &rt2500usb_mac80211_ops,
1780#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1781 .debugfs = &rt2500usb_rt2x00debug,
1782#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1783};
1784
1785/*
1786 * rt2500usb module information.
1787 */
1788static struct usb_device_id rt2500usb_device_table[] = {
1789 /* ASUS */
1790 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1791 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1792 /* Belkin */
1793 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1794 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1795 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1796 /* Cisco Systems */
1797 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1798 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1799 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1800 /* Conceptronic */
1801 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1802 /* D-LINK */
1803 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1804 /* Gigabyte */
1805 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1806 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1807 /* Hercules */
1808 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1809 /* Melco */
1810 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1811 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1812 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1813 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
1814
1815 /* MSI */
1816 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1817 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1818 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1819 /* Ralink */
1820 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1821 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1822 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1823 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1824 /* Siemens */
1825 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1826 /* SMC */
1827 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1828 /* Spairon */
1829 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1830 /* Trust */
1831 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1832 /* Zinwell */
1833 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1834 { 0, }
1835};
1836
1837MODULE_AUTHOR(DRV_PROJECT);
1838MODULE_VERSION(DRV_VERSION);
1839MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1840MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1841MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1842MODULE_LICENSE("GPL");
1843
1844static struct usb_driver rt2500usb_driver = {
1845 .name = DRV_NAME,
1846 .id_table = rt2500usb_device_table,
1847 .probe = rt2x00usb_probe,
1848 .disconnect = rt2x00usb_disconnect,
1849 .suspend = rt2x00usb_suspend,
1850 .resume = rt2x00usb_resume,
1851};
1852
1853static int __init rt2500usb_init(void)
1854{
1855 return usb_register(&rt2500usb_driver);
1856}
1857
1858static void __exit rt2500usb_exit(void)
1859{
1860 usb_deregister(&rt2500usb_driver);
1861}
1862
1863module_init(rt2500usb_init);
1864module_exit(rt2500usb_exit);