Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Common prep/pmac/chrp boot and setup code. |
| 3 | */ |
| 4 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 5 | #include <linux/module.h> |
| 6 | #include <linux/string.h> |
| 7 | #include <linux/sched.h> |
| 8 | #include <linux/init.h> |
| 9 | #include <linux/kernel.h> |
| 10 | #include <linux/reboot.h> |
| 11 | #include <linux/delay.h> |
| 12 | #include <linux/initrd.h> |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 13 | #include <linux/tty.h> |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 14 | #include <linux/seq_file.h> |
| 15 | #include <linux/root_dev.h> |
| 16 | #include <linux/cpu.h> |
| 17 | #include <linux/console.h> |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 18 | #include <linux/memblock.h> |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 19 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 20 | #include <asm/io.h> |
| 21 | #include <asm/prom.h> |
| 22 | #include <asm/processor.h> |
| 23 | #include <asm/pgtable.h> |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 24 | #include <asm/setup.h> |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 25 | #include <asm/smp.h> |
| 26 | #include <asm/elf.h> |
| 27 | #include <asm/cputable.h> |
| 28 | #include <asm/bootx.h> |
| 29 | #include <asm/btext.h> |
| 30 | #include <asm/machdep.h> |
| 31 | #include <asm/uaccess.h> |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 32 | #include <asm/pmac_feature.h> |
| 33 | #include <asm/sections.h> |
| 34 | #include <asm/nvram.h> |
| 35 | #include <asm/xmon.h> |
Kumar Gala | 6d7f58b | 2005-10-25 23:57:33 -0500 | [diff] [blame] | 36 | #include <asm/time.h> |
Benjamin Herrenschmidt | 463ce0e | 2005-11-23 17:56:06 +1100 | [diff] [blame] | 37 | #include <asm/serial.h> |
Benjamin Herrenschmidt | 51d3082 | 2005-11-23 17:57:25 +1100 | [diff] [blame] | 38 | #include <asm/udbg.h> |
Benjamin Herrenschmidt | 7752035 | 2008-12-18 19:13:48 +0000 | [diff] [blame] | 39 | #include <asm/mmu_context.h> |
Laurentiu TUDOR | 4e21b94 | 2013-07-03 17:13:15 +0300 | [diff] [blame] | 40 | #include <asm/epapr_hcalls.h> |
LEROY Christophe | 1cd0389 | 2015-09-16 12:04:51 +0200 | [diff] [blame] | 41 | #include <asm/code-patching.h> |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 42 | |
Paul Mackerras | 03501da | 2005-10-26 17:11:18 +1000 | [diff] [blame] | 43 | #define DBG(fmt...) |
| 44 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 45 | extern void bootx_init(unsigned long r4, unsigned long phys); |
| 46 | |
Paul Mackerras | 80579e1 | 2005-10-27 22:42:04 +1000 | [diff] [blame] | 47 | int boot_cpuid_phys; |
Andrew Gabbasov | 9974eec | 2011-07-16 03:22:13 +0000 | [diff] [blame] | 48 | EXPORT_SYMBOL_GPL(boot_cpuid_phys); |
Paul Mackerras | 80579e1 | 2005-10-27 22:42:04 +1000 | [diff] [blame] | 49 | |
Nathan Lynch | 13a9801 | 2008-12-10 14:28:41 +0000 | [diff] [blame] | 50 | int smp_hw_index[NR_CPUS]; |
| 51 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 52 | unsigned long ISA_DMA_THRESHOLD; |
| 53 | unsigned int DMA_MODE_READ; |
| 54 | unsigned int DMA_MODE_WRITE; |
| 55 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 56 | /* |
| 57 | * These are used in binfmt_elf.c to put aux entries on the stack |
| 58 | * for each elf executable being started. |
| 59 | */ |
| 60 | int dcache_bsize; |
| 61 | int icache_bsize; |
| 62 | int ucache_bsize; |
| 63 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 64 | /* |
| 65 | * We're called here very early in the boot. We determine the machine |
| 66 | * type and call the appropriate low-level setup functions. |
| 67 | * -- Cort <cort@fsmlabs.com> |
| 68 | * |
| 69 | * Note that the kernel may be running at an address which is different |
| 70 | * from the address that it was linked at, so we must use RELOC/PTRRELOC |
| 71 | * to access static data (including strings). -- paulus |
| 72 | */ |
Steven Rostedt | 4e491d1 | 2008-05-14 23:49:44 -0400 | [diff] [blame] | 73 | notrace unsigned long __init early_init(unsigned long dt_ptr) |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 74 | { |
| 75 | unsigned long offset = reloc_offset(); |
Benjamin Herrenschmidt | 42c4aaa | 2006-10-24 16:42:40 +1000 | [diff] [blame] | 76 | struct cpu_spec *spec; |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 77 | |
Paul Mackerras | dd184343 | 2005-10-17 20:13:47 +1000 | [diff] [blame] | 78 | /* First zero the BSS -- use memset_io, some platforms don't have |
| 79 | * caches on yet */ |
Mark A. Greer | 556b09c | 2006-10-25 16:36:49 -0700 | [diff] [blame] | 80 | memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, |
| 81 | __bss_stop - __bss_start); |
Paul Mackerras | dd184343 | 2005-10-17 20:13:47 +1000 | [diff] [blame] | 82 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 83 | /* |
| 84 | * Identify the CPU type and fix up code sections |
| 85 | * that depend on which cpu we have. |
| 86 | */ |
Paul Mackerras | 974a76f | 2006-11-10 20:38:53 +1100 | [diff] [blame] | 87 | spec = identify_cpu(offset, mfspr(SPRN_PVR)); |
Benjamin Herrenschmidt | 42c4aaa | 2006-10-24 16:42:40 +1000 | [diff] [blame] | 88 | |
Benjamin Herrenschmidt | 0909c8c | 2006-10-20 11:47:18 +1000 | [diff] [blame] | 89 | do_feature_fixups(spec->cpu_features, |
Benjamin Herrenschmidt | 42c4aaa | 2006-10-24 16:42:40 +1000 | [diff] [blame] | 90 | PTRRELOC(&__start___ftr_fixup), |
| 91 | PTRRELOC(&__stop___ftr_fixup)); |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 92 | |
Benjamin Herrenschmidt | 7c03d65 | 2008-12-18 19:13:32 +0000 | [diff] [blame] | 93 | do_feature_fixups(spec->mmu_features, |
| 94 | PTRRELOC(&__start___mmu_ftr_fixup), |
| 95 | PTRRELOC(&__stop___mmu_ftr_fixup)); |
| 96 | |
Kumar Gala | 2d1b202 | 2008-07-02 01:16:40 +1000 | [diff] [blame] | 97 | do_lwsync_fixups(spec->cpu_features, |
| 98 | PTRRELOC(&__start___lwsync_fixup), |
| 99 | PTRRELOC(&__stop___lwsync_fixup)); |
| 100 | |
Anton Blanchard | d715e43 | 2011-11-14 12:54:47 +0000 | [diff] [blame] | 101 | do_final_fixups(); |
| 102 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 103 | return KERNELBASE + offset; |
| 104 | } |
| 105 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 106 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 107 | /* |
| 108 | * Find out what kind of machine we're on and save any data we need |
| 109 | * from the early boot process (devtree is copied on pmac by prom_init()). |
| 110 | * This is called very early on the boot process, after a minimal |
| 111 | * MMU environment has been set up but before MMU_init is called. |
| 112 | */ |
LEROY Christophe | 400c47d | 2015-09-16 12:04:53 +0200 | [diff] [blame] | 113 | extern unsigned int memset_nocache_branch; /* Insn to be replaced by NOP */ |
| 114 | |
Scott Wood | 6dece0e | 2011-07-25 11:29:33 +0000 | [diff] [blame] | 115 | notrace void __init machine_init(u64 dt_ptr) |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 116 | { |
David Gibson | 719c91c | 2007-02-13 15:54:22 +1100 | [diff] [blame] | 117 | /* Enable early debugging if any specified (see udbg.h) */ |
| 118 | udbg_early_init(); |
Benjamin Herrenschmidt | 51d3082 | 2005-11-23 17:57:25 +1100 | [diff] [blame] | 119 | |
LEROY Christophe | 1cd0389 | 2015-09-16 12:04:51 +0200 | [diff] [blame] | 120 | patch_instruction((unsigned int *)&memcpy, PPC_INST_NOP); |
LEROY Christophe | 400c47d | 2015-09-16 12:04:53 +0200 | [diff] [blame] | 121 | patch_instruction(&memset_nocache_branch, PPC_INST_NOP); |
LEROY Christophe | 1cd0389 | 2015-09-16 12:04:51 +0200 | [diff] [blame] | 122 | |
Benjamin Herrenschmidt | 51d3082 | 2005-11-23 17:57:25 +1100 | [diff] [blame] | 123 | /* Do some early initialization based on the flat device tree */ |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 124 | early_init_devtree(__va(dt_ptr)); |
| 125 | |
Laurentiu TUDOR | 4e21b94 | 2013-07-03 17:13:15 +0300 | [diff] [blame] | 126 | epapr_paravirt_early_init(); |
| 127 | |
Dave Kleikamp | 91b191c | 2011-07-04 18:38:03 +0000 | [diff] [blame] | 128 | early_init_mmu(); |
| 129 | |
Benjamin Herrenschmidt | e822250 | 2006-03-28 23:15:54 +1100 | [diff] [blame] | 130 | probe_machine(); |
Paul Mackerras | 35499c0 | 2005-10-22 16:02:39 +1000 | [diff] [blame] | 131 | |
Dale Farnsworth | f8f50b1 | 2008-12-17 10:09:26 +0000 | [diff] [blame] | 132 | setup_kdump_trampoline(); |
| 133 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 134 | #ifdef CONFIG_6xx |
Paul Mackerras | a0652fc | 2006-03-27 15:03:03 +1100 | [diff] [blame] | 135 | if (cpu_has_feature(CPU_FTR_CAN_DOZE) || |
| 136 | cpu_has_feature(CPU_FTR_CAN_NAP)) |
| 137 | ppc_md.power_save = ppc6xx_idle; |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 138 | #endif |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 139 | |
Kumar Gala | fc4033b | 2008-06-18 16:26:52 -0500 | [diff] [blame] | 140 | #ifdef CONFIG_E500 |
| 141 | if (cpu_has_feature(CPU_FTR_CAN_DOZE) || |
| 142 | cpu_has_feature(CPU_FTR_CAN_NAP)) |
| 143 | ppc_md.power_save = e500_idle; |
| 144 | #endif |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 145 | if (ppc_md.progress) |
| 146 | ppc_md.progress("id mach(): done", 0x200); |
| 147 | } |
| 148 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 149 | /* Checks "l2cr=xxxx" command-line option */ |
| 150 | int __init ppc_setup_l2cr(char *str) |
| 151 | { |
| 152 | if (cpu_has_feature(CPU_FTR_L2CR)) { |
| 153 | unsigned long val = simple_strtoul(str, NULL, 0); |
| 154 | printk(KERN_INFO "l2cr set to %lx\n", val); |
| 155 | _set_L2CR(0); /* force invalidate by disable cache */ |
| 156 | _set_L2CR(val); /* and enable it */ |
| 157 | } |
| 158 | return 1; |
| 159 | } |
| 160 | __setup("l2cr=", ppc_setup_l2cr); |
| 161 | |
Robert Brose | a78bfbf | 2008-03-29 07:20:23 +1100 | [diff] [blame] | 162 | /* Checks "l3cr=xxxx" command-line option */ |
| 163 | int __init ppc_setup_l3cr(char *str) |
| 164 | { |
| 165 | if (cpu_has_feature(CPU_FTR_L3CR)) { |
| 166 | unsigned long val = simple_strtoul(str, NULL, 0); |
| 167 | printk(KERN_INFO "l3cr set to %lx\n", val); |
| 168 | _set_L3CR(val); /* and enable it */ |
| 169 | } |
| 170 | return 1; |
| 171 | } |
| 172 | __setup("l3cr=", ppc_setup_l3cr); |
| 173 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 174 | #ifdef CONFIG_GENERIC_NVRAM |
| 175 | |
| 176 | /* Generic nvram hooks used by drivers/char/gen_nvram.c */ |
| 177 | unsigned char nvram_read_byte(int addr) |
| 178 | { |
| 179 | if (ppc_md.nvram_read_val) |
| 180 | return ppc_md.nvram_read_val(addr); |
| 181 | return 0xff; |
| 182 | } |
| 183 | EXPORT_SYMBOL(nvram_read_byte); |
| 184 | |
| 185 | void nvram_write_byte(unsigned char val, int addr) |
| 186 | { |
| 187 | if (ppc_md.nvram_write_val) |
| 188 | ppc_md.nvram_write_val(addr, val); |
| 189 | } |
| 190 | EXPORT_SYMBOL(nvram_write_byte); |
| 191 | |
Martyn Welch | d331d83 | 2009-08-13 09:03:02 +0100 | [diff] [blame] | 192 | ssize_t nvram_get_size(void) |
| 193 | { |
| 194 | if (ppc_md.nvram_size) |
| 195 | return ppc_md.nvram_size(); |
| 196 | return -1; |
| 197 | } |
| 198 | EXPORT_SYMBOL(nvram_get_size); |
| 199 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 200 | void nvram_sync(void) |
| 201 | { |
| 202 | if (ppc_md.nvram_sync) |
| 203 | ppc_md.nvram_sync(); |
| 204 | } |
| 205 | EXPORT_SYMBOL(nvram_sync); |
| 206 | |
| 207 | #endif /* CONFIG_NVRAM */ |
| 208 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 209 | int __init ppc_init(void) |
| 210 | { |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 211 | /* clear the progress line */ |
Giuliano Pochini | 5e41763 | 2007-03-26 21:40:28 -0800 | [diff] [blame] | 212 | if (ppc_md.progress) |
| 213 | ppc_md.progress(" ", 0xffff); |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 214 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 215 | /* call platform init */ |
| 216 | if (ppc_md.init != NULL) { |
| 217 | ppc_md.init(); |
| 218 | } |
| 219 | return 0; |
| 220 | } |
| 221 | |
| 222 | arch_initcall(ppc_init); |
| 223 | |
Kumar Gala | 8521882 | 2008-04-28 16:21:22 +1000 | [diff] [blame] | 224 | static void __init irqstack_early_init(void) |
| 225 | { |
| 226 | unsigned int i; |
| 227 | |
| 228 | /* interrupt stacks must be in lowmem, we get that for free on ppc32 |
Benjamin Herrenschmidt | e63075a | 2010-07-06 15:39:01 -0700 | [diff] [blame] | 229 | * as the memblock is limited to lowmem by default */ |
Kumar Gala | 8521882 | 2008-04-28 16:21:22 +1000 | [diff] [blame] | 230 | for_each_possible_cpu(i) { |
| 231 | softirq_ctx[i] = (struct thread_info *) |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 232 | __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
Kumar Gala | 8521882 | 2008-04-28 16:21:22 +1000 | [diff] [blame] | 233 | hardirq_ctx[i] = (struct thread_info *) |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 234 | __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
Kumar Gala | 8521882 | 2008-04-28 16:21:22 +1000 | [diff] [blame] | 235 | } |
| 236 | } |
Kumar Gala | 8521882 | 2008-04-28 16:21:22 +1000 | [diff] [blame] | 237 | |
Kumar Gala | bcf0b08 | 2008-04-30 03:49:55 -0500 | [diff] [blame] | 238 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
| 239 | static void __init exc_lvl_early_init(void) |
| 240 | { |
Dave Kleikamp | 3e7f45a | 2010-08-18 06:44:25 +0000 | [diff] [blame] | 241 | unsigned int i, hw_cpu; |
Kumar Gala | bcf0b08 | 2008-04-30 03:49:55 -0500 | [diff] [blame] | 242 | |
| 243 | /* interrupt stacks must be in lowmem, we get that for free on ppc32 |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 244 | * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */ |
Kumar Gala | bcf0b08 | 2008-04-30 03:49:55 -0500 | [diff] [blame] | 245 | for_each_possible_cpu(i) { |
Kevin Hao | 04a3411 | 2014-01-29 18:24:54 +0800 | [diff] [blame] | 246 | #ifdef CONFIG_SMP |
Dave Kleikamp | 3e7f45a | 2010-08-18 06:44:25 +0000 | [diff] [blame] | 247 | hw_cpu = get_hard_smp_processor_id(i); |
Kevin Hao | 04a3411 | 2014-01-29 18:24:54 +0800 | [diff] [blame] | 248 | #else |
| 249 | hw_cpu = 0; |
| 250 | #endif |
| 251 | |
Dave Kleikamp | 3e7f45a | 2010-08-18 06:44:25 +0000 | [diff] [blame] | 252 | critirq_ctx[hw_cpu] = (struct thread_info *) |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 253 | __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
Kumar Gala | bcf0b08 | 2008-04-30 03:49:55 -0500 | [diff] [blame] | 254 | #ifdef CONFIG_BOOKE |
Dave Kleikamp | 3e7f45a | 2010-08-18 06:44:25 +0000 | [diff] [blame] | 255 | dbgirq_ctx[hw_cpu] = (struct thread_info *) |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 256 | __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
Dave Kleikamp | 3e7f45a | 2010-08-18 06:44:25 +0000 | [diff] [blame] | 257 | mcheckirq_ctx[hw_cpu] = (struct thread_info *) |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 258 | __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
Kumar Gala | bcf0b08 | 2008-04-30 03:49:55 -0500 | [diff] [blame] | 259 | #endif |
| 260 | } |
| 261 | } |
| 262 | #else |
| 263 | #define exc_lvl_early_init() |
| 264 | #endif |
| 265 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 266 | /* Warning, IO base is not yet inited */ |
| 267 | void __init setup_arch(char **cmdline_p) |
| 268 | { |
Anton Blanchard | 3e47d14 | 2014-09-17 14:39:36 +1000 | [diff] [blame] | 269 | *cmdline_p = boot_command_line; |
Michael Ellerman | 846f77b | 2006-05-17 18:00:45 +1000 | [diff] [blame] | 270 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 271 | /* so udelay does something sensible, assume <= 1000 bogomips */ |
| 272 | loops_per_jiffy = 500000000 / HZ; |
| 273 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 274 | unflatten_device_tree(); |
David Woodhouse | a82765b | 2005-11-02 22:34:20 +0000 | [diff] [blame] | 275 | check_for_initrd(); |
Benjamin Herrenschmidt | 463ce0e | 2005-11-23 17:56:06 +1100 | [diff] [blame] | 276 | |
| 277 | if (ppc_md.init_early) |
| 278 | ppc_md.init_early(); |
| 279 | |
Benjamin Herrenschmidt | 463ce0e | 2005-11-23 17:56:06 +1100 | [diff] [blame] | 280 | find_legacy_serial_ports(); |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 281 | |
Paul Mackerras | 5ad5707 | 2005-11-05 10:33:55 +1100 | [diff] [blame] | 282 | smp_setup_cpu_maps(); |
| 283 | |
Benjamin Herrenschmidt | 51d3082 | 2005-11-23 17:57:25 +1100 | [diff] [blame] | 284 | /* Register early console */ |
| 285 | register_early_udbg_console(); |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 286 | |
Michael Ellerman | 47679283 | 2006-10-03 14:12:08 +1000 | [diff] [blame] | 287 | xmon_setup(); |
| 288 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 289 | /* |
| 290 | * Set cache line size based on type of cpu as a default. |
| 291 | * Systems with OF can look in the properties on the cpu node(s) |
| 292 | * for a possibly more accurate value. |
| 293 | */ |
David Gibson | 4508dc2 | 2007-06-13 14:52:57 +1000 | [diff] [blame] | 294 | dcache_bsize = cur_cpu_spec->dcache_bsize; |
| 295 | icache_bsize = cur_cpu_spec->icache_bsize; |
| 296 | ucache_bsize = 0; |
| 297 | if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) |
| 298 | ucache_bsize = icache_bsize = dcache_bsize; |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 299 | |
Kumar Gala | 7e99026 | 2006-05-05 00:02:08 -0500 | [diff] [blame] | 300 | if (ppc_md.panic) |
| 301 | setup_panic(); |
| 302 | |
Kumar Gala | 4846c5d | 2008-04-16 05:52:26 +1000 | [diff] [blame] | 303 | init_mm.start_code = (unsigned long)_stext; |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 304 | init_mm.end_code = (unsigned long) _etext; |
| 305 | init_mm.end_data = (unsigned long) _edata; |
Paul Mackerras | 49b0985 | 2005-11-10 15:53:40 +1100 | [diff] [blame] | 306 | init_mm.brk = klimit; |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 307 | |
Kumar Gala | bcf0b08 | 2008-04-30 03:49:55 -0500 | [diff] [blame] | 308 | exc_lvl_early_init(); |
| 309 | |
Kumar Gala | 8521882 | 2008-04-28 16:21:22 +1000 | [diff] [blame] | 310 | irqstack_early_init(); |
| 311 | |
Anton Blanchard | 1023973 | 2014-09-17 22:15:33 +1000 | [diff] [blame] | 312 | initmem_init(); |
| 313 | if ( ppc_md.progress ) ppc_md.progress("setup_arch: initmem", 0x3eab); |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 314 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 315 | #ifdef CONFIG_DUMMY_CONSOLE |
| 316 | conswitchp = &dummy_con; |
| 317 | #endif |
| 318 | |
Grant Likely | 38db7e7 | 2007-10-11 04:48:18 +1000 | [diff] [blame] | 319 | if (ppc_md.setup_arch) |
| 320 | ppc_md.setup_arch(); |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 321 | if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); |
| 322 | |
| 323 | paging_init(); |
Benjamin Herrenschmidt | 7752035 | 2008-12-18 19:13:48 +0000 | [diff] [blame] | 324 | |
| 325 | /* Initialize the MMU context management stuff */ |
| 326 | mmu_context_init(); |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 327 | } |