Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 1 | /* |
| 2 | * 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs |
| 3 | * |
| 4 | * Copyright (C) 2016 Intel Corporation |
| 5 | * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/bitops.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/pci.h> |
| 15 | #include <linux/rational.h> |
| 16 | |
| 17 | #include <linux/dmaengine.h> |
Andy Shevchenko | fecdef9 | 2016-08-17 19:20:30 +0300 | [diff] [blame] | 18 | #include <linux/dma/dw.h> |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 19 | |
| 20 | #include "8250.h" |
| 21 | |
Andy Shevchenko | 6bb5d75 | 2016-08-17 19:20:28 +0300 | [diff] [blame] | 22 | #define PCI_DEVICE_ID_INTEL_QRK_UARTx 0x0936 |
| 23 | |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 24 | #define PCI_DEVICE_ID_INTEL_BYT_UART1 0x0f0a |
| 25 | #define PCI_DEVICE_ID_INTEL_BYT_UART2 0x0f0c |
| 26 | |
| 27 | #define PCI_DEVICE_ID_INTEL_BSW_UART1 0x228a |
| 28 | #define PCI_DEVICE_ID_INTEL_BSW_UART2 0x228c |
| 29 | |
| 30 | #define PCI_DEVICE_ID_INTEL_BDW_UART1 0x9ce3 |
| 31 | #define PCI_DEVICE_ID_INTEL_BDW_UART2 0x9ce4 |
| 32 | |
| 33 | /* Intel LPSS specific registers */ |
| 34 | |
| 35 | #define BYT_PRV_CLK 0x800 |
| 36 | #define BYT_PRV_CLK_EN BIT(0) |
| 37 | #define BYT_PRV_CLK_M_VAL_SHIFT 1 |
| 38 | #define BYT_PRV_CLK_N_VAL_SHIFT 16 |
| 39 | #define BYT_PRV_CLK_UPDATE BIT(31) |
| 40 | |
| 41 | #define BYT_TX_OVF_INT 0x820 |
| 42 | #define BYT_TX_OVF_INT_MASK BIT(1) |
| 43 | |
| 44 | struct lpss8250; |
| 45 | |
| 46 | struct lpss8250_board { |
| 47 | unsigned long freq; |
| 48 | unsigned int base_baud; |
| 49 | int (*setup)(struct lpss8250 *, struct uart_port *p); |
Andy Shevchenko | fecdef9 | 2016-08-17 19:20:30 +0300 | [diff] [blame] | 50 | void (*exit)(struct lpss8250 *); |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 51 | }; |
| 52 | |
| 53 | struct lpss8250 { |
| 54 | int line; |
| 55 | struct lpss8250_board *board; |
| 56 | |
| 57 | /* DMA parameters */ |
| 58 | struct uart_8250_dma dma; |
Andy Shevchenko | fecdef9 | 2016-08-17 19:20:30 +0300 | [diff] [blame] | 59 | struct dw_dma_chip dma_chip; |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 60 | struct dw_dma_slave dma_param; |
| 61 | u8 dma_maxburst; |
| 62 | }; |
| 63 | |
| 64 | static void byt_set_termios(struct uart_port *p, struct ktermios *termios, |
| 65 | struct ktermios *old) |
| 66 | { |
| 67 | unsigned int baud = tty_termios_baud_rate(termios); |
| 68 | struct lpss8250 *lpss = p->private_data; |
| 69 | unsigned long fref = lpss->board->freq, fuart = baud * 16; |
| 70 | unsigned long w = BIT(15) - 1; |
| 71 | unsigned long m, n; |
| 72 | u32 reg; |
| 73 | |
| 74 | /* Gracefully handle the B0 case: fall back to B9600 */ |
| 75 | fuart = fuart ? fuart : 9600 * 16; |
| 76 | |
| 77 | /* Get Fuart closer to Fref */ |
| 78 | fuart *= rounddown_pow_of_two(fref / fuart); |
| 79 | |
| 80 | /* |
| 81 | * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the |
| 82 | * dividers must be adjusted. |
| 83 | * |
| 84 | * uartclk = (m / n) * 100 MHz, where m <= n |
| 85 | */ |
| 86 | rational_best_approximation(fuart, fref, w, w, &m, &n); |
| 87 | p->uartclk = fuart; |
| 88 | |
| 89 | /* Reset the clock */ |
| 90 | reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT); |
| 91 | writel(reg, p->membase + BYT_PRV_CLK); |
| 92 | reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE; |
| 93 | writel(reg, p->membase + BYT_PRV_CLK); |
| 94 | |
| 95 | p->status &= ~UPSTAT_AUTOCTS; |
| 96 | if (termios->c_cflag & CRTSCTS) |
| 97 | p->status |= UPSTAT_AUTOCTS; |
| 98 | |
| 99 | serial8250_do_set_termios(p, termios, old); |
| 100 | } |
| 101 | |
| 102 | static unsigned int byt_get_mctrl(struct uart_port *port) |
| 103 | { |
| 104 | unsigned int ret = serial8250_do_get_mctrl(port); |
| 105 | |
| 106 | /* Force DCD and DSR signals to permanently be reported as active */ |
| 107 | ret |= TIOCM_CAR | TIOCM_DSR; |
| 108 | |
| 109 | return ret; |
| 110 | } |
| 111 | |
| 112 | static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port) |
| 113 | { |
| 114 | struct dw_dma_slave *param = &lpss->dma_param; |
| 115 | struct uart_8250_port *up = up_to_u8250p(port); |
| 116 | struct pci_dev *pdev = to_pci_dev(port->dev); |
| 117 | unsigned int dma_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); |
| 118 | struct pci_dev *dma_dev = pci_get_slot(pdev->bus, dma_devfn); |
| 119 | |
| 120 | switch (pdev->device) { |
| 121 | case PCI_DEVICE_ID_INTEL_BYT_UART1: |
| 122 | case PCI_DEVICE_ID_INTEL_BSW_UART1: |
| 123 | case PCI_DEVICE_ID_INTEL_BDW_UART1: |
| 124 | param->src_id = 3; |
| 125 | param->dst_id = 2; |
| 126 | break; |
| 127 | case PCI_DEVICE_ID_INTEL_BYT_UART2: |
| 128 | case PCI_DEVICE_ID_INTEL_BSW_UART2: |
| 129 | case PCI_DEVICE_ID_INTEL_BDW_UART2: |
| 130 | param->src_id = 5; |
| 131 | param->dst_id = 4; |
| 132 | break; |
| 133 | default: |
| 134 | return -EINVAL; |
| 135 | } |
| 136 | |
| 137 | param->dma_dev = &dma_dev->dev; |
| 138 | param->m_master = 0; |
| 139 | param->p_master = 1; |
| 140 | |
| 141 | /* TODO: Detect FIFO size automaticaly for DesignWare 8250 */ |
| 142 | port->fifosize = 64; |
| 143 | up->tx_loadsz = 64; |
| 144 | |
| 145 | lpss->dma_maxburst = 16; |
| 146 | |
| 147 | port->set_termios = byt_set_termios; |
| 148 | port->get_mctrl = byt_get_mctrl; |
| 149 | |
| 150 | /* Disable TX counter interrupts */ |
| 151 | writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT); |
| 152 | |
| 153 | return 0; |
| 154 | } |
| 155 | |
Andy Shevchenko | fecdef9 | 2016-08-17 19:20:30 +0300 | [diff] [blame] | 156 | #ifdef CONFIG_SERIAL_8250_DMA |
| 157 | static const struct dw_dma_platform_data qrk_serial_dma_pdata = { |
| 158 | .nr_channels = 2, |
| 159 | .is_private = true, |
| 160 | .is_nollp = true, |
| 161 | .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, |
| 162 | .chan_priority = CHAN_PRIORITY_ASCENDING, |
| 163 | .block_size = 4095, |
| 164 | .nr_masters = 1, |
| 165 | .data_width = {4}, |
| 166 | }; |
| 167 | |
| 168 | static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) |
| 169 | { |
| 170 | struct uart_8250_dma *dma = &lpss->dma; |
| 171 | struct dw_dma_chip *chip = &lpss->dma_chip; |
| 172 | struct dw_dma_slave *param = &lpss->dma_param; |
| 173 | struct pci_dev *pdev = to_pci_dev(port->dev); |
| 174 | int ret; |
| 175 | |
| 176 | chip->dev = &pdev->dev; |
| 177 | chip->irq = pdev->irq; |
| 178 | chip->regs = pci_ioremap_bar(pdev, 1); |
| 179 | chip->pdata = &qrk_serial_dma_pdata; |
| 180 | |
| 181 | /* Falling back to PIO mode if DMA probing fails */ |
| 182 | ret = dw_dma_probe(chip); |
| 183 | if (ret) |
| 184 | return; |
| 185 | |
| 186 | /* Special DMA address for UART */ |
| 187 | dma->rx_dma_addr = 0xfffff000; |
| 188 | dma->tx_dma_addr = 0xfffff000; |
| 189 | |
| 190 | param->dma_dev = &pdev->dev; |
| 191 | param->src_id = 0; |
| 192 | param->dst_id = 1; |
| 193 | param->hs_polarity = true; |
| 194 | |
| 195 | lpss->dma_maxburst = 8; |
| 196 | } |
| 197 | |
| 198 | static void qrk_serial_exit_dma(struct lpss8250 *lpss) |
| 199 | { |
| 200 | struct dw_dma_slave *param = &lpss->dma_param; |
| 201 | |
| 202 | if (!param->dma_dev) |
| 203 | return; |
| 204 | dw_dma_remove(&lpss->dma_chip); |
| 205 | } |
| 206 | #else /* CONFIG_SERIAL_8250_DMA */ |
| 207 | static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {} |
| 208 | static void qrk_serial_exit_dma(struct lpss8250 *lpss) {} |
| 209 | #endif /* !CONFIG_SERIAL_8250_DMA */ |
| 210 | |
Andy Shevchenko | 60a9244 | 2016-08-17 19:20:29 +0300 | [diff] [blame] | 211 | static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port) |
| 212 | { |
| 213 | struct pci_dev *pdev = to_pci_dev(port->dev); |
| 214 | int ret; |
| 215 | |
| 216 | ret = pci_alloc_irq_vectors(pdev, 1, 1, 0); |
| 217 | if (ret < 0) |
| 218 | return ret; |
| 219 | |
| 220 | port->irq = pci_irq_vector(pdev, 0); |
| 221 | |
Andy Shevchenko | fecdef9 | 2016-08-17 19:20:30 +0300 | [diff] [blame] | 222 | qrk_serial_setup_dma(lpss, port); |
Andy Shevchenko | 60a9244 | 2016-08-17 19:20:29 +0300 | [diff] [blame] | 223 | return 0; |
| 224 | } |
| 225 | |
Andy Shevchenko | fecdef9 | 2016-08-17 19:20:30 +0300 | [diff] [blame] | 226 | static void qrk_serial_exit(struct lpss8250 *lpss) |
| 227 | { |
| 228 | qrk_serial_exit_dma(lpss); |
| 229 | } |
| 230 | |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 231 | static bool lpss8250_dma_filter(struct dma_chan *chan, void *param) |
| 232 | { |
| 233 | struct dw_dma_slave *dws = param; |
| 234 | |
| 235 | if (dws->dma_dev != chan->device->dev) |
| 236 | return false; |
| 237 | |
| 238 | chan->private = dws; |
| 239 | return true; |
| 240 | } |
| 241 | |
| 242 | static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port) |
| 243 | { |
| 244 | struct uart_8250_dma *dma = &lpss->dma; |
| 245 | struct dw_dma_slave *rx_param, *tx_param; |
| 246 | struct device *dev = port->port.dev; |
| 247 | |
Andy Shevchenko | 6bb5d75 | 2016-08-17 19:20:28 +0300 | [diff] [blame] | 248 | if (!lpss->dma_param.dma_dev) |
| 249 | return 0; |
| 250 | |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 251 | rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL); |
| 252 | if (!rx_param) |
| 253 | return -ENOMEM; |
| 254 | |
| 255 | tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL); |
| 256 | if (!tx_param) |
| 257 | return -ENOMEM; |
| 258 | |
| 259 | *rx_param = lpss->dma_param; |
| 260 | dma->rxconf.src_maxburst = lpss->dma_maxburst; |
| 261 | |
| 262 | *tx_param = lpss->dma_param; |
| 263 | dma->txconf.dst_maxburst = lpss->dma_maxburst; |
| 264 | |
| 265 | dma->fn = lpss8250_dma_filter; |
| 266 | dma->rx_param = rx_param; |
| 267 | dma->tx_param = tx_param; |
| 268 | |
| 269 | port->dma = dma; |
| 270 | return 0; |
| 271 | } |
| 272 | |
| 273 | static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
| 274 | { |
| 275 | struct uart_8250_port uart; |
| 276 | struct lpss8250 *lpss; |
| 277 | int ret; |
| 278 | |
| 279 | ret = pcim_enable_device(pdev); |
| 280 | if (ret) |
| 281 | return ret; |
| 282 | |
| 283 | pci_set_master(pdev); |
| 284 | |
| 285 | lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL); |
| 286 | if (!lpss) |
| 287 | return -ENOMEM; |
| 288 | |
| 289 | lpss->board = (struct lpss8250_board *)id->driver_data; |
| 290 | |
| 291 | memset(&uart, 0, sizeof(struct uart_8250_port)); |
| 292 | |
| 293 | uart.port.dev = &pdev->dev; |
| 294 | uart.port.irq = pdev->irq; |
| 295 | uart.port.private_data = lpss; |
| 296 | uart.port.type = PORT_16550A; |
| 297 | uart.port.iotype = UPIO_MEM; |
| 298 | uart.port.regshift = 2; |
| 299 | uart.port.uartclk = lpss->board->base_baud * 16; |
| 300 | uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE; |
| 301 | uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE; |
| 302 | uart.port.mapbase = pci_resource_start(pdev, 0); |
| 303 | uart.port.membase = pcim_iomap(pdev, 0, 0); |
| 304 | if (!uart.port.membase) |
| 305 | return -ENOMEM; |
| 306 | |
| 307 | ret = lpss->board->setup(lpss, &uart.port); |
| 308 | if (ret) |
| 309 | return ret; |
| 310 | |
| 311 | ret = lpss8250_dma_setup(lpss, &uart); |
| 312 | if (ret) |
Andy Shevchenko | fecdef9 | 2016-08-17 19:20:30 +0300 | [diff] [blame] | 313 | goto err_exit; |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 314 | |
| 315 | ret = serial8250_register_8250_port(&uart); |
| 316 | if (ret < 0) |
Andy Shevchenko | fecdef9 | 2016-08-17 19:20:30 +0300 | [diff] [blame] | 317 | goto err_exit; |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 318 | |
| 319 | lpss->line = ret; |
| 320 | |
| 321 | pci_set_drvdata(pdev, lpss); |
| 322 | return 0; |
Andy Shevchenko | fecdef9 | 2016-08-17 19:20:30 +0300 | [diff] [blame] | 323 | |
| 324 | err_exit: |
| 325 | if (lpss->board->exit) |
| 326 | lpss->board->exit(lpss); |
| 327 | return ret; |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 328 | } |
| 329 | |
| 330 | static void lpss8250_remove(struct pci_dev *pdev) |
| 331 | { |
| 332 | struct lpss8250 *lpss = pci_get_drvdata(pdev); |
| 333 | |
Andy Shevchenko | fecdef9 | 2016-08-17 19:20:30 +0300 | [diff] [blame] | 334 | if (lpss->board->exit) |
| 335 | lpss->board->exit(lpss); |
| 336 | |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 337 | serial8250_unregister_port(lpss->line); |
| 338 | } |
| 339 | |
| 340 | static const struct lpss8250_board byt_board = { |
| 341 | .freq = 100000000, |
| 342 | .base_baud = 2764800, |
| 343 | .setup = byt_serial_setup, |
| 344 | }; |
| 345 | |
Andy Shevchenko | 6bb5d75 | 2016-08-17 19:20:28 +0300 | [diff] [blame] | 346 | static const struct lpss8250_board qrk_board = { |
| 347 | .freq = 44236800, |
| 348 | .base_baud = 2764800, |
Andy Shevchenko | 60a9244 | 2016-08-17 19:20:29 +0300 | [diff] [blame] | 349 | .setup = qrk_serial_setup, |
Andy Shevchenko | fecdef9 | 2016-08-17 19:20:30 +0300 | [diff] [blame] | 350 | .exit = qrk_serial_exit, |
Andy Shevchenko | 6bb5d75 | 2016-08-17 19:20:28 +0300 | [diff] [blame] | 351 | }; |
| 352 | |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 353 | #define LPSS_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board } |
| 354 | |
| 355 | static const struct pci_device_id pci_ids[] = { |
Andy Shevchenko | 6bb5d75 | 2016-08-17 19:20:28 +0300 | [diff] [blame] | 356 | LPSS_DEVICE(PCI_DEVICE_ID_INTEL_QRK_UARTx, qrk_board), |
Andy Shevchenko | a13e19c | 2016-08-17 19:20:27 +0300 | [diff] [blame] | 357 | LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BYT_UART1, byt_board), |
| 358 | LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BYT_UART2, byt_board), |
| 359 | LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BSW_UART1, byt_board), |
| 360 | LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BSW_UART2, byt_board), |
| 361 | LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BDW_UART1, byt_board), |
| 362 | LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BDW_UART2, byt_board), |
| 363 | { }, |
| 364 | }; |
| 365 | MODULE_DEVICE_TABLE(pci, pci_ids); |
| 366 | |
| 367 | static struct pci_driver lpss8250_pci_driver = { |
| 368 | .name = "8250_lpss", |
| 369 | .id_table = pci_ids, |
| 370 | .probe = lpss8250_probe, |
| 371 | .remove = lpss8250_remove, |
| 372 | }; |
| 373 | |
| 374 | module_pci_driver(lpss8250_pci_driver); |
| 375 | |
| 376 | MODULE_AUTHOR("Intel Corporation"); |
| 377 | MODULE_LICENSE("GPL v2"); |
| 378 | MODULE_DESCRIPTION("Intel LPSS UART driver"); |