| Yuan Zhao | ccd2d3d | 2017-11-23 13:09:10 +0800 | [diff] [blame] | 1 | /* Copyright (c) 2018, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | &mdss_mdp { |
| 14 | dsi_hx8399_truly_cmd: qcom,mdss_dsi_hx8399_truly_cmd { |
| 15 | qcom,mdss-dsi-panel-name = |
| 16 | "hx8399 video mode dsi truly panel"; |
| 17 | qcom,mdss-dsi-panel-type = "dsi_video_mode"; |
| 18 | |
| 19 | qcom,mdss-dsi-virtual-channel-id = <0>; |
| 20 | qcom,mdss-dsi-stream = <0>; |
| 21 | qcom,mdss-dsi-h-left-border = <0>; |
| 22 | qcom,mdss-dsi-h-right-border = <0>; |
| 23 | qcom,mdss-dsi-v-top-border = <0>; |
| 24 | qcom,mdss-dsi-v-bottom-border = <0>; |
| 25 | qcom,mdss-dsi-bpp = <24>; |
| 26 | qcom,mdss-dsi-color-order = "rgb_swap_rgb"; |
| 27 | qcom,mdss-dsi-underflow-color = <0xff>; |
| 28 | qcom,mdss-dsi-border-color = <0>; |
| 29 | qcom,mdss-dsi-h-sync-pulse = <0>; |
| 30 | qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; |
| 31 | qcom,mdss-dsi-lane-map = "lane_map_0123"; |
| 32 | qcom,mdss-dsi-bllp-eof-power-mode; |
| 33 | qcom,mdss-dsi-bllp-power-mode; |
| 34 | qcom,mdss-dsi-tx-eot-append; |
| 35 | qcom,mdss-dsi-lane-0-state; |
| 36 | qcom,mdss-dsi-lane-1-state; |
| 37 | qcom,mdss-dsi-lane-2-state; |
| 38 | qcom,mdss-dsi-lane-3-state; |
| 39 | qcom,mdss-dsi-t-clk-pre = <0x30>; |
| 40 | qcom,mdss-dsi-t-clk-post = <0x0e>; |
| 41 | qcom,mdss-dsi-dma-trigger = "trigger_sw"; |
| 42 | qcom,mdss-dsi-mdp-trigger = "none"; |
| 43 | qcom,mdss-dsi-lp11-init; |
| 44 | qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; |
| 45 | qcom,mdss-dsi-bl-min-level = <1>; |
| 46 | qcom,mdss-dsi-bl-max-level = <4095>; |
| 47 | qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; |
| 48 | |
| 49 | qcom,mdss-dsi-display-timings { |
| 50 | timing@0 { |
| 51 | qcom,mdss-dsi-panel-width = <1080>; |
| 52 | qcom,mdss-dsi-panel-height = <2160>; |
| 53 | qcom,mdss-dsi-h-front-porch = <24>; |
| 54 | qcom,mdss-dsi-h-back-porch = <24>; |
| 55 | qcom,mdss-dsi-h-pulse-width = <16>; |
| 56 | qcom,mdss-dsi-h-sync-skew = <0>; |
| 57 | qcom,mdss-dsi-v-back-porch = <40>; |
| 58 | qcom,mdss-dsi-v-front-porch = <36>; |
| 59 | qcom,mdss-dsi-v-pulse-width = <2>; |
| 60 | qcom,mdss-dsi-panel-framerate = <60>; |
| 61 | qcom,mdss-dsi-on-command = [ |
| 62 | 39 01 00 00 00 00 04 B9 FF 83 99 |
| 63 | 39 01 00 00 00 00 02 D2 88 |
| 64 | 39 01 00 00 00 00 10 B1 02 04 74 94 01 |
| 65 | 32 33 11 11 E6 5D 56 73 02 02 |
| 66 | 39 01 00 00 00 00 10 B2 00 80 80 CC 05 |
| 67 | 07 5A 11 10 10 00 1E 70 03 D4 |
| 68 | 39 01 00 00 00 00 2D B4 00 FF 59 59 0C |
| 69 | AC 00 00 0C 00 07 0A 00 28 07 08 0C |
| 70 | 21 03 00 00 00 AE 87 59 59 0C AC 00 |
| 71 | 00 0C 00 07 0A 00 28 07 08 0C 01 00 |
| 72 | 00 AE 01 |
| 73 | 39 01 00 00 05 00 22 D3 00 00 01 01 00 |
| 74 | 00 10 10 00 00 03 00 03 00 08 78 08 |
| 75 | 78 00 00 00 00 00 24 02 05 05 03 00 |
| 76 | 00 00 05 40 |
| 77 | 39 01 00 00 05 00 21 D5 20 20 19 19 18 |
| 78 | 18 02 03 00 01 24 24 18 18 18 18 24 |
| 79 | 24 00 00 00 00 00 00 00 00 2F 2F 30 |
| 80 | 30 31 31 |
| 81 | 39 01 00 00 05 00 21 D6 24 24 18 18 19 |
| 82 | 19 01 00 03 02 24 24 18 18 18 18 20 |
| 83 | 20 40 40 40 40 40 40 40 40 2F 2F 30 |
| 84 | 30 31 31 |
| 85 | 39 01 00 00 00 00 02 BD 00 |
| 86 | 39 01 00 00 00 00 11 D8 AA AA AA AA AA |
| 87 | AA AA AA AA BA AA AA AA BA AA AA |
| 88 | 39 01 00 00 00 00 02 BD 01 |
| 89 | 39 01 00 00 00 00 11 D8 82 EA AA AA 82 |
| 90 | EA AA AA 82 EA AA AA 82 EA AA AA |
| 91 | 39 01 00 00 00 00 02 BD 02 |
| 92 | 39 01 00 00 00 00 09 D8 FF FF C0 3F FF |
| 93 | FF C0 3F |
| 94 | 39 01 00 00 00 00 02 BD 00 |
| 95 | 39 01 00 00 05 00 37 E0 08 2A 39 35 74 |
| 96 | 7C 87 7F 84 8A 8E 91 93 96 9B 9C 9E |
| 97 | A5 A6 AE A1 AF B2 5C 58 63 74 08 2A |
| 98 | 39 35 74 7C 87 7F 84 8A 8E 91 93 96 |
| 99 | 9B 9C 9E A5 A6 AE A1 AF B2 5C 58 63 |
| 100 | 74 |
| 101 | 39 01 00 00 00 00 03 B6 7E 7E |
| 102 | 39 01 00 00 00 00 02 CC 08 |
| 103 | 39 01 00 00 00 00 06 C7 00 08 00 01 08 |
| 104 | 39 01 00 00 00 00 03 C0 25 5A |
| 105 | 05 01 00 00 78 00 02 11 00 |
| 106 | 05 01 00 00 14 00 02 29 00]; |
| 107 | qcom,mdss-dsi-off-command = [05 01 00 00 14 00 |
| 108 | 02 28 00 05 01 00 00 78 00 02 10 00]; |
| 109 | qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; |
| 110 | qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; |
| 111 | }; |
| 112 | }; |
| 113 | }; |
| 114 | }; |