Ajay Singh Parmar | 769215f | 2017-03-19 22:35:13 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2012-2017, The Linux Foundation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #ifndef _DP_PARSER_H_ |
| 16 | #define _DP_PARSER_H_ |
| 17 | |
| 18 | #include <linux/sde_io_util.h> |
| 19 | |
| 20 | #define DP_LABEL "MDSS DP DISPLAY" |
| 21 | #define AUX_CFG_LEN 10 |
| 22 | #define DP_MAX_PIXEL_CLK_KHZ 675000 |
| 23 | |
| 24 | enum dp_pm_type { |
| 25 | DP_CORE_PM, |
| 26 | DP_CTRL_PM, |
| 27 | DP_PHY_PM, |
| 28 | DP_MAX_PM |
| 29 | }; |
| 30 | |
| 31 | static inline const char *dp_parser_pm_name(enum dp_pm_type module) |
| 32 | { |
| 33 | switch (module) { |
| 34 | case DP_CORE_PM: return "DP_CORE_PM"; |
| 35 | case DP_CTRL_PM: return "DP_CTRL_PM"; |
| 36 | case DP_PHY_PM: return "DP_PHY_PM"; |
| 37 | default: return "???"; |
| 38 | } |
| 39 | } |
| 40 | |
| 41 | /** |
| 42 | * struct dp_display_data - display related device tree data. |
| 43 | * |
| 44 | * @ctrl_node: referece to controller device |
| 45 | * @phy_node: reference to phy device |
| 46 | * @is_active: is the controller currently active |
| 47 | * @name: name of the display |
| 48 | * @display_type: type of the display |
| 49 | */ |
| 50 | struct dp_display_data { |
| 51 | struct device_node *ctrl_node; |
| 52 | struct device_node *phy_node; |
| 53 | bool is_active; |
| 54 | const char *name; |
| 55 | const char *display_type; |
| 56 | }; |
| 57 | |
| 58 | /** |
| 59 | * struct dp_ctrl_resource - controller's IO related data |
| 60 | * |
Samantha Tran | 45c3e5c | 2017-10-19 12:51:09 -0700 | [diff] [blame] | 61 | * @dp_ahb: controller's ahb mapped memory address |
| 62 | * @dp_aux: controller's aux mapped memory address |
| 63 | * @dp_link: controller's link mapped memory address |
| 64 | * @dp_p0: controller's p0 mapped memory address |
Ajay Singh Parmar | 769215f | 2017-03-19 22:35:13 -0700 | [diff] [blame] | 65 | * @phy_io: phy's mapped memory address |
| 66 | * @ln_tx0_io: USB-DP lane TX0's mapped memory address |
| 67 | * @ln_tx1_io: USB-DP lane TX1's mapped memory address |
| 68 | * @dp_cc_io: DP cc's mapped memory address |
| 69 | * @qfprom_io: qfprom's mapped memory address |
| 70 | * @dp_pll_io: DP PLL mapped memory address |
Padmanabhan Komanduru | b6117bd | 2017-05-11 20:18:40 -0700 | [diff] [blame] | 71 | * @usb3_dp_com: USB3 DP PHY combo mapped memory address |
Ajay Singh Parmar | 769215f | 2017-03-19 22:35:13 -0700 | [diff] [blame] | 72 | * @hdcp_io: hdcp's mapped memory address |
| 73 | */ |
| 74 | struct dp_io { |
| 75 | struct dss_io_data ctrl_io; |
Samantha Tran | 45c3e5c | 2017-10-19 12:51:09 -0700 | [diff] [blame] | 76 | struct dss_io_data dp_ahb; |
| 77 | struct dss_io_data dp_aux; |
| 78 | struct dss_io_data dp_link; |
| 79 | struct dss_io_data dp_p0; |
Ajay Singh Parmar | 769215f | 2017-03-19 22:35:13 -0700 | [diff] [blame] | 80 | struct dss_io_data phy_io; |
| 81 | struct dss_io_data ln_tx0_io; |
| 82 | struct dss_io_data ln_tx1_io; |
| 83 | struct dss_io_data dp_cc_io; |
| 84 | struct dss_io_data qfprom_io; |
| 85 | struct dss_io_data dp_pll_io; |
Padmanabhan Komanduru | b6117bd | 2017-05-11 20:18:40 -0700 | [diff] [blame] | 86 | struct dss_io_data usb3_dp_com; |
Ajay Singh Parmar | 769215f | 2017-03-19 22:35:13 -0700 | [diff] [blame] | 87 | struct dss_io_data hdcp_io; |
| 88 | }; |
| 89 | |
| 90 | /** |
| 91 | * struct dp_pinctrl - DP's pin control |
| 92 | * |
| 93 | * @pin: pin-controller's instance |
| 94 | * @state_active: active state pin control |
| 95 | * @state_hpd_active: hpd active state pin control |
| 96 | * @state_suspend: suspend state pin control |
| 97 | */ |
| 98 | struct dp_pinctrl { |
| 99 | struct pinctrl *pin; |
| 100 | struct pinctrl_state *state_active; |
| 101 | struct pinctrl_state *state_hpd_active; |
| 102 | struct pinctrl_state *state_suspend; |
| 103 | }; |
| 104 | |
Padmanabhan Komanduru | 20a21db | 2017-07-10 16:58:59 +0530 | [diff] [blame] | 105 | #define DP_ENUM_STR(x) #x |
| 106 | #define DP_AUX_CFG_MAX_VALUE_CNT 3 |
| 107 | /** |
| 108 | * struct dp_aux_cfg - DP's AUX configuration settings |
| 109 | * |
| 110 | * @cfg_cnt: count of the configurable settings for the AUX register |
| 111 | * @current_index: current index of the AUX config lut |
| 112 | * @offset: register offset of the AUX config register |
| 113 | * @lut: look up table for the AUX config values for this register |
| 114 | */ |
| 115 | struct dp_aux_cfg { |
| 116 | u32 cfg_cnt; |
| 117 | u32 current_index; |
| 118 | u32 offset; |
| 119 | u32 lut[DP_AUX_CFG_MAX_VALUE_CNT]; |
| 120 | }; |
| 121 | |
| 122 | /* PHY AUX config registers */ |
| 123 | enum dp_phy_aux_config_type { |
| 124 | PHY_AUX_CFG0, |
| 125 | PHY_AUX_CFG1, |
| 126 | PHY_AUX_CFG2, |
| 127 | PHY_AUX_CFG3, |
| 128 | PHY_AUX_CFG4, |
| 129 | PHY_AUX_CFG5, |
| 130 | PHY_AUX_CFG6, |
| 131 | PHY_AUX_CFG7, |
| 132 | PHY_AUX_CFG8, |
| 133 | PHY_AUX_CFG9, |
| 134 | PHY_AUX_CFG_MAX, |
| 135 | }; |
| 136 | |
| 137 | static inline char *dp_phy_aux_config_type_to_string(u32 cfg_type) |
| 138 | { |
| 139 | switch (cfg_type) { |
| 140 | case PHY_AUX_CFG0: |
| 141 | return DP_ENUM_STR(PHY_AUX_CFG0); |
| 142 | case PHY_AUX_CFG1: |
| 143 | return DP_ENUM_STR(PHY_AUX_CFG1); |
| 144 | case PHY_AUX_CFG2: |
| 145 | return DP_ENUM_STR(PHY_AUX_CFG2); |
| 146 | case PHY_AUX_CFG3: |
| 147 | return DP_ENUM_STR(PHY_AUX_CFG3); |
| 148 | case PHY_AUX_CFG4: |
| 149 | return DP_ENUM_STR(PHY_AUX_CFG4); |
| 150 | case PHY_AUX_CFG5: |
| 151 | return DP_ENUM_STR(PHY_AUX_CFG5); |
| 152 | case PHY_AUX_CFG6: |
| 153 | return DP_ENUM_STR(PHY_AUX_CFG6); |
| 154 | case PHY_AUX_CFG7: |
| 155 | return DP_ENUM_STR(PHY_AUX_CFG7); |
| 156 | case PHY_AUX_CFG8: |
| 157 | return DP_ENUM_STR(PHY_AUX_CFG8); |
| 158 | case PHY_AUX_CFG9: |
| 159 | return DP_ENUM_STR(PHY_AUX_CFG9); |
| 160 | default: |
| 161 | return "unknown"; |
| 162 | } |
| 163 | } |
| 164 | |
Ajay Singh Parmar | 769215f | 2017-03-19 22:35:13 -0700 | [diff] [blame] | 165 | /** |
| 166 | * struct dp_parser - DP parser's data exposed to clients |
| 167 | * |
| 168 | * @pdev: platform data of the client |
| 169 | * @mp: gpio, regulator and clock related data |
| 170 | * @pinctrl: pin-control related data |
| 171 | * @ctrl_resouce: controller's register address realated data |
| 172 | * @disp_data: controller's display related data |
| 173 | * @parse: function to be called by client to parse device tree. |
| 174 | */ |
| 175 | struct dp_parser { |
| 176 | struct platform_device *pdev; |
| 177 | struct dss_module_power mp[DP_MAX_PM]; |
| 178 | struct dp_pinctrl pinctrl; |
| 179 | struct dp_io io; |
| 180 | struct dp_display_data disp_data; |
| 181 | |
| 182 | u8 l_map[4]; |
Padmanabhan Komanduru | 20a21db | 2017-07-10 16:58:59 +0530 | [diff] [blame] | 183 | struct dp_aux_cfg aux_cfg[AUX_CFG_LEN]; |
Ajay Singh Parmar | 769215f | 2017-03-19 22:35:13 -0700 | [diff] [blame] | 184 | u32 max_pclk_khz; |
| 185 | |
| 186 | int (*parse)(struct dp_parser *parser); |
| 187 | }; |
| 188 | |
| 189 | /** |
| 190 | * dp_parser_get() - get the DP's device tree parser module |
| 191 | * |
| 192 | * @pdev: platform data of the client |
| 193 | * return: pointer to dp_parser structure. |
| 194 | * |
| 195 | * This function provides client capability to parse the |
| 196 | * device tree and populate the data structures. The data |
| 197 | * related to clock, regulators, pin-control and other |
| 198 | * can be parsed using this module. |
| 199 | */ |
| 200 | struct dp_parser *dp_parser_get(struct platform_device *pdev); |
| 201 | |
| 202 | /** |
| 203 | * dp_parser_put() - cleans the dp_parser module |
| 204 | * |
| 205 | * @parser: pointer to the parser's data. |
| 206 | */ |
| 207 | void dp_parser_put(struct dp_parser *parser); |
| 208 | #endif |