Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/types.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/device.h> |
| 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/fs.h> |
| 21 | #include <linux/delay.h> |
| 22 | #include <linux/i2c.h> |
| 23 | #include <linux/gpio.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/of_gpio.h> |
| 26 | #include <linux/of_irq.h> |
| 27 | #include <linux/pm.h> |
| 28 | #include <linux/pm_runtime.h> |
| 29 | #include "msm_dba_internal.h" |
| 30 | #include <linux/mdss_io_util.h> |
| 31 | |
| 32 | #define ADV7533_REG_CHIP_REVISION (0x00) |
| 33 | #define ADV7533_DSI_CEC_I2C_ADDR_REG (0xE1) |
| 34 | #define ADV7533_RESET_DELAY (10) |
| 35 | |
| 36 | #define PINCTRL_STATE_ACTIVE "pmx_adv7533_active" |
| 37 | #define PINCTRL_STATE_SUSPEND "pmx_adv7533_suspend" |
| 38 | |
| 39 | #define MDSS_MAX_PANEL_LEN 256 |
| 40 | #define EDID_SEG_SIZE 0x100 |
| 41 | /* size of audio and speaker info Block */ |
| 42 | #define AUDIO_DATA_SIZE 32 |
| 43 | |
| 44 | /* 0x94 interrupts */ |
| 45 | #define HPD_INT_ENABLE BIT(7) |
| 46 | #define MONITOR_SENSE_INT_ENABLE BIT(6) |
| 47 | #define ACTIVE_VSYNC_EDGE BIT(5) |
| 48 | #define AUDIO_FIFO_FULL BIT(4) |
| 49 | #define EDID_READY_INT_ENABLE BIT(2) |
| 50 | #define HDCP_AUTHENTICATED BIT(1) |
| 51 | #define HDCP_RI_READY BIT(0) |
| 52 | |
| 53 | #define MAX_WAIT_TIME (100) |
| 54 | #define MAX_RW_TRIES (3) |
| 55 | |
| 56 | /* 0x95 interrupts */ |
| 57 | #define HDCP_ERROR BIT(7) |
| 58 | #define HDCP_BKSV_FLAG BIT(6) |
| 59 | #define CEC_TX_READY BIT(5) |
| 60 | #define CEC_TX_ARB_LOST BIT(4) |
| 61 | #define CEC_TX_RETRY_TIMEOUT BIT(3) |
| 62 | #define CEC_TX_RX_BUF3_READY BIT(2) |
| 63 | #define CEC_TX_RX_BUF2_READY BIT(1) |
| 64 | #define CEC_TX_RX_BUF1_READY BIT(0) |
| 65 | |
| 66 | #define HPD_INTERRUPTS (HPD_INT_ENABLE | \ |
| 67 | MONITOR_SENSE_INT_ENABLE) |
| 68 | #define EDID_INTERRUPTS EDID_READY_INT_ENABLE |
| 69 | #define HDCP_INTERRUPTS1 HDCP_AUTHENTICATED |
| 70 | #define HDCP_INTERRUPTS2 (HDCP_BKSV_FLAG | \ |
| 71 | HDCP_ERROR) |
| 72 | #define CEC_INTERRUPTS (CEC_TX_READY | \ |
| 73 | CEC_TX_ARB_LOST | \ |
| 74 | CEC_TX_RETRY_TIMEOUT | \ |
| 75 | CEC_TX_RX_BUF3_READY | \ |
| 76 | CEC_TX_RX_BUF2_READY | \ |
| 77 | CEC_TX_RX_BUF1_READY) |
| 78 | |
| 79 | #define CFG_HPD_INTERRUPTS BIT(0) |
| 80 | #define CFG_EDID_INTERRUPTS BIT(1) |
| 81 | #define CFG_HDCP_INTERRUPTS BIT(2) |
| 82 | #define CFG_CEC_INTERRUPTS BIT(3) |
| 83 | |
| 84 | #define MAX_OPERAND_SIZE 14 |
| 85 | #define CEC_MSG_SIZE (MAX_OPERAND_SIZE + 2) |
| 86 | |
| 87 | enum adv7533_i2c_addr { |
| 88 | I2C_ADDR_MAIN = 0x3D, |
| 89 | I2C_ADDR_CEC_DSI = 0x3C, |
| 90 | }; |
| 91 | |
| 92 | enum adv7533_cec_buf { |
| 93 | ADV7533_CEC_BUF1, |
| 94 | ADV7533_CEC_BUF2, |
| 95 | ADV7533_CEC_BUF3, |
| 96 | ADV7533_CEC_BUF_MAX, |
| 97 | }; |
| 98 | |
| 99 | struct adv7533_reg_cfg { |
| 100 | u8 i2c_addr; |
| 101 | u8 reg; |
| 102 | u8 val; |
| 103 | int sleep_in_ms; |
| 104 | }; |
| 105 | |
| 106 | struct adv7533_cec_msg { |
| 107 | u8 buf[CEC_MSG_SIZE]; |
| 108 | u8 timestamp; |
| 109 | bool pending; |
| 110 | }; |
| 111 | |
| 112 | struct adv7533 { |
| 113 | u8 main_i2c_addr; |
| 114 | u8 cec_dsi_i2c_addr; |
| 115 | u8 video_mode; |
| 116 | int irq; |
| 117 | u32 irq_gpio; |
| 118 | u32 irq_flags; |
| 119 | u32 hpd_irq_gpio; |
| 120 | u32 hpd_irq_flags; |
| 121 | u32 switch_gpio; |
| 122 | u32 switch_flags; |
| 123 | struct pinctrl *ts_pinctrl; |
| 124 | struct pinctrl_state *pinctrl_state_active; |
| 125 | struct pinctrl_state *pinctrl_state_suspend; |
| 126 | bool audio; |
| 127 | bool disable_gpios; |
| 128 | struct dss_module_power power_data; |
| 129 | bool hdcp_enabled; |
| 130 | bool cec_enabled; |
| 131 | bool is_power_on; |
| 132 | void *edid_data; |
| 133 | u8 edid_buf[EDID_SEG_SIZE]; |
| 134 | u8 audio_spkr_data[AUDIO_DATA_SIZE]; |
| 135 | struct workqueue_struct *workq; |
| 136 | struct delayed_work adv7533_intr_work_id; |
| 137 | struct msm_dba_device_info dev_info; |
| 138 | struct adv7533_cec_msg cec_msg[ADV7533_CEC_BUF_MAX]; |
| 139 | struct i2c_client *i2c_client; |
| 140 | struct mutex ops_mutex; |
| 141 | }; |
| 142 | |
| 143 | static char mdss_mdp_panel[MDSS_MAX_PANEL_LEN]; |
| 144 | |
| 145 | static struct adv7533_reg_cfg adv7533_init_setup[] = { |
| 146 | /* power down */ |
| 147 | {I2C_ADDR_MAIN, 0x41, 0x50, 5}, |
| 148 | /* HPD override */ |
| 149 | {I2C_ADDR_MAIN, 0xD6, 0x48, 5}, |
| 150 | /* color space */ |
| 151 | {I2C_ADDR_MAIN, 0x16, 0x20, 0}, |
| 152 | /* Fixed */ |
| 153 | {I2C_ADDR_MAIN, 0x9A, 0xE0, 0}, |
| 154 | /* HDCP */ |
| 155 | {I2C_ADDR_MAIN, 0xBA, 0x70, 0}, |
| 156 | /* Fixed */ |
| 157 | {I2C_ADDR_MAIN, 0xDE, 0x82, 0}, |
| 158 | /* V1P2 */ |
| 159 | {I2C_ADDR_MAIN, 0xE4, 0x40, 0}, |
| 160 | /* Fixed */ |
| 161 | {I2C_ADDR_MAIN, 0xE5, 0x80, 0}, |
| 162 | /* Fixed */ |
| 163 | {I2C_ADDR_CEC_DSI, 0x15, 0xD0, 0}, |
| 164 | /* Fixed */ |
| 165 | {I2C_ADDR_CEC_DSI, 0x17, 0xD0, 0}, |
| 166 | /* Fixed */ |
| 167 | {I2C_ADDR_CEC_DSI, 0x24, 0x20, 0}, |
| 168 | /* Fixed */ |
| 169 | {I2C_ADDR_CEC_DSI, 0x57, 0x11, 0}, |
| 170 | }; |
| 171 | |
| 172 | static struct adv7533_reg_cfg adv7533_video_en[] = { |
| 173 | /* Timing Generator Enable */ |
| 174 | {I2C_ADDR_CEC_DSI, 0x27, 0xCB, 0}, |
| 175 | {I2C_ADDR_CEC_DSI, 0x27, 0x8B, 0}, |
| 176 | {I2C_ADDR_CEC_DSI, 0x27, 0xCB, 0}, |
| 177 | /* power up */ |
| 178 | {I2C_ADDR_MAIN, 0x41, 0x10, 0}, |
| 179 | /* hdmi enable */ |
| 180 | {I2C_ADDR_CEC_DSI, 0x03, 0x89, 0}, |
| 181 | /* color depth */ |
| 182 | {I2C_ADDR_MAIN, 0x4C, 0x04, 0}, |
| 183 | /* down dither */ |
| 184 | {I2C_ADDR_MAIN, 0x49, 0x02, 0}, |
| 185 | /* Audio and CEC clock gate */ |
| 186 | {I2C_ADDR_CEC_DSI, 0x05, 0xC8, 0}, |
| 187 | /* GC packet enable */ |
| 188 | {I2C_ADDR_MAIN, 0x40, 0x80, 0}, |
| 189 | }; |
| 190 | |
| 191 | static struct adv7533_reg_cfg adv7533_cec_en[] = { |
| 192 | /* Fixed, clock gate disable */ |
| 193 | {I2C_ADDR_CEC_DSI, 0x05, 0xC8, 0}, |
| 194 | /* read divider(7:2) from calc */ |
| 195 | {I2C_ADDR_CEC_DSI, 0xBE, 0x01, 0}, |
| 196 | }; |
| 197 | |
| 198 | static struct adv7533_reg_cfg adv7533_cec_tg_init[] = { |
| 199 | /* TG programming for 19.2MHz, divider 25 */ |
| 200 | {I2C_ADDR_CEC_DSI, 0xBE, 0x61, 0}, |
| 201 | {I2C_ADDR_CEC_DSI, 0xC1, 0x0D, 0}, |
| 202 | {I2C_ADDR_CEC_DSI, 0xC2, 0x80, 0}, |
| 203 | {I2C_ADDR_CEC_DSI, 0xC3, 0x0C, 0}, |
| 204 | {I2C_ADDR_CEC_DSI, 0xC4, 0x9A, 0}, |
| 205 | {I2C_ADDR_CEC_DSI, 0xC5, 0x0E, 0}, |
| 206 | {I2C_ADDR_CEC_DSI, 0xC6, 0x66, 0}, |
| 207 | {I2C_ADDR_CEC_DSI, 0xC7, 0x0B, 0}, |
| 208 | {I2C_ADDR_CEC_DSI, 0xC8, 0x1A, 0}, |
| 209 | {I2C_ADDR_CEC_DSI, 0xC9, 0x0A, 0}, |
| 210 | {I2C_ADDR_CEC_DSI, 0xCA, 0x33, 0}, |
| 211 | {I2C_ADDR_CEC_DSI, 0xCB, 0x0C, 0}, |
| 212 | {I2C_ADDR_CEC_DSI, 0xCC, 0x00, 0}, |
| 213 | {I2C_ADDR_CEC_DSI, 0xCD, 0x07, 0}, |
| 214 | {I2C_ADDR_CEC_DSI, 0xCE, 0x33, 0}, |
| 215 | {I2C_ADDR_CEC_DSI, 0xCF, 0x05, 0}, |
| 216 | {I2C_ADDR_CEC_DSI, 0xD0, 0xDA, 0}, |
| 217 | {I2C_ADDR_CEC_DSI, 0xD1, 0x08, 0}, |
| 218 | {I2C_ADDR_CEC_DSI, 0xD2, 0x8D, 0}, |
| 219 | {I2C_ADDR_CEC_DSI, 0xD3, 0x01, 0}, |
| 220 | {I2C_ADDR_CEC_DSI, 0xD4, 0xCD, 0}, |
| 221 | {I2C_ADDR_CEC_DSI, 0xD5, 0x04, 0}, |
| 222 | {I2C_ADDR_CEC_DSI, 0xD6, 0x80, 0}, |
| 223 | {I2C_ADDR_CEC_DSI, 0xD7, 0x05, 0}, |
| 224 | {I2C_ADDR_CEC_DSI, 0xD8, 0x66, 0}, |
| 225 | {I2C_ADDR_CEC_DSI, 0xD9, 0x03, 0}, |
| 226 | {I2C_ADDR_CEC_DSI, 0xDA, 0x26, 0}, |
| 227 | {I2C_ADDR_CEC_DSI, 0xDB, 0x0A, 0}, |
| 228 | {I2C_ADDR_CEC_DSI, 0xDC, 0xCD, 0}, |
| 229 | {I2C_ADDR_CEC_DSI, 0xDE, 0x00, 0}, |
| 230 | {I2C_ADDR_CEC_DSI, 0xDF, 0xC0, 0}, |
| 231 | {I2C_ADDR_CEC_DSI, 0xE1, 0x00, 0}, |
| 232 | {I2C_ADDR_CEC_DSI, 0xE2, 0xE6, 0}, |
| 233 | {I2C_ADDR_CEC_DSI, 0xE3, 0x02, 0}, |
| 234 | {I2C_ADDR_CEC_DSI, 0xE4, 0xB3, 0}, |
| 235 | {I2C_ADDR_CEC_DSI, 0xE5, 0x03, 0}, |
| 236 | {I2C_ADDR_CEC_DSI, 0xE6, 0x9A, 0}, |
| 237 | }; |
| 238 | |
| 239 | static struct adv7533_reg_cfg adv7533_cec_power[] = { |
| 240 | /* cec power up */ |
| 241 | {I2C_ADDR_MAIN, 0xE2, 0x00, 0}, |
| 242 | /* hpd override */ |
| 243 | {I2C_ADDR_MAIN, 0xD6, 0x48, 0}, |
| 244 | /* edid reread */ |
| 245 | {I2C_ADDR_MAIN, 0xC9, 0x13, 0}, |
| 246 | /* read all CEC Rx Buffers */ |
| 247 | {I2C_ADDR_CEC_DSI, 0xBA, 0x08, 0}, |
| 248 | /* logical address0 0x04 */ |
| 249 | {I2C_ADDR_CEC_DSI, 0xBC, 0x04, 0}, |
| 250 | /* select logical address0 */ |
| 251 | {I2C_ADDR_CEC_DSI, 0xBB, 0x10, 0}, |
| 252 | }; |
| 253 | |
| 254 | static struct adv7533_reg_cfg I2S_cfg[] = { |
| 255 | {I2C_ADDR_MAIN, 0x0D, 0x18, 0}, /* Bit width = 16Bits*/ |
| 256 | {I2C_ADDR_MAIN, 0x15, 0x20, 0}, /* Sampling Frequency = 48kHz*/ |
| 257 | {I2C_ADDR_MAIN, 0x02, 0x18, 0}, /* N value 6144 --> 0x1800*/ |
| 258 | {I2C_ADDR_MAIN, 0x14, 0x02, 0}, /* Word Length = 16Bits*/ |
| 259 | {I2C_ADDR_MAIN, 0x73, 0x01, 0}, /* Channel Count = 2 channels */ |
| 260 | }; |
| 261 | |
| 262 | static int adv7533_write(struct adv7533 *pdata, u8 offset, u8 reg, u8 val) |
| 263 | { |
| 264 | u8 addr = 0; |
| 265 | int ret = 0; |
| 266 | |
| 267 | if (!pdata) { |
| 268 | pr_debug("%s: Invalid argument\n", __func__); |
| 269 | return -EINVAL; |
| 270 | } |
| 271 | |
| 272 | if (offset == I2C_ADDR_MAIN) |
| 273 | addr = pdata->main_i2c_addr; |
| 274 | else if (offset == I2C_ADDR_CEC_DSI) |
| 275 | addr = pdata->cec_dsi_i2c_addr; |
| 276 | else |
| 277 | addr = offset; |
| 278 | |
| 279 | ret = msm_dba_helper_i2c_write_byte(pdata->i2c_client, addr, reg, val); |
| 280 | if (ret) |
| 281 | pr_err_ratelimited("%s: wr err: addr 0x%x, reg 0x%x, val 0x%x\n", |
| 282 | __func__, addr, reg, val); |
| 283 | return ret; |
| 284 | } |
| 285 | |
| 286 | static int adv7533_read(struct adv7533 *pdata, u8 offset, |
| 287 | u8 reg, char *buf, u32 size) |
| 288 | { |
| 289 | u8 addr = 0; |
| 290 | int ret = 0; |
| 291 | |
| 292 | if (!pdata) { |
| 293 | pr_debug("%s: Invalid argument\n", __func__); |
| 294 | return -EINVAL; |
| 295 | } |
| 296 | |
| 297 | if (offset == I2C_ADDR_MAIN) |
| 298 | addr = pdata->main_i2c_addr; |
| 299 | else if (offset == I2C_ADDR_CEC_DSI) |
| 300 | addr = pdata->cec_dsi_i2c_addr; |
| 301 | else |
| 302 | addr = offset; |
| 303 | |
| 304 | ret = msm_dba_helper_i2c_read(pdata->i2c_client, addr, reg, buf, size); |
| 305 | if (ret) |
| 306 | pr_err_ratelimited("%s: read err: addr 0x%x, reg 0x%x, size 0x%x\n", |
| 307 | __func__, addr, reg, size); |
| 308 | return ret; |
| 309 | } |
| 310 | |
| 311 | static int adv7533_dump_debug_info(struct msm_dba_device_info *dev, u32 flags) |
| 312 | { |
| 313 | int rc = 0; |
| 314 | u8 byte_val = 0; |
| 315 | u16 addr = 0; |
| 316 | struct adv7533 *pdata = NULL; |
| 317 | |
| 318 | if (!dev) { |
| 319 | pr_err("%s: dev is NULL\n", __func__); |
| 320 | return -EINVAL; |
| 321 | } |
| 322 | pdata = container_of(dev, struct adv7533, dev_info); |
| 323 | if (!pdata) { |
| 324 | pr_err("%s: pdata is NULL\n", __func__); |
| 325 | return -EINVAL; |
| 326 | } |
| 327 | |
| 328 | /* dump main addr*/ |
| 329 | pr_err("========Main I2C=0x%02x Start==========\n", |
| 330 | pdata->main_i2c_addr); |
| 331 | for (addr = 0; addr <= 0xFF; addr++) { |
| 332 | rc = adv7533_read(pdata, I2C_ADDR_MAIN, |
| 333 | (u8)addr, &byte_val, 1); |
| 334 | if (rc) |
| 335 | pr_err("%s: read reg=0x%02x failed @ addr=0x%02x\n", |
| 336 | __func__, addr, pdata->main_i2c_addr); |
| 337 | else |
| 338 | pr_err("0x%02x -> 0x%02X\n", addr, byte_val); |
| 339 | } |
| 340 | pr_err("========Main I2C=0x%02x End==========\n", |
| 341 | pdata->main_i2c_addr); |
| 342 | /* dump CEC addr*/ |
| 343 | pr_err("=======CEC I2C=0x%02x Start=========\n", |
| 344 | pdata->cec_dsi_i2c_addr); |
| 345 | for (addr = 0; addr <= 0xFF; addr++) { |
| 346 | rc = adv7533_read(pdata, I2C_ADDR_CEC_DSI, |
| 347 | (u8)addr, &byte_val, 1); |
| 348 | if (rc) |
| 349 | pr_err("%s: read reg=0x%02x failed @ addr=0x%02x\n", |
| 350 | __func__, addr, pdata->cec_dsi_i2c_addr); |
| 351 | else |
| 352 | pr_err("0x%02x -> 0x%02X\n", addr, byte_val); |
| 353 | } |
| 354 | pr_err("========CEC I2C=0x%02x End==========\n", |
| 355 | pdata->cec_dsi_i2c_addr); |
| 356 | |
| 357 | return rc; |
| 358 | } |
| 359 | |
| 360 | static int adv7533_write_array(struct adv7533 *pdata, |
| 361 | struct adv7533_reg_cfg *cfg, int size) |
| 362 | { |
| 363 | int ret = 0; |
| 364 | int i; |
| 365 | |
| 366 | size = size / sizeof(struct adv7533_reg_cfg); |
| 367 | for (i = 0; i < size; i++) { |
| 368 | switch (cfg[i].i2c_addr) { |
| 369 | case I2C_ADDR_MAIN: |
| 370 | ret = adv7533_write(pdata, I2C_ADDR_MAIN, |
| 371 | cfg[i].reg, cfg[i].val); |
| 372 | if (ret != 0) |
| 373 | pr_err("%s: adv7533_write_byte returned %d\n", |
| 374 | __func__, ret); |
| 375 | break; |
| 376 | case I2C_ADDR_CEC_DSI: |
| 377 | ret = adv7533_write(pdata, I2C_ADDR_CEC_DSI, |
| 378 | cfg[i].reg, cfg[i].val); |
| 379 | if (ret != 0) |
| 380 | pr_err("%s: adv7533_write_byte returned %d\n", |
| 381 | __func__, ret); |
| 382 | break; |
| 383 | default: |
| 384 | ret = -EINVAL; |
| 385 | pr_err("%s: Default case? BUG!\n", __func__); |
| 386 | break; |
| 387 | } |
| 388 | if (ret != 0) { |
| 389 | pr_err("%s: adv7533 reg writes failed. ", __func__); |
| 390 | pr_err("Last write %02X to %02X\n", |
| 391 | cfg[i].val, cfg[i].reg); |
| 392 | goto w_regs_fail; |
| 393 | } |
| 394 | if (cfg[i].sleep_in_ms) |
| 395 | msleep(cfg[i].sleep_in_ms); |
| 396 | } |
| 397 | |
| 398 | w_regs_fail: |
| 399 | if (ret != 0) |
| 400 | pr_err("%s: Exiting with ret = %d after %d writes\n", |
| 401 | __func__, ret, i); |
| 402 | return ret; |
| 403 | } |
| 404 | |
| 405 | static int adv7533_read_device_rev(struct adv7533 *pdata) |
| 406 | { |
| 407 | u8 rev = 0; |
| 408 | int ret; |
| 409 | |
| 410 | ret = adv7533_read(pdata, I2C_ADDR_MAIN, ADV7533_REG_CHIP_REVISION, |
| 411 | &rev, 1); |
| 412 | |
| 413 | return ret; |
| 414 | } |
| 415 | |
| 416 | static int adv7533_program_i2c_addr(struct adv7533 *pdata) |
| 417 | { |
| 418 | u8 i2c_8bits = pdata->cec_dsi_i2c_addr << 1; |
| 419 | int ret = 0; |
| 420 | |
| 421 | if (pdata->cec_dsi_i2c_addr != I2C_ADDR_CEC_DSI) { |
| 422 | ret = adv7533_write(pdata, I2C_ADDR_MAIN, |
| 423 | ADV7533_DSI_CEC_I2C_ADDR_REG, |
| 424 | i2c_8bits); |
| 425 | |
| 426 | if (ret) |
| 427 | pr_err("%s: write err CEC_ADDR[0x%02x] main_addr=0x%02x\n", |
| 428 | __func__, ADV7533_DSI_CEC_I2C_ADDR_REG, |
| 429 | pdata->main_i2c_addr); |
| 430 | } |
| 431 | |
| 432 | return ret; |
| 433 | } |
| 434 | |
| 435 | static void adv7533_parse_vreg_dt(struct device *dev, |
| 436 | struct dss_module_power *mp) |
| 437 | { |
| 438 | int i, rc = 0; |
| 439 | int dt_vreg_total = 0; |
| 440 | struct device_node *of_node = NULL; |
| 441 | u32 *val_array = NULL; |
| 442 | |
| 443 | of_node = dev->of_node; |
| 444 | |
| 445 | dt_vreg_total = of_property_count_strings(of_node, "qcom,supply-names"); |
| 446 | if (dt_vreg_total <= 0) { |
| 447 | pr_warn("%s: vreg not found. rc=%d\n", __func__, |
| 448 | dt_vreg_total); |
| 449 | goto end; |
| 450 | } |
| 451 | mp->num_vreg = dt_vreg_total; |
| 452 | mp->vreg_config = devm_kzalloc(dev, sizeof(struct dss_vreg) * |
| 453 | dt_vreg_total, GFP_KERNEL); |
| 454 | if (!mp->vreg_config) |
| 455 | goto end; |
| 456 | |
| 457 | val_array = devm_kzalloc(dev, sizeof(u32) * dt_vreg_total, GFP_KERNEL); |
| 458 | if (!val_array) |
| 459 | goto end; |
| 460 | |
| 461 | for (i = 0; i < dt_vreg_total; i++) { |
| 462 | const char *st = NULL; |
| 463 | /* vreg-name */ |
| 464 | rc = of_property_read_string_index(of_node, |
| 465 | "qcom,supply-names", i, &st); |
| 466 | if (rc) { |
| 467 | pr_warn("%s: error reading name. i=%d, rc=%d\n", |
| 468 | __func__, i, rc); |
| 469 | goto end; |
| 470 | } |
| 471 | snprintf(mp->vreg_config[i].vreg_name, 32, "%s", st); |
| 472 | |
| 473 | /* vreg-min-voltage */ |
| 474 | memset(val_array, 0, sizeof(u32) * dt_vreg_total); |
| 475 | rc = of_property_read_u32_array(of_node, |
| 476 | "qcom,min-voltage-level", val_array, |
| 477 | dt_vreg_total); |
| 478 | if (rc) { |
| 479 | pr_warn("%s: error read min volt. rc=%d\n", |
| 480 | __func__, rc); |
| 481 | goto end; |
| 482 | } |
| 483 | mp->vreg_config[i].min_voltage = val_array[i]; |
| 484 | |
| 485 | /* vreg-max-voltage */ |
| 486 | memset(val_array, 0, sizeof(u32) * dt_vreg_total); |
| 487 | rc = of_property_read_u32_array(of_node, |
| 488 | "qcom,max-voltage-level", val_array, |
| 489 | dt_vreg_total); |
| 490 | if (rc) { |
| 491 | pr_warn("%s: error read max volt. rc=%d\n", |
| 492 | __func__, rc); |
| 493 | goto end; |
| 494 | } |
| 495 | mp->vreg_config[i].max_voltage = val_array[i]; |
| 496 | |
| 497 | /* vreg-op-mode */ |
| 498 | memset(val_array, 0, sizeof(u32) * dt_vreg_total); |
| 499 | rc = of_property_read_u32_array(of_node, |
| 500 | "qcom,enable-load", val_array, |
| 501 | dt_vreg_total); |
| 502 | if (rc) { |
| 503 | pr_warn("%s: error read enable load. rc=%d\n", |
| 504 | __func__, rc); |
| 505 | goto end; |
| 506 | } |
| 507 | mp->vreg_config[i].enable_load = val_array[i]; |
| 508 | |
| 509 | memset(val_array, 0, sizeof(u32) * dt_vreg_total); |
| 510 | rc = of_property_read_u32_array(of_node, |
| 511 | "qcom,disable-load", val_array, |
| 512 | dt_vreg_total); |
| 513 | if (rc) { |
| 514 | pr_warn("%s: error read disable load. rc=%d\n", |
| 515 | __func__, rc); |
| 516 | goto end; |
| 517 | } |
| 518 | mp->vreg_config[i].disable_load = val_array[i]; |
| 519 | |
| 520 | /* post-on-sleep */ |
| 521 | memset(val_array, 0, sizeof(u32) * dt_vreg_total); |
| 522 | rc = of_property_read_u32_array(of_node, |
| 523 | "qcom,post-on-sleep", val_array, |
| 524 | dt_vreg_total); |
| 525 | if (rc) |
| 526 | pr_warn("%s: error read post on sleep. rc=%d\n", |
| 527 | __func__, rc); |
| 528 | else |
| 529 | mp->vreg_config[i].post_on_sleep = val_array[i]; |
| 530 | |
| 531 | pr_debug("%s: %s min=%d, max=%d, enable=%d disable=%d post-on-sleep=%d\n", |
| 532 | __func__, |
| 533 | mp->vreg_config[i].vreg_name, |
| 534 | mp->vreg_config[i].min_voltage, |
| 535 | mp->vreg_config[i].max_voltage, |
| 536 | mp->vreg_config[i].enable_load, |
| 537 | mp->vreg_config[i].disable_load, |
| 538 | mp->vreg_config[i].post_on_sleep); |
| 539 | } |
| 540 | |
| 541 | devm_kfree(dev, val_array); |
| 542 | return; |
| 543 | |
| 544 | end: |
| 545 | if (mp->vreg_config) { |
| 546 | devm_kfree(dev, mp->vreg_config); |
| 547 | mp->vreg_config = NULL; |
| 548 | } |
| 549 | mp->num_vreg = 0; |
| 550 | |
| 551 | if (val_array) |
| 552 | devm_kfree(dev, val_array); |
| 553 | } |
| 554 | |
| 555 | static int adv7533_parse_dt(struct device *dev, |
| 556 | struct adv7533 *pdata) |
| 557 | { |
| 558 | struct device_node *np = dev->of_node; |
| 559 | u32 temp_val = 0; |
| 560 | int ret = 0; |
| 561 | |
| 562 | ret = of_property_read_u32(np, "instance_id", &temp_val); |
| 563 | pr_debug("%s: DT property %s is %X\n", __func__, "instance_id", |
| 564 | temp_val); |
| 565 | if (ret) |
| 566 | goto end; |
| 567 | pdata->dev_info.instance_id = temp_val; |
| 568 | |
| 569 | ret = of_property_read_u32(np, "adi,main-addr", &temp_val); |
| 570 | pr_debug("%s: DT property %s is %X\n", __func__, "adi,main-addr", |
| 571 | temp_val); |
| 572 | if (ret) |
| 573 | goto end; |
| 574 | pdata->main_i2c_addr = (u8)temp_val; |
| 575 | |
| 576 | ret = of_property_read_u32(np, "adi,cec-dsi-addr", &temp_val); |
| 577 | pr_debug("%s: DT property %s is %X\n", __func__, "adi,cec-dsi-addr", |
| 578 | temp_val); |
| 579 | if (ret) |
| 580 | goto end; |
| 581 | pdata->cec_dsi_i2c_addr = (u8)temp_val; |
| 582 | |
| 583 | ret = of_property_read_u32(np, "adi,video-mode", &temp_val); |
| 584 | pr_debug("%s: DT property %s is %X\n", __func__, "adi,video-mode", |
| 585 | temp_val); |
| 586 | if (ret) |
| 587 | goto end; |
| 588 | pdata->video_mode = (u8)temp_val; |
| 589 | |
| 590 | pdata->audio = of_property_read_bool(np, "adi,enable-audio"); |
| 591 | |
| 592 | adv7533_parse_vreg_dt(dev, &pdata->power_data); |
| 593 | |
| 594 | /* Get pinctrl if target uses pinctrl */ |
| 595 | pdata->ts_pinctrl = devm_pinctrl_get(dev); |
| 596 | if (IS_ERR_OR_NULL(pdata->ts_pinctrl)) { |
| 597 | ret = PTR_ERR(pdata->ts_pinctrl); |
| 598 | pr_err("%s: Pincontrol DT property returned %X\n", |
| 599 | __func__, ret); |
| 600 | } |
| 601 | |
| 602 | pdata->pinctrl_state_active = pinctrl_lookup_state(pdata->ts_pinctrl, |
| 603 | "pmx_adv7533_active"); |
| 604 | if (IS_ERR_OR_NULL(pdata->pinctrl_state_active)) { |
| 605 | ret = PTR_ERR(pdata->pinctrl_state_active); |
| 606 | pr_err("Can not lookup %s pinstate %d\n", |
| 607 | PINCTRL_STATE_ACTIVE, ret); |
| 608 | } |
| 609 | |
| 610 | pdata->pinctrl_state_suspend = pinctrl_lookup_state(pdata->ts_pinctrl, |
| 611 | "pmx_adv7533_suspend"); |
| 612 | if (IS_ERR_OR_NULL(pdata->pinctrl_state_suspend)) { |
| 613 | ret = PTR_ERR(pdata->pinctrl_state_suspend); |
| 614 | pr_err("Can not lookup %s pinstate %d\n", |
| 615 | PINCTRL_STATE_SUSPEND, ret); |
| 616 | } |
| 617 | |
| 618 | pdata->disable_gpios = of_property_read_bool(np, |
| 619 | "adi,disable-gpios"); |
| 620 | |
| 621 | if (!(pdata->disable_gpios)) { |
| 622 | pdata->irq_gpio = of_get_named_gpio_flags(np, |
| 623 | "adi,irq-gpio", 0, &pdata->irq_flags); |
| 624 | |
| 625 | pdata->hpd_irq_gpio = of_get_named_gpio_flags(np, |
| 626 | "adi,hpd-irq-gpio", 0, |
| 627 | &pdata->hpd_irq_flags); |
| 628 | |
| 629 | pdata->switch_gpio = of_get_named_gpio_flags(np, |
| 630 | "adi,switch-gpio", 0, &pdata->switch_flags); |
| 631 | } |
| 632 | |
| 633 | end: |
| 634 | return ret; |
| 635 | } |
| 636 | |
| 637 | static int adv7533_gpio_configure(struct adv7533 *pdata, bool on) |
| 638 | { |
| 639 | int ret = 0; |
| 640 | |
| 641 | if (pdata->disable_gpios) |
| 642 | return 0; |
| 643 | |
| 644 | if (on) { |
| 645 | if (gpio_is_valid(pdata->irq_gpio)) { |
| 646 | ret = gpio_request(pdata->irq_gpio, "adv7533_irq_gpio"); |
| 647 | if (ret) { |
| 648 | pr_err("%d unable to request gpio [%d] ret=%d\n", |
| 649 | __LINE__, pdata->irq_gpio, ret); |
| 650 | goto err_none; |
| 651 | } |
| 652 | ret = gpio_direction_input(pdata->irq_gpio); |
| 653 | if (ret) { |
| 654 | pr_err("unable to set dir for gpio[%d]\n", |
| 655 | pdata->irq_gpio); |
| 656 | goto err_irq_gpio; |
| 657 | } |
| 658 | } else { |
| 659 | pr_err("irq gpio not provided\n"); |
| 660 | goto err_none; |
| 661 | } |
| 662 | |
| 663 | if (gpio_is_valid(pdata->hpd_irq_gpio)) { |
| 664 | ret = gpio_request(pdata->hpd_irq_gpio, |
| 665 | "adv7533_hpd_irq_gpio"); |
| 666 | if (ret) { |
| 667 | pr_err("unable to request gpio [%d]\n", |
| 668 | pdata->hpd_irq_gpio); |
| 669 | goto err_irq_gpio; |
| 670 | } |
| 671 | ret = gpio_direction_input(pdata->hpd_irq_gpio); |
| 672 | if (ret) { |
| 673 | pr_err("unable to set dir for gpio[%d]\n", |
| 674 | pdata->hpd_irq_gpio); |
| 675 | goto err_hpd_irq_gpio; |
| 676 | } |
| 677 | } else { |
| 678 | pr_warn("hpd irq gpio not provided\n"); |
| 679 | } |
| 680 | |
| 681 | if (gpio_is_valid(pdata->switch_gpio)) { |
| 682 | ret = gpio_request(pdata->switch_gpio, |
| 683 | "adv7533_switch_gpio"); |
| 684 | if (ret) { |
| 685 | pr_err("%d unable to request gpio [%d] ret=%d\n", |
| 686 | __LINE__, pdata->irq_gpio, ret); |
| 687 | goto err_hpd_irq_gpio; |
| 688 | } |
| 689 | |
| 690 | ret = gpio_direction_output(pdata->switch_gpio, 0); |
| 691 | if (ret) { |
| 692 | pr_err("unable to set dir for gpio [%d]\n", |
| 693 | pdata->switch_gpio); |
| 694 | goto err_switch_gpio; |
| 695 | } |
| 696 | |
| 697 | gpio_set_value(pdata->switch_gpio, |
| 698 | !pdata->switch_flags); |
| 699 | msleep(ADV7533_RESET_DELAY); |
| 700 | } |
| 701 | |
| 702 | return 0; |
| 703 | } |
| 704 | if (gpio_is_valid(pdata->irq_gpio)) |
| 705 | gpio_free(pdata->irq_gpio); |
| 706 | if (gpio_is_valid(pdata->hpd_irq_gpio)) |
| 707 | gpio_free(pdata->hpd_irq_gpio); |
| 708 | if (gpio_is_valid(pdata->switch_gpio)) |
| 709 | gpio_free(pdata->switch_gpio); |
| 710 | |
| 711 | return 0; |
| 712 | } |
| 713 | |
| 714 | err_switch_gpio: |
| 715 | if (gpio_is_valid(pdata->switch_gpio)) |
| 716 | gpio_free(pdata->switch_gpio); |
| 717 | err_hpd_irq_gpio: |
| 718 | if (gpio_is_valid(pdata->hpd_irq_gpio)) |
| 719 | gpio_free(pdata->hpd_irq_gpio); |
| 720 | err_irq_gpio: |
| 721 | if (gpio_is_valid(pdata->irq_gpio)) |
| 722 | gpio_free(pdata->irq_gpio); |
| 723 | err_none: |
| 724 | return ret; |
| 725 | } |
| 726 | |
| 727 | static void adv7533_notify_clients(struct msm_dba_device_info *dev, |
| 728 | enum msm_dba_callback_event event) |
| 729 | { |
| 730 | struct msm_dba_client_info *c; |
| 731 | struct list_head *pos = NULL; |
| 732 | |
| 733 | if (!dev) { |
| 734 | pr_err("%s: invalid input\n", __func__); |
| 735 | return; |
| 736 | } |
| 737 | |
| 738 | list_for_each(pos, &dev->client_list) { |
| 739 | c = list_entry(pos, struct msm_dba_client_info, list); |
| 740 | |
| 741 | pr_debug("%s: notifying event %d to client %s\n", __func__, |
| 742 | event, c->client_name); |
| 743 | |
| 744 | if (c && c->cb) |
| 745 | c->cb(c->cb_data, event); |
| 746 | } |
| 747 | } |
| 748 | |
| 749 | u32 adv7533_read_edid(struct adv7533 *pdata, u32 size, char *edid_buf) |
| 750 | { |
| 751 | u32 ret = 0, read_size = size / 2; |
| 752 | u8 edid_addr = 0; |
| 753 | int ndx; |
| 754 | |
| 755 | if (!pdata || !edid_buf) |
| 756 | return 0; |
| 757 | |
| 758 | pr_debug("%s: size %d\n", __func__, size); |
| 759 | |
| 760 | adv7533_read(pdata, I2C_ADDR_MAIN, 0x43, &edid_addr, 1); |
| 761 | |
| 762 | pr_debug("%s: edid address 0x%x\n", __func__, edid_addr); |
| 763 | |
| 764 | adv7533_read(pdata, edid_addr >> 1, 0x00, edid_buf, read_size); |
| 765 | |
| 766 | adv7533_read(pdata, edid_addr >> 1, read_size, |
| 767 | edid_buf + read_size, read_size); |
| 768 | |
| 769 | for (ndx = 0; ndx < size; ndx += 4) |
| 770 | pr_debug("%s: EDID[%02x-%02x] %02x %02x %02x %02x\n", |
| 771 | __func__, ndx, ndx + 3, |
| 772 | edid_buf[ndx + 0], edid_buf[ndx + 1], |
| 773 | edid_buf[ndx + 2], edid_buf[ndx + 3]); |
| 774 | |
| 775 | return ret; |
| 776 | } |
| 777 | |
| 778 | static int adv7533_cec_prepare_msg(struct adv7533 *pdata, u8 *msg, u32 size) |
| 779 | { |
| 780 | int i, ret = -EINVAL; |
| 781 | int op_sz; |
| 782 | |
| 783 | if (!pdata || !msg) { |
| 784 | pr_err("%s: invalid input\n", __func__); |
| 785 | goto end; |
| 786 | } |
| 787 | |
| 788 | if (size <= 0 || size > CEC_MSG_SIZE) { |
| 789 | pr_err("%s: ERROR: invalid msg size\n", __func__); |
| 790 | goto end; |
| 791 | } |
| 792 | |
| 793 | /* operand size = total size - header size - opcode size */ |
| 794 | op_sz = size - 2; |
| 795 | |
| 796 | /* write header */ |
| 797 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x70, msg[0]); |
| 798 | |
| 799 | /* write opcode */ |
| 800 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x71, msg[1]); |
| 801 | |
| 802 | /* write operands */ |
| 803 | for (i = 0; i < op_sz && i < MAX_OPERAND_SIZE; i++) { |
| 804 | pr_debug("%s: writing operands\n", __func__); |
| 805 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x72 + i, msg[i + 2]); |
| 806 | } |
| 807 | |
| 808 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x80, size); |
| 809 | |
| 810 | end: |
| 811 | return ret; |
| 812 | } |
| 813 | |
| 814 | static int adv7533_rd_cec_msg(struct adv7533 *pdata, u8 *cec_buf, int msg_num) |
| 815 | { |
| 816 | int ret = -EINVAL; |
| 817 | u8 reg = 0; |
| 818 | |
| 819 | if (!pdata || !cec_buf) { |
| 820 | pr_err("%s: Invalid input\n", __func__); |
| 821 | goto end; |
| 822 | } |
| 823 | |
| 824 | if (msg_num == ADV7533_CEC_BUF1) |
| 825 | reg = 0x85; |
| 826 | else if (msg_num == ADV7533_CEC_BUF2) |
| 827 | reg = 0x97; |
| 828 | else if (msg_num == ADV7533_CEC_BUF3) |
| 829 | reg = 0xA8; |
| 830 | else |
| 831 | pr_err("%s: Invalid msg_num %d\n", __func__, msg_num); |
| 832 | |
| 833 | if (!reg) |
| 834 | goto end; |
| 835 | |
| 836 | adv7533_read(pdata, I2C_ADDR_CEC_DSI, reg, cec_buf, CEC_MSG_SIZE); |
| 837 | end: |
| 838 | return ret; |
| 839 | } |
| 840 | |
| 841 | static void adv7533_handle_hdcp_intr(struct adv7533 *pdata, u8 hdcp_status) |
| 842 | { |
| 843 | u8 ddc_status = 0; |
| 844 | |
| 845 | if (!pdata) { |
| 846 | pr_err("%s: Invalid input\n", __func__); |
| 847 | goto end; |
| 848 | } |
| 849 | |
| 850 | /* HDCP ready for read */ |
| 851 | if (hdcp_status & BIT(6)) |
| 852 | pr_debug("%s: BKSV FLAG\n", __func__); |
| 853 | |
| 854 | /* check for HDCP error */ |
| 855 | if (hdcp_status & BIT(7)) { |
| 856 | pr_err("%s: HDCP ERROR\n", __func__); |
| 857 | |
| 858 | /* get error details */ |
| 859 | adv7533_read(pdata, I2C_ADDR_MAIN, 0xC8, &ddc_status, 1); |
| 860 | |
| 861 | switch (ddc_status & 0xF0 >> 4) { |
| 862 | case 0: |
| 863 | pr_debug("%s: DDC: NO ERROR\n", __func__); |
| 864 | break; |
| 865 | case 1: |
| 866 | pr_err("%s: DDC: BAD RX BKSV\n", __func__); |
| 867 | break; |
| 868 | case 2: |
| 869 | pr_err("%s: DDC: Ri MISMATCH\n", __func__); |
| 870 | break; |
| 871 | case 3: |
| 872 | pr_err("%s: DDC: Pj MISMATCH\n", __func__); |
| 873 | break; |
| 874 | case 4: |
| 875 | pr_err("%s: DDC: I2C ERROR\n", __func__); |
| 876 | break; |
| 877 | case 5: |
| 878 | pr_err("%s: DDC: TIMED OUT DS DONE\n", __func__); |
| 879 | break; |
| 880 | case 6: |
| 881 | pr_err("%s: DDC: MAX CAS EXC\n", __func__); |
| 882 | break; |
| 883 | default: |
| 884 | pr_debug("%s: DDC: UNKNOWN ERROR\n", __func__); |
| 885 | } |
| 886 | } |
| 887 | end: |
| 888 | return; |
| 889 | } |
| 890 | |
| 891 | static void adv7533_handle_cec_intr(struct adv7533 *pdata, u8 cec_status) |
| 892 | { |
| 893 | u8 cec_int_clear = 0x08; |
| 894 | bool cec_rx_intr = false; |
| 895 | u8 cec_rx_ready = 0; |
| 896 | u8 cec_rx_timestamp = 0; |
| 897 | |
| 898 | if (!pdata) { |
| 899 | pr_err("%s: Invalid input\n", __func__); |
| 900 | goto end; |
| 901 | } |
| 902 | |
| 903 | if (cec_status & 0x07) { |
| 904 | cec_rx_intr = true; |
| 905 | adv7533_read(pdata, I2C_ADDR_CEC_DSI, 0xBA, &cec_int_clear, 1); |
| 906 | } |
| 907 | |
| 908 | if (cec_status & BIT(5)) |
| 909 | pr_debug("%s: CEC TX READY\n", __func__); |
| 910 | |
| 911 | if (cec_status & BIT(4)) |
| 912 | pr_debug("%s: CEC TX Arbitration lost\n", __func__); |
| 913 | |
| 914 | if (cec_status & BIT(3)) |
| 915 | pr_debug("%s: CEC TX retry timout\n", __func__); |
| 916 | |
| 917 | if (!cec_rx_intr) |
| 918 | return; |
| 919 | |
| 920 | |
| 921 | adv7533_read(pdata, I2C_ADDR_CEC_DSI, 0xB9, &cec_rx_ready, 1); |
| 922 | |
| 923 | adv7533_read(pdata, I2C_ADDR_CEC_DSI, 0x96, &cec_rx_timestamp, 1); |
| 924 | |
| 925 | if (cec_rx_ready & BIT(0)) { |
| 926 | pr_debug("%s: CEC Rx buffer 1 ready\n", __func__); |
| 927 | adv7533_rd_cec_msg(pdata, |
| 928 | pdata->cec_msg[ADV7533_CEC_BUF1].buf, |
| 929 | ADV7533_CEC_BUF1); |
| 930 | |
| 931 | pdata->cec_msg[ADV7533_CEC_BUF1].pending = true; |
| 932 | |
| 933 | pdata->cec_msg[ADV7533_CEC_BUF1].timestamp = |
| 934 | cec_rx_timestamp & (BIT(0) | BIT(1)); |
| 935 | |
| 936 | adv7533_notify_clients(&pdata->dev_info, |
| 937 | MSM_DBA_CB_CEC_READ_PENDING); |
| 938 | } |
| 939 | |
| 940 | if (cec_rx_ready & BIT(1)) { |
| 941 | pr_debug("%s: CEC Rx buffer 2 ready\n", __func__); |
| 942 | adv7533_rd_cec_msg(pdata, |
| 943 | pdata->cec_msg[ADV7533_CEC_BUF2].buf, |
| 944 | ADV7533_CEC_BUF2); |
| 945 | |
| 946 | pdata->cec_msg[ADV7533_CEC_BUF2].pending = true; |
| 947 | |
| 948 | pdata->cec_msg[ADV7533_CEC_BUF2].timestamp = |
| 949 | cec_rx_timestamp & (BIT(2) | BIT(3)); |
| 950 | |
| 951 | adv7533_notify_clients(&pdata->dev_info, |
| 952 | MSM_DBA_CB_CEC_READ_PENDING); |
| 953 | } |
| 954 | |
| 955 | if (cec_rx_ready & BIT(2)) { |
| 956 | pr_debug("%s: CEC Rx buffer 3 ready\n", __func__); |
| 957 | adv7533_rd_cec_msg(pdata, |
| 958 | pdata->cec_msg[ADV7533_CEC_BUF3].buf, |
| 959 | ADV7533_CEC_BUF3); |
| 960 | |
| 961 | pdata->cec_msg[ADV7533_CEC_BUF3].pending = true; |
| 962 | |
| 963 | pdata->cec_msg[ADV7533_CEC_BUF3].timestamp = |
| 964 | cec_rx_timestamp & (BIT(4) | BIT(5)); |
| 965 | |
| 966 | adv7533_notify_clients(&pdata->dev_info, |
| 967 | MSM_DBA_CB_CEC_READ_PENDING); |
| 968 | } |
| 969 | |
| 970 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0xBA, |
| 971 | cec_int_clear | (cec_status & 0x07)); |
| 972 | |
| 973 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0xBA, cec_int_clear & ~0x07); |
| 974 | |
| 975 | end: |
| 976 | return; |
| 977 | } |
| 978 | |
| 979 | static int adv7533_edid_read_init(struct adv7533 *pdata) |
| 980 | { |
| 981 | int ret = -EINVAL; |
| 982 | |
| 983 | if (!pdata) { |
| 984 | pr_err("%s: invalid pdata\n", __func__); |
| 985 | goto end; |
| 986 | } |
| 987 | |
| 988 | /* initiate edid read in adv7533 */ |
| 989 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x41, 0x10); |
| 990 | adv7533_write(pdata, I2C_ADDR_MAIN, 0xC9, 0x13); |
| 991 | |
| 992 | end: |
| 993 | return ret; |
| 994 | } |
| 995 | |
| 996 | static void *adv7533_handle_hpd_intr(struct adv7533 *pdata) |
| 997 | { |
| 998 | int ret = 0; |
| 999 | u8 hpd_state; |
| 1000 | u8 connected = 0, disconnected = 0; |
| 1001 | |
| 1002 | if (!pdata) { |
| 1003 | pr_err("%s: invalid pdata\n", __func__); |
| 1004 | goto end; |
| 1005 | } |
| 1006 | |
| 1007 | adv7533_read(pdata, I2C_ADDR_MAIN, 0x42, &hpd_state, 1); |
| 1008 | |
| 1009 | connected = (hpd_state & BIT(5)) && (hpd_state & BIT(6)); |
| 1010 | disconnected = !(hpd_state & (BIT(5) | BIT(6))); |
| 1011 | |
| 1012 | if (connected) { |
| 1013 | pr_debug("%s: Rx CONNECTED\n", __func__); |
| 1014 | } else if (disconnected) { |
| 1015 | pr_debug("%s: Rx DISCONNECTED\n", __func__); |
| 1016 | |
| 1017 | adv7533_notify_clients(&pdata->dev_info, |
| 1018 | MSM_DBA_CB_HPD_DISCONNECT); |
| 1019 | } else { |
| 1020 | pr_debug("%s: HPD Intermediate state\n", __func__); |
| 1021 | } |
| 1022 | |
| 1023 | ret = connected ? 1 : 0; |
| 1024 | end: |
| 1025 | return ERR_PTR(ret); |
| 1026 | } |
| 1027 | |
| 1028 | static int adv7533_enable_interrupts(struct adv7533 *pdata, int interrupts) |
| 1029 | { |
| 1030 | int ret = 0; |
| 1031 | u8 reg_val, init_reg_val; |
| 1032 | |
| 1033 | if (!pdata) { |
| 1034 | pr_err("%s: invalid input\n", __func__); |
| 1035 | goto end; |
| 1036 | } |
| 1037 | |
| 1038 | adv7533_read(pdata, I2C_ADDR_MAIN, 0x94, ®_val, 1); |
| 1039 | |
| 1040 | init_reg_val = reg_val; |
| 1041 | |
| 1042 | if (interrupts & CFG_HPD_INTERRUPTS) |
| 1043 | reg_val |= HPD_INTERRUPTS; |
| 1044 | |
| 1045 | if (interrupts & CFG_EDID_INTERRUPTS) |
| 1046 | reg_val |= EDID_INTERRUPTS; |
| 1047 | |
| 1048 | if (interrupts & CFG_HDCP_INTERRUPTS) |
| 1049 | reg_val |= HDCP_INTERRUPTS1; |
| 1050 | |
| 1051 | if (reg_val != init_reg_val) { |
| 1052 | pr_debug("%s: enabling 0x94 interrupts\n", __func__); |
| 1053 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x94, reg_val); |
| 1054 | } |
| 1055 | |
| 1056 | adv7533_read(pdata, I2C_ADDR_MAIN, 0x95, ®_val, 1); |
| 1057 | |
| 1058 | init_reg_val = reg_val; |
| 1059 | |
| 1060 | if (interrupts & CFG_HDCP_INTERRUPTS) |
| 1061 | reg_val |= HDCP_INTERRUPTS2; |
| 1062 | |
| 1063 | if (interrupts & CFG_CEC_INTERRUPTS) |
| 1064 | reg_val |= CEC_INTERRUPTS; |
| 1065 | |
| 1066 | if (reg_val != init_reg_val) { |
| 1067 | pr_debug("%s: enabling 0x95 interrupts\n", __func__); |
| 1068 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x95, reg_val); |
| 1069 | } |
| 1070 | end: |
| 1071 | return ret; |
| 1072 | } |
| 1073 | |
| 1074 | static int adv7533_disable_interrupts(struct adv7533 *pdata, int interrupts) |
| 1075 | { |
| 1076 | int ret = 0; |
| 1077 | u8 reg_val, init_reg_val; |
| 1078 | |
| 1079 | if (!pdata) { |
| 1080 | pr_err("%s: invalid input\n", __func__); |
| 1081 | goto end; |
| 1082 | } |
| 1083 | |
| 1084 | adv7533_read(pdata, I2C_ADDR_MAIN, 0x94, ®_val, 1); |
| 1085 | |
| 1086 | init_reg_val = reg_val; |
| 1087 | |
| 1088 | if (interrupts & CFG_HPD_INTERRUPTS) |
| 1089 | reg_val &= ~HPD_INTERRUPTS; |
| 1090 | |
| 1091 | if (interrupts & CFG_EDID_INTERRUPTS) |
| 1092 | reg_val &= ~EDID_INTERRUPTS; |
| 1093 | |
| 1094 | if (interrupts & CFG_HDCP_INTERRUPTS) |
| 1095 | reg_val &= ~HDCP_INTERRUPTS1; |
| 1096 | |
| 1097 | if (reg_val != init_reg_val) { |
| 1098 | pr_debug("%s: disabling 0x94 interrupts\n", __func__); |
| 1099 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x94, reg_val); |
| 1100 | } |
| 1101 | |
| 1102 | adv7533_read(pdata, I2C_ADDR_MAIN, 0x95, ®_val, 1); |
| 1103 | |
| 1104 | init_reg_val = reg_val; |
| 1105 | |
| 1106 | if (interrupts & CFG_HDCP_INTERRUPTS) |
| 1107 | reg_val &= ~HDCP_INTERRUPTS2; |
| 1108 | |
| 1109 | if (interrupts & CFG_CEC_INTERRUPTS) |
| 1110 | reg_val &= ~CEC_INTERRUPTS; |
| 1111 | |
| 1112 | if (reg_val != init_reg_val) { |
| 1113 | pr_debug("%s: disabling 0x95 interrupts\n", __func__); |
| 1114 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x95, reg_val); |
| 1115 | } |
| 1116 | end: |
| 1117 | return ret; |
| 1118 | } |
| 1119 | |
| 1120 | static void adv7533_intr_work(struct work_struct *work) |
| 1121 | { |
| 1122 | int ret; |
| 1123 | u8 int_status = 0xFF; |
| 1124 | u8 hdcp_cec_status = 0xFF; |
| 1125 | u32 interrupts = 0; |
| 1126 | int connected = false; |
| 1127 | struct adv7533 *pdata; |
| 1128 | struct delayed_work *dw = to_delayed_work(work); |
| 1129 | |
| 1130 | pdata = container_of(dw, struct adv7533, |
| 1131 | adv7533_intr_work_id); |
| 1132 | if (!pdata) { |
| 1133 | pr_err("%s: invalid input\n", __func__); |
| 1134 | return; |
| 1135 | } |
| 1136 | |
| 1137 | /* READ Interrupt registers */ |
| 1138 | adv7533_read(pdata, I2C_ADDR_MAIN, 0x96, &int_status, 1); |
| 1139 | adv7533_read(pdata, I2C_ADDR_MAIN, 0x97, &hdcp_cec_status, 1); |
| 1140 | |
| 1141 | if (int_status & (BIT(6) | BIT(7))) { |
| 1142 | void *ptr_val = adv7533_handle_hpd_intr(pdata); |
| 1143 | |
| 1144 | ret = PTR_ERR(ptr_val); |
| 1145 | if (IS_ERR(ptr_val)) { |
| 1146 | pr_err("%s: error in hpd handing: %d\n", |
| 1147 | __func__, ret); |
| 1148 | goto reset; |
| 1149 | } |
| 1150 | connected = ret; |
| 1151 | } |
| 1152 | |
| 1153 | /* EDID ready for read */ |
| 1154 | if ((int_status & BIT(2)) && pdata->is_power_on) { |
| 1155 | pr_debug("%s: EDID READY\n", __func__); |
| 1156 | |
| 1157 | ret = adv7533_read_edid(pdata, sizeof(pdata->edid_buf), |
| 1158 | pdata->edid_buf); |
| 1159 | if (ret) |
| 1160 | pr_err("%s: edid read failed\n", __func__); |
| 1161 | |
| 1162 | adv7533_notify_clients(&pdata->dev_info, |
| 1163 | MSM_DBA_CB_HPD_CONNECT); |
| 1164 | } |
| 1165 | |
| 1166 | if (pdata->hdcp_enabled) |
| 1167 | adv7533_handle_hdcp_intr(pdata, hdcp_cec_status); |
| 1168 | |
| 1169 | if (pdata->cec_enabled) |
| 1170 | adv7533_handle_cec_intr(pdata, hdcp_cec_status); |
| 1171 | reset: |
| 1172 | /* Clear HPD/EDID interrupts */ |
| 1173 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x96, int_status); |
| 1174 | |
| 1175 | /* Clear HDCP/CEC interrupts */ |
| 1176 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x97, hdcp_cec_status); |
| 1177 | |
| 1178 | /* Re-enable HPD interrupts */ |
| 1179 | interrupts |= CFG_HPD_INTERRUPTS; |
| 1180 | |
| 1181 | /* Re-enable EDID interrupts */ |
| 1182 | interrupts |= CFG_EDID_INTERRUPTS; |
| 1183 | |
| 1184 | /* Re-enable HDCP interrupts */ |
| 1185 | if (pdata->hdcp_enabled) |
| 1186 | interrupts |= CFG_HDCP_INTERRUPTS; |
| 1187 | |
| 1188 | /* Re-enable CEC interrupts */ |
| 1189 | if (pdata->cec_enabled) |
| 1190 | interrupts |= CFG_CEC_INTERRUPTS; |
| 1191 | |
| 1192 | if (adv7533_enable_interrupts(pdata, interrupts)) |
| 1193 | pr_err("%s: err enabling interrupts\n", __func__); |
| 1194 | |
| 1195 | /* initialize EDID read after cable connected */ |
| 1196 | if (connected) |
| 1197 | adv7533_edid_read_init(pdata); |
| 1198 | } |
| 1199 | |
| 1200 | static irqreturn_t adv7533_irq(int irq, void *data) |
| 1201 | { |
| 1202 | struct adv7533 *pdata = data; |
| 1203 | u32 interrupts = 0; |
| 1204 | |
| 1205 | if (!pdata) { |
| 1206 | pr_err("%s: invalid input\n", __func__); |
| 1207 | return IRQ_HANDLED; |
| 1208 | } |
| 1209 | |
| 1210 | /* disable HPD interrupts */ |
| 1211 | interrupts |= CFG_HPD_INTERRUPTS; |
| 1212 | |
| 1213 | /* disable EDID interrupts */ |
| 1214 | interrupts |= CFG_EDID_INTERRUPTS; |
| 1215 | |
| 1216 | /* disable HDCP interrupts */ |
| 1217 | if (pdata->hdcp_enabled) |
| 1218 | interrupts |= CFG_HDCP_INTERRUPTS; |
| 1219 | |
| 1220 | /* disable CEC interrupts */ |
| 1221 | if (pdata->cec_enabled) |
| 1222 | interrupts |= CFG_CEC_INTERRUPTS; |
| 1223 | |
| 1224 | if (adv7533_disable_interrupts(pdata, interrupts)) |
| 1225 | pr_err("%s: err disabling interrupts\n", __func__); |
| 1226 | |
| 1227 | queue_delayed_work(pdata->workq, &pdata->adv7533_intr_work_id, 0); |
| 1228 | |
| 1229 | return IRQ_HANDLED; |
| 1230 | } |
| 1231 | |
| 1232 | static struct i2c_device_id adv7533_id[] = { |
| 1233 | { "adv7533", 0}, |
| 1234 | {} |
| 1235 | }; |
| 1236 | |
| 1237 | static struct adv7533 *adv7533_get_platform_data(void *client) |
| 1238 | { |
| 1239 | struct adv7533 *pdata = NULL; |
| 1240 | struct msm_dba_device_info *dev; |
| 1241 | struct msm_dba_client_info *cinfo = |
| 1242 | (struct msm_dba_client_info *)client; |
| 1243 | |
| 1244 | if (!cinfo) { |
| 1245 | pr_err("%s: invalid client data\n", __func__); |
| 1246 | goto end; |
| 1247 | } |
| 1248 | |
| 1249 | dev = cinfo->dev; |
| 1250 | if (!dev) { |
| 1251 | pr_err("%s: invalid device data\n", __func__); |
| 1252 | goto end; |
| 1253 | } |
| 1254 | |
| 1255 | pdata = container_of(dev, struct adv7533, dev_info); |
| 1256 | if (!pdata) |
| 1257 | pr_err("%s: invalid platform data\n", __func__); |
| 1258 | |
| 1259 | end: |
| 1260 | return pdata; |
| 1261 | } |
| 1262 | |
| 1263 | static int adv7533_cec_enable(void *client, bool cec_on, u32 flags) |
| 1264 | { |
| 1265 | int ret = -EINVAL; |
| 1266 | struct adv7533 *pdata = adv7533_get_platform_data(client); |
| 1267 | |
| 1268 | if (!pdata) { |
| 1269 | pr_err("%s: invalid platform data\n", __func__); |
| 1270 | goto end; |
| 1271 | } |
| 1272 | |
| 1273 | if (cec_on) { |
| 1274 | adv7533_write_array(pdata, adv7533_cec_en, |
| 1275 | sizeof(adv7533_cec_en)); |
| 1276 | adv7533_write_array(pdata, adv7533_cec_tg_init, |
| 1277 | sizeof(adv7533_cec_tg_init)); |
| 1278 | adv7533_write_array(pdata, adv7533_cec_power, |
| 1279 | sizeof(adv7533_cec_power)); |
| 1280 | |
| 1281 | pdata->cec_enabled = true; |
| 1282 | |
| 1283 | ret = adv7533_enable_interrupts(pdata, CFG_CEC_INTERRUPTS); |
| 1284 | |
| 1285 | } else { |
| 1286 | pdata->cec_enabled = false; |
| 1287 | ret = adv7533_disable_interrupts(pdata, CFG_CEC_INTERRUPTS); |
| 1288 | } |
| 1289 | end: |
| 1290 | return ret; |
| 1291 | } |
| 1292 | static void adv7533_set_audio_block(void *client, u32 size, void *buf) |
| 1293 | { |
| 1294 | struct adv7533 *pdata = |
| 1295 | adv7533_get_platform_data(client); |
| 1296 | |
| 1297 | if (!pdata || !buf) { |
| 1298 | pr_err("%s: invalid data\n", __func__); |
| 1299 | return; |
| 1300 | } |
| 1301 | |
| 1302 | mutex_lock(&pdata->ops_mutex); |
| 1303 | |
| 1304 | size = min_t(u32, size, AUDIO_DATA_SIZE); |
| 1305 | |
| 1306 | memset(pdata->audio_spkr_data, 0, AUDIO_DATA_SIZE); |
| 1307 | memcpy(pdata->audio_spkr_data, buf, size); |
| 1308 | |
| 1309 | mutex_unlock(&pdata->ops_mutex); |
| 1310 | } |
| 1311 | |
| 1312 | static void adv7533_get_audio_block(void *client, u32 size, void *buf) |
| 1313 | { |
| 1314 | struct adv7533 *pdata = |
| 1315 | adv7533_get_platform_data(client); |
| 1316 | |
| 1317 | if (!pdata || !buf) { |
| 1318 | pr_err("%s: invalid data\n", __func__); |
| 1319 | return; |
| 1320 | } |
| 1321 | |
| 1322 | mutex_lock(&pdata->ops_mutex); |
| 1323 | |
| 1324 | size = min_t(u32, size, AUDIO_DATA_SIZE); |
| 1325 | |
| 1326 | memcpy(buf, pdata->audio_spkr_data, size); |
| 1327 | |
| 1328 | mutex_unlock(&pdata->ops_mutex); |
| 1329 | } |
| 1330 | |
| 1331 | static int adv7533_check_hpd(void *client, u32 flags) |
| 1332 | { |
| 1333 | struct adv7533 *pdata = adv7533_get_platform_data(client); |
| 1334 | u8 reg_val = 0; |
| 1335 | u8 intr_status; |
| 1336 | int connected = 0; |
| 1337 | |
| 1338 | if (!pdata) { |
| 1339 | pr_err("%s: invalid platform data\n", __func__); |
| 1340 | return -EINVAL; |
| 1341 | } |
| 1342 | |
| 1343 | /* Check if cable is already connected. |
| 1344 | * Since adv7533_irq line is edge triggered, |
| 1345 | * if cable is already connected by this time |
| 1346 | * it won't trigger HPD interrupt. |
| 1347 | */ |
| 1348 | mutex_lock(&pdata->ops_mutex); |
| 1349 | adv7533_read(pdata, I2C_ADDR_MAIN, 0x42, ®_val, 1); |
| 1350 | |
| 1351 | connected = (reg_val & BIT(6)); |
| 1352 | if (connected) { |
| 1353 | pr_debug("%s: cable is connected\n", __func__); |
| 1354 | /* Clear the interrupts before initiating EDID read */ |
| 1355 | adv7533_read(pdata, I2C_ADDR_MAIN, 0x96, &intr_status, 1); |
| 1356 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x96, intr_status); |
| 1357 | adv7533_enable_interrupts(pdata, (CFG_EDID_INTERRUPTS | |
| 1358 | CFG_HPD_INTERRUPTS)); |
| 1359 | |
| 1360 | adv7533_edid_read_init(pdata); |
| 1361 | } |
| 1362 | mutex_unlock(&pdata->ops_mutex); |
| 1363 | |
| 1364 | return connected; |
| 1365 | } |
| 1366 | |
| 1367 | /* Device Operations */ |
| 1368 | static int adv7533_power_on(void *client, bool on, u32 flags) |
| 1369 | { |
| 1370 | int ret = -EINVAL; |
| 1371 | struct adv7533 *pdata = adv7533_get_platform_data(client); |
| 1372 | |
| 1373 | if (!pdata) { |
| 1374 | pr_err("%s: invalid platform data\n", __func__); |
| 1375 | return ret; |
| 1376 | } |
| 1377 | |
| 1378 | pr_debug("%s: %d\n", __func__, on); |
| 1379 | mutex_lock(&pdata->ops_mutex); |
| 1380 | |
| 1381 | if (on && !pdata->is_power_on) { |
| 1382 | adv7533_write_array(pdata, adv7533_init_setup, |
| 1383 | sizeof(adv7533_init_setup)); |
| 1384 | |
| 1385 | ret = adv7533_enable_interrupts(pdata, CFG_HPD_INTERRUPTS); |
| 1386 | if (ret) { |
| 1387 | pr_err("%s: Failed: enable HPD intr %d\n", |
| 1388 | __func__, ret); |
| 1389 | goto end; |
| 1390 | } |
| 1391 | pdata->is_power_on = true; |
| 1392 | } else if (!on) { |
| 1393 | /* power down hdmi */ |
| 1394 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x41, 0x50); |
| 1395 | pdata->is_power_on = false; |
| 1396 | |
| 1397 | adv7533_notify_clients(&pdata->dev_info, |
| 1398 | MSM_DBA_CB_HPD_DISCONNECT); |
| 1399 | } |
| 1400 | end: |
| 1401 | mutex_unlock(&pdata->ops_mutex); |
| 1402 | return ret; |
| 1403 | } |
| 1404 | |
| 1405 | static void adv7533_video_setup(struct adv7533 *pdata, |
| 1406 | struct msm_dba_video_cfg *cfg) |
| 1407 | { |
| 1408 | u32 h_total, hpw, hfp, hbp; |
| 1409 | u32 v_total, vpw, vfp, vbp; |
| 1410 | |
| 1411 | if (!pdata || !cfg) { |
| 1412 | pr_err("%s: invalid input\n", __func__); |
| 1413 | return; |
| 1414 | } |
| 1415 | |
| 1416 | h_total = cfg->h_active + cfg->h_front_porch + |
| 1417 | cfg->h_pulse_width + cfg->h_back_porch; |
| 1418 | v_total = cfg->v_active + cfg->v_front_porch + |
| 1419 | cfg->v_pulse_width + cfg->v_back_porch; |
| 1420 | |
| 1421 | hpw = cfg->h_pulse_width; |
| 1422 | hfp = cfg->h_front_porch; |
| 1423 | hbp = cfg->h_back_porch; |
| 1424 | |
| 1425 | vpw = cfg->v_pulse_width; |
| 1426 | vfp = cfg->v_front_porch; |
| 1427 | vbp = cfg->v_back_porch; |
| 1428 | |
| 1429 | pr_debug("h_total 0x%x, h_active 0x%x, hfp 0x%x, hpw 0x%x, hbp 0x%x\n", |
| 1430 | h_total, cfg->h_active, cfg->h_front_porch, |
| 1431 | cfg->h_pulse_width, cfg->h_back_porch); |
| 1432 | |
| 1433 | pr_debug("v_total 0x%x, v_active 0x%x, vfp 0x%x, vpw 0x%x, vbp 0x%x\n", |
| 1434 | v_total, cfg->v_active, cfg->v_front_porch, |
| 1435 | cfg->v_pulse_width, cfg->v_back_porch); |
| 1436 | |
| 1437 | |
| 1438 | /* h_width */ |
| 1439 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x28, ((h_total & 0xFF0) >> 4)); |
| 1440 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x29, ((h_total & 0xF) << 4)); |
| 1441 | |
| 1442 | /* hsync_width */ |
| 1443 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x2A, ((hpw & 0xFF0) >> 4)); |
| 1444 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x2B, ((hpw & 0xF) << 4)); |
| 1445 | |
| 1446 | /* hfp */ |
| 1447 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x2C, ((hfp & 0xFF0) >> 4)); |
| 1448 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x2D, ((hfp & 0xF) << 4)); |
| 1449 | |
| 1450 | /* hbp */ |
| 1451 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x2E, ((hbp & 0xFF0) >> 4)); |
| 1452 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x2F, ((hbp & 0xF) << 4)); |
| 1453 | |
| 1454 | /* v_total */ |
| 1455 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x30, ((v_total & 0xFF0) >> 4)); |
| 1456 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x31, ((v_total & 0xF) << 4)); |
| 1457 | |
| 1458 | /* vsync_width */ |
| 1459 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x32, ((vpw & 0xFF0) >> 4)); |
| 1460 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x33, ((vpw & 0xF) << 4)); |
| 1461 | |
| 1462 | /* vfp */ |
| 1463 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x34, ((vfp & 0xFF0) >> 4)); |
| 1464 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x35, ((vfp & 0xF) << 4)); |
| 1465 | |
| 1466 | /* vbp */ |
| 1467 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x36, ((vbp & 0xFF0) >> 4)); |
| 1468 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x37, ((vbp & 0xF) << 4)); |
| 1469 | } |
| 1470 | |
| 1471 | static int adv7533_config_vreg(struct adv7533 *pdata, int enable) |
| 1472 | { |
| 1473 | int rc = 0; |
| 1474 | struct dss_module_power *power_data = NULL; |
| 1475 | |
| 1476 | if (!pdata) { |
| 1477 | pr_err("invalid input\n"); |
| 1478 | rc = -EINVAL; |
| 1479 | goto exit; |
| 1480 | } |
| 1481 | |
| 1482 | power_data = &pdata->power_data; |
| 1483 | if (!power_data || !power_data->num_vreg) { |
| 1484 | pr_warn("%s: Error: invalid power data\n", __func__); |
| 1485 | return 0; |
| 1486 | } |
| 1487 | |
| 1488 | if (enable) { |
| 1489 | rc = msm_dss_config_vreg(&pdata->i2c_client->dev, |
| 1490 | power_data->vreg_config, |
| 1491 | power_data->num_vreg, 1); |
| 1492 | if (rc) { |
| 1493 | pr_err("%s: Failed to config vreg. Err=%d\n", |
| 1494 | __func__, rc); |
| 1495 | goto exit; |
| 1496 | } |
| 1497 | } else { |
| 1498 | rc = msm_dss_config_vreg(&pdata->i2c_client->dev, |
| 1499 | power_data->vreg_config, |
| 1500 | power_data->num_vreg, 0); |
| 1501 | if (rc) { |
| 1502 | pr_err("%s: Failed to deconfig vreg. Err=%d\n", |
| 1503 | __func__, rc); |
| 1504 | goto exit; |
| 1505 | } |
| 1506 | } |
| 1507 | exit: |
| 1508 | return rc; |
| 1509 | |
| 1510 | } |
| 1511 | |
| 1512 | static int adv7533_enable_vreg(struct adv7533 *pdata, int enable) |
| 1513 | { |
| 1514 | int rc = 0; |
| 1515 | struct dss_module_power *power_data = NULL; |
| 1516 | |
| 1517 | if (!pdata) { |
| 1518 | pr_err("invalid input\n"); |
| 1519 | rc = -EINVAL; |
| 1520 | goto exit; |
| 1521 | } |
| 1522 | |
| 1523 | power_data = &pdata->power_data; |
| 1524 | if (!power_data || !power_data->num_vreg) { |
| 1525 | pr_warn("%s: Error: invalid power data\n", __func__); |
| 1526 | return 0; |
| 1527 | } |
| 1528 | |
| 1529 | if (enable) { |
| 1530 | rc = msm_dss_enable_vreg(power_data->vreg_config, |
| 1531 | power_data->num_vreg, 1); |
| 1532 | if (rc) { |
| 1533 | pr_err("%s: Failed to enable vreg. Err=%d\n", |
| 1534 | __func__, rc); |
| 1535 | goto exit; |
| 1536 | } |
| 1537 | } else { |
| 1538 | rc = msm_dss_enable_vreg(power_data->vreg_config, |
| 1539 | power_data->num_vreg, 0); |
| 1540 | if (rc) { |
| 1541 | pr_err("%s: Failed to disable vreg. Err=%d\n", |
| 1542 | __func__, rc); |
| 1543 | goto exit; |
| 1544 | } |
| 1545 | } |
| 1546 | exit: |
| 1547 | return rc; |
| 1548 | |
| 1549 | } |
| 1550 | |
| 1551 | static int adv7533_video_on(void *client, bool on, |
| 1552 | struct msm_dba_video_cfg *cfg, u32 flags) |
| 1553 | { |
| 1554 | int ret = 0; |
| 1555 | u8 lanes; |
| 1556 | u8 reg_val = 0; |
| 1557 | struct adv7533 *pdata = adv7533_get_platform_data(client); |
| 1558 | |
| 1559 | if (!pdata || !cfg) { |
| 1560 | pr_err("%s: invalid platform data\n", __func__); |
| 1561 | return -EINVAL; |
| 1562 | } |
| 1563 | |
| 1564 | mutex_lock(&pdata->ops_mutex); |
| 1565 | |
| 1566 | /* DSI lane configuration */ |
| 1567 | lanes = (cfg->num_of_input_lanes << 4); |
| 1568 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x1C, lanes); |
| 1569 | |
| 1570 | adv7533_video_setup(pdata, cfg); |
| 1571 | |
| 1572 | /* hdmi/dvi mode */ |
| 1573 | if (cfg->hdmi_mode) |
| 1574 | adv7533_write(pdata, I2C_ADDR_MAIN, 0xAF, 0x06); |
| 1575 | else |
| 1576 | adv7533_write(pdata, I2C_ADDR_MAIN, 0xAF, 0x04); |
| 1577 | |
| 1578 | /* set scan info for AVI Infoframe*/ |
| 1579 | if (cfg->scaninfo) { |
| 1580 | adv7533_read(pdata, I2C_ADDR_MAIN, 0x55, ®_val, 1); |
| 1581 | reg_val |= cfg->scaninfo & (BIT(1) | BIT(0)); |
| 1582 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x55, reg_val); |
| 1583 | } |
| 1584 | |
| 1585 | /* |
| 1586 | * aspect ratio and sync polarity set up. |
| 1587 | * Currently adv only supports 16:9 or 4:3 aspect ratio |
| 1588 | * configuration. |
| 1589 | */ |
| 1590 | if (cfg->h_active * 3 - cfg->v_active * 4) { |
| 1591 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x17, 0x02); |
| 1592 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x56, 0x28); |
| 1593 | } else { |
| 1594 | /* 4:3 aspect ratio */ |
| 1595 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x17, 0x00); |
| 1596 | adv7533_write(pdata, I2C_ADDR_MAIN, 0x56, 0x18); |
| 1597 | } |
| 1598 | |
| 1599 | adv7533_write_array(pdata, adv7533_video_en, |
| 1600 | sizeof(adv7533_video_en)); |
| 1601 | |
| 1602 | mutex_unlock(&pdata->ops_mutex); |
| 1603 | return ret; |
| 1604 | } |
| 1605 | |
| 1606 | static int adv7533_hdcp_enable(void *client, bool hdcp_on, |
| 1607 | bool enc_on, u32 flags) |
| 1608 | { |
| 1609 | int ret = -EINVAL; |
| 1610 | u8 reg_val; |
| 1611 | struct adv7533 *pdata = |
| 1612 | adv7533_get_platform_data(client); |
| 1613 | |
| 1614 | if (!pdata) { |
| 1615 | pr_err("%s: invalid platform data\n", __func__); |
| 1616 | return ret; |
| 1617 | } |
| 1618 | |
| 1619 | mutex_lock(&pdata->ops_mutex); |
| 1620 | |
| 1621 | adv7533_read(pdata, I2C_ADDR_MAIN, 0xAF, ®_val, 1); |
| 1622 | |
| 1623 | if (hdcp_on) |
| 1624 | reg_val |= BIT(7); |
| 1625 | else |
| 1626 | reg_val &= ~BIT(7); |
| 1627 | |
| 1628 | if (enc_on) |
| 1629 | reg_val |= BIT(4); |
| 1630 | else |
| 1631 | reg_val &= ~BIT(4); |
| 1632 | |
| 1633 | adv7533_write(pdata, I2C_ADDR_MAIN, 0xAF, reg_val); |
| 1634 | |
| 1635 | pdata->hdcp_enabled = hdcp_on; |
| 1636 | |
| 1637 | if (pdata->hdcp_enabled) |
| 1638 | adv7533_enable_interrupts(pdata, CFG_HDCP_INTERRUPTS); |
| 1639 | else |
| 1640 | adv7533_disable_interrupts(pdata, CFG_HDCP_INTERRUPTS); |
| 1641 | |
| 1642 | mutex_unlock(&pdata->ops_mutex); |
| 1643 | return ret; |
| 1644 | } |
| 1645 | |
| 1646 | static int adv7533_configure_audio(void *client, |
| 1647 | struct msm_dba_audio_cfg *cfg, u32 flags) |
| 1648 | { |
| 1649 | int ret = -EINVAL; |
| 1650 | int sampling_rate = 0; |
| 1651 | struct adv7533 *pdata = |
| 1652 | adv7533_get_platform_data(client); |
| 1653 | struct adv7533_reg_cfg reg_cfg[] = { |
| 1654 | {I2C_ADDR_MAIN, 0x12, 0x00, 0}, |
| 1655 | {I2C_ADDR_MAIN, 0x13, 0x00, 0}, |
| 1656 | {I2C_ADDR_MAIN, 0x14, 0x00, 0}, |
| 1657 | {I2C_ADDR_MAIN, 0x15, 0x00, 0}, |
| 1658 | {I2C_ADDR_MAIN, 0x0A, 0x00, 0}, |
| 1659 | {I2C_ADDR_MAIN, 0x0C, 0x00, 0}, |
| 1660 | {I2C_ADDR_MAIN, 0x0D, 0x00, 0}, |
| 1661 | {I2C_ADDR_MAIN, 0x03, 0x00, 0}, |
| 1662 | {I2C_ADDR_MAIN, 0x02, 0x00, 0}, |
| 1663 | {I2C_ADDR_MAIN, 0x01, 0x00, 0}, |
| 1664 | {I2C_ADDR_MAIN, 0x09, 0x00, 0}, |
| 1665 | {I2C_ADDR_MAIN, 0x08, 0x00, 0}, |
| 1666 | {I2C_ADDR_MAIN, 0x07, 0x00, 0}, |
| 1667 | {I2C_ADDR_MAIN, 0x73, 0x00, 0}, |
| 1668 | {I2C_ADDR_MAIN, 0x76, 0x00, 0}, |
| 1669 | }; |
| 1670 | |
| 1671 | if (!pdata || !cfg) { |
| 1672 | pr_err("%s: invalid data\n", __func__); |
| 1673 | return ret; |
| 1674 | } |
| 1675 | |
| 1676 | mutex_lock(&pdata->ops_mutex); |
| 1677 | |
| 1678 | if (cfg->copyright == MSM_DBA_AUDIO_COPYRIGHT_NOT_PROTECTED) |
| 1679 | reg_cfg[0].val |= BIT(5); |
| 1680 | |
| 1681 | if (cfg->pre_emphasis == MSM_DBA_AUDIO_PRE_EMPHASIS_50_15us) |
| 1682 | reg_cfg[0].val |= BIT(2); |
| 1683 | |
| 1684 | if (cfg->clock_accuracy == MSM_DBA_AUDIO_CLOCK_ACCURACY_LVL1) |
| 1685 | reg_cfg[0].val |= BIT(0); |
| 1686 | else if (cfg->clock_accuracy == MSM_DBA_AUDIO_CLOCK_ACCURACY_LVL3) |
| 1687 | reg_cfg[0].val |= BIT(1); |
| 1688 | |
| 1689 | reg_cfg[1].val = cfg->channel_status_category_code; |
| 1690 | |
| 1691 | reg_cfg[2].val = (cfg->channel_status_word_length & 0xF) << 0 | |
| 1692 | (cfg->channel_status_source_number & 0xF) << 4; |
| 1693 | |
| 1694 | if (cfg->sampling_rate == MSM_DBA_AUDIO_32KHZ) |
| 1695 | sampling_rate = 0x3; |
| 1696 | else if (cfg->sampling_rate == MSM_DBA_AUDIO_44P1KHZ) |
| 1697 | sampling_rate = 0x0; |
| 1698 | else if (cfg->sampling_rate == MSM_DBA_AUDIO_48KHZ) |
| 1699 | sampling_rate = 0x2; |
| 1700 | else if (cfg->sampling_rate == MSM_DBA_AUDIO_88P2KHZ) |
| 1701 | sampling_rate = 0x8; |
| 1702 | else if (cfg->sampling_rate == MSM_DBA_AUDIO_96KHZ) |
| 1703 | sampling_rate = 0xA; |
| 1704 | else if (cfg->sampling_rate == MSM_DBA_AUDIO_176P4KHZ) |
| 1705 | sampling_rate = 0xC; |
| 1706 | else if (cfg->sampling_rate == MSM_DBA_AUDIO_192KHZ) |
| 1707 | sampling_rate = 0xE; |
| 1708 | |
| 1709 | reg_cfg[3].val = (sampling_rate & 0xF) << 4; |
| 1710 | |
| 1711 | if (cfg->mode == MSM_DBA_AUDIO_MODE_MANUAL) |
| 1712 | reg_cfg[4].val |= BIT(7); |
| 1713 | |
| 1714 | if (cfg->interface == MSM_DBA_AUDIO_SPDIF_INTERFACE) |
| 1715 | reg_cfg[4].val |= BIT(4); |
| 1716 | |
| 1717 | if (cfg->interface == MSM_DBA_AUDIO_I2S_INTERFACE) { |
| 1718 | /* i2s enable */ |
| 1719 | reg_cfg[5].val |= BIT(2); |
| 1720 | |
| 1721 | /* audio samp freq select */ |
| 1722 | reg_cfg[5].val |= BIT(7); |
| 1723 | } |
| 1724 | |
| 1725 | /* format */ |
| 1726 | reg_cfg[5].val |= cfg->i2s_fmt & 0x3; |
| 1727 | |
| 1728 | /* channel status override */ |
| 1729 | reg_cfg[5].val |= (cfg->channel_status_source & 0x1) << 6; |
| 1730 | |
| 1731 | /* sample word lengths, default 24 */ |
| 1732 | reg_cfg[6].val |= 0x18; |
| 1733 | |
| 1734 | /* endian order of incoming I2S data */ |
| 1735 | if (cfg->word_endianness == MSM_DBA_AUDIO_WORD_LITTLE_ENDIAN) |
| 1736 | reg_cfg[6].val |= 0x1 << 7; |
| 1737 | |
| 1738 | /* compressed audio v - bit */ |
| 1739 | reg_cfg[6].val |= (cfg->channel_status_v_bit & 0x1) << 5; |
| 1740 | |
| 1741 | /* ACR - N */ |
| 1742 | reg_cfg[7].val |= (cfg->n & 0x000FF) >> 0; |
| 1743 | reg_cfg[8].val |= (cfg->n & 0x0FF00) >> 8; |
| 1744 | reg_cfg[9].val |= (cfg->n & 0xF0000) >> 16; |
| 1745 | |
| 1746 | /* ACR - CTS */ |
| 1747 | reg_cfg[10].val |= (cfg->cts & 0x000FF) >> 0; |
| 1748 | reg_cfg[11].val |= (cfg->cts & 0x0FF00) >> 8; |
| 1749 | reg_cfg[12].val |= (cfg->cts & 0xF0000) >> 16; |
| 1750 | |
| 1751 | /* channel count */ |
| 1752 | reg_cfg[13].val |= (cfg->channels & 0x3); |
| 1753 | |
| 1754 | /* CA */ |
| 1755 | reg_cfg[14].val = cfg->channel_allocation; |
| 1756 | |
| 1757 | adv7533_write_array(pdata, reg_cfg, sizeof(reg_cfg)); |
| 1758 | |
| 1759 | mutex_unlock(&pdata->ops_mutex); |
| 1760 | return ret; |
| 1761 | } |
| 1762 | |
| 1763 | static int adv7533_hdmi_cec_write(void *client, u32 size, |
| 1764 | char *buf, u32 flags) |
| 1765 | { |
| 1766 | int ret = -EINVAL; |
| 1767 | struct adv7533 *pdata = |
| 1768 | adv7533_get_platform_data(client); |
| 1769 | |
| 1770 | if (!pdata) { |
| 1771 | pr_err("%s: invalid platform data\n", __func__); |
| 1772 | return ret; |
| 1773 | } |
| 1774 | |
| 1775 | mutex_lock(&pdata->ops_mutex); |
| 1776 | |
| 1777 | ret = adv7533_cec_prepare_msg(pdata, buf, size); |
| 1778 | if (ret) |
| 1779 | goto end; |
| 1780 | |
| 1781 | /* Enable CEC msg tx with NACK 3 retries */ |
| 1782 | adv7533_write(pdata, I2C_ADDR_CEC_DSI, 0x81, 0x07); |
| 1783 | end: |
| 1784 | mutex_unlock(&pdata->ops_mutex); |
| 1785 | return ret; |
| 1786 | } |
| 1787 | |
| 1788 | static int adv7533_hdmi_cec_read(void *client, u32 *size, char *buf, u32 flags) |
| 1789 | { |
| 1790 | int ret = -EINVAL; |
| 1791 | int i; |
| 1792 | struct adv7533 *pdata = |
| 1793 | adv7533_get_platform_data(client); |
| 1794 | |
| 1795 | if (!pdata) { |
| 1796 | pr_err("%s: invalid platform data\n", __func__); |
| 1797 | return ret; |
| 1798 | } |
| 1799 | |
| 1800 | mutex_lock(&pdata->ops_mutex); |
| 1801 | |
| 1802 | for (i = 0; i < ADV7533_CEC_BUF_MAX; i++) { |
| 1803 | struct adv7533_cec_msg *msg = &pdata->cec_msg[i]; |
| 1804 | |
| 1805 | if (msg->pending && msg->timestamp) { |
| 1806 | memcpy(buf, msg->buf, CEC_MSG_SIZE); |
| 1807 | msg->pending = false; |
| 1808 | break; |
| 1809 | } |
| 1810 | } |
| 1811 | |
| 1812 | if (i < ADV7533_CEC_BUF_MAX) { |
| 1813 | *size = CEC_MSG_SIZE; |
| 1814 | ret = 0; |
| 1815 | } else { |
| 1816 | pr_err("%s: no pending cec msg\n", __func__); |
| 1817 | *size = 0; |
| 1818 | } |
| 1819 | |
| 1820 | mutex_unlock(&pdata->ops_mutex); |
| 1821 | return ret; |
| 1822 | } |
| 1823 | |
| 1824 | static int adv7533_get_edid_size(void *client, u32 *size, u32 flags) |
| 1825 | { |
| 1826 | int ret = 0; |
| 1827 | struct adv7533 *pdata = |
| 1828 | adv7533_get_platform_data(client); |
| 1829 | |
| 1830 | if (!pdata) { |
| 1831 | pr_err("%s: invalid platform data\n", __func__); |
| 1832 | return ret; |
| 1833 | } |
| 1834 | |
| 1835 | mutex_lock(&pdata->ops_mutex); |
| 1836 | |
| 1837 | if (!size) { |
| 1838 | ret = -EINVAL; |
| 1839 | goto end; |
| 1840 | } |
| 1841 | |
| 1842 | *size = EDID_SEG_SIZE; |
| 1843 | end: |
| 1844 | mutex_unlock(&pdata->ops_mutex); |
| 1845 | return ret; |
| 1846 | } |
| 1847 | |
| 1848 | static int adv7533_get_raw_edid(void *client, |
| 1849 | u32 size, char *buf, u32 flags) |
| 1850 | { |
| 1851 | struct adv7533 *pdata = |
| 1852 | adv7533_get_platform_data(client); |
| 1853 | |
| 1854 | if (!pdata || !buf) { |
| 1855 | pr_err("%s: invalid data\n", __func__); |
| 1856 | goto end; |
| 1857 | } |
| 1858 | |
| 1859 | mutex_lock(&pdata->ops_mutex); |
| 1860 | |
| 1861 | size = min_t(u32, size, sizeof(pdata->edid_buf)); |
| 1862 | |
| 1863 | memcpy(buf, pdata->edid_buf, size); |
| 1864 | end: |
| 1865 | mutex_unlock(&pdata->ops_mutex); |
| 1866 | return 0; |
| 1867 | } |
| 1868 | |
| 1869 | static int adv7533_write_reg(struct msm_dba_device_info *dev, |
| 1870 | u32 reg, u32 val) |
| 1871 | { |
| 1872 | struct adv7533 *pdata; |
| 1873 | int ret = -EINVAL; |
| 1874 | u8 i2ca = 0; |
| 1875 | |
| 1876 | if (!dev) |
| 1877 | goto end; |
| 1878 | |
| 1879 | pdata = container_of(dev, struct adv7533, dev_info); |
| 1880 | if (!pdata) |
| 1881 | goto end; |
| 1882 | |
| 1883 | i2ca = ((reg & 0x100) ? pdata->cec_dsi_i2c_addr : pdata->main_i2c_addr); |
| 1884 | |
| 1885 | adv7533_write(pdata, i2ca, (u8)(reg & 0xFF), (u8)(val & 0xFF)); |
| 1886 | end: |
| 1887 | return ret; |
| 1888 | } |
| 1889 | |
| 1890 | static int adv7533_read_reg(struct msm_dba_device_info *dev, |
| 1891 | u32 reg, u32 *val) |
| 1892 | { |
| 1893 | int ret = 0; |
| 1894 | u8 byte_val = 0; |
| 1895 | u8 i2ca = 0; |
| 1896 | struct adv7533 *pdata; |
| 1897 | |
| 1898 | if (!dev) |
| 1899 | goto end; |
| 1900 | |
| 1901 | pdata = container_of(dev, struct adv7533, dev_info); |
| 1902 | if (!pdata) |
| 1903 | goto end; |
| 1904 | |
| 1905 | i2ca = ((reg & 0x100) ? pdata->cec_dsi_i2c_addr : pdata->main_i2c_addr); |
| 1906 | |
| 1907 | adv7533_read(pdata, i2ca, (u8)(reg & 0xFF), &byte_val, 1); |
| 1908 | |
| 1909 | *val = (u32)byte_val; |
| 1910 | |
| 1911 | end: |
| 1912 | return ret; |
| 1913 | } |
| 1914 | |
| 1915 | static int adv7533_register_dba(struct adv7533 *pdata) |
| 1916 | { |
| 1917 | struct msm_dba_ops *client_ops; |
| 1918 | struct msm_dba_device_ops *dev_ops; |
| 1919 | |
| 1920 | if (!pdata) |
| 1921 | return -EINVAL; |
| 1922 | |
| 1923 | client_ops = &pdata->dev_info.client_ops; |
| 1924 | dev_ops = &pdata->dev_info.dev_ops; |
| 1925 | |
| 1926 | client_ops->power_on = adv7533_power_on; |
| 1927 | client_ops->video_on = adv7533_video_on; |
| 1928 | client_ops->configure_audio = adv7533_configure_audio; |
| 1929 | client_ops->hdcp_enable = adv7533_hdcp_enable; |
| 1930 | client_ops->hdmi_cec_on = adv7533_cec_enable; |
| 1931 | client_ops->hdmi_cec_write = adv7533_hdmi_cec_write; |
| 1932 | client_ops->hdmi_cec_read = adv7533_hdmi_cec_read; |
| 1933 | client_ops->get_edid_size = adv7533_get_edid_size; |
| 1934 | client_ops->get_raw_edid = adv7533_get_raw_edid; |
| 1935 | client_ops->check_hpd = adv7533_check_hpd; |
| 1936 | client_ops->get_audio_block = adv7533_get_audio_block; |
| 1937 | client_ops->set_audio_block = adv7533_set_audio_block; |
| 1938 | |
| 1939 | dev_ops->write_reg = adv7533_write_reg; |
| 1940 | dev_ops->read_reg = adv7533_read_reg; |
| 1941 | dev_ops->dump_debug_info = adv7533_dump_debug_info; |
| 1942 | |
| 1943 | strlcpy(pdata->dev_info.chip_name, "adv7533", |
| 1944 | sizeof(pdata->dev_info.chip_name)); |
| 1945 | |
| 1946 | mutex_init(&pdata->dev_info.dev_mutex); |
| 1947 | |
| 1948 | INIT_LIST_HEAD(&pdata->dev_info.client_list); |
| 1949 | |
| 1950 | return msm_dba_add_probed_device(&pdata->dev_info); |
| 1951 | } |
| 1952 | |
| 1953 | static void adv7533_unregister_dba(struct adv7533 *pdata) |
| 1954 | { |
| 1955 | if (!pdata) |
| 1956 | return; |
| 1957 | |
| 1958 | msm_dba_remove_probed_device(&pdata->dev_info); |
| 1959 | } |
| 1960 | |
| 1961 | |
| 1962 | static int adv7533_probe(struct i2c_client *client, |
| 1963 | const struct i2c_device_id *id) |
| 1964 | { |
| 1965 | static struct adv7533 *pdata; |
| 1966 | int ret = 0; |
| 1967 | |
| 1968 | if (!client || !client->dev.of_node) { |
| 1969 | pr_err("%s: invalid input\n", __func__); |
| 1970 | return -EINVAL; |
| 1971 | } |
| 1972 | |
| 1973 | pdata = devm_kzalloc(&client->dev, |
| 1974 | sizeof(struct adv7533), GFP_KERNEL); |
| 1975 | if (!pdata) |
| 1976 | return -ENOMEM; |
| 1977 | |
| 1978 | ret = adv7533_parse_dt(&client->dev, pdata); |
| 1979 | if (ret) { |
| 1980 | pr_err("%s: Failed to parse DT\n", __func__); |
| 1981 | goto err_dt_parse; |
| 1982 | } |
| 1983 | |
| 1984 | pdata->i2c_client = client; |
| 1985 | |
| 1986 | ret = adv7533_config_vreg(pdata, 1); |
| 1987 | if (ret) { |
| 1988 | pr_err("%s: Failed to config vreg\n", __func__); |
| 1989 | return -EPROBE_DEFER; |
| 1990 | } |
| 1991 | adv7533_enable_vreg(pdata, 1); |
| 1992 | |
| 1993 | mutex_init(&pdata->ops_mutex); |
| 1994 | |
| 1995 | ret = adv7533_read_device_rev(pdata); |
| 1996 | if (ret) { |
| 1997 | pr_err("%s: Failed to read chip rev\n", __func__); |
| 1998 | goto err_i2c_prog; |
| 1999 | } |
| 2000 | |
| 2001 | ret = adv7533_program_i2c_addr(pdata); |
| 2002 | if (ret != 0) { |
| 2003 | pr_err("%s: Failed to program i2c addr\n", __func__); |
| 2004 | goto err_i2c_prog; |
| 2005 | } |
| 2006 | |
| 2007 | ret = adv7533_register_dba(pdata); |
| 2008 | if (ret) { |
| 2009 | pr_err("%s: Error registering with DBA %d\n", |
| 2010 | __func__, ret); |
| 2011 | goto err_dba_reg; |
| 2012 | } |
| 2013 | |
| 2014 | ret = pinctrl_select_state(pdata->ts_pinctrl, |
| 2015 | pdata->pinctrl_state_active); |
| 2016 | if (ret < 0) |
| 2017 | pr_err("%s: Failed to select %s pinstate %d\n", |
| 2018 | __func__, PINCTRL_STATE_ACTIVE, ret); |
| 2019 | |
| 2020 | ret = adv7533_gpio_configure(pdata, true); |
| 2021 | if (ret) { |
| 2022 | pr_err("%s: Failed to configure GPIOs\n", __func__); |
| 2023 | goto err_gpio_cfg; |
| 2024 | } |
| 2025 | |
| 2026 | if (gpio_is_valid(pdata->switch_gpio)) |
| 2027 | gpio_set_value(pdata->switch_gpio, pdata->switch_flags); |
| 2028 | |
| 2029 | pdata->irq = gpio_to_irq(pdata->irq_gpio); |
| 2030 | |
| 2031 | ret = request_threaded_irq(pdata->irq, NULL, adv7533_irq, |
| 2032 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, "adv7533", pdata); |
| 2033 | if (ret) { |
| 2034 | pr_err("%s: Failed to enable ADV7533 interrupt\n", |
| 2035 | __func__); |
| 2036 | goto err_irq; |
| 2037 | } |
| 2038 | |
| 2039 | dev_set_drvdata(&client->dev, &pdata->dev_info); |
| 2040 | ret = msm_dba_helper_sysfs_init(&client->dev); |
| 2041 | if (ret) { |
| 2042 | pr_err("%s: sysfs init failed\n", __func__); |
| 2043 | goto err_dba_helper; |
| 2044 | } |
| 2045 | |
| 2046 | pdata->workq = create_workqueue("adv7533_workq"); |
| 2047 | if (!pdata->workq) { |
| 2048 | pr_err("%s: workqueue creation failed.\n", __func__); |
| 2049 | ret = -EPERM; |
| 2050 | goto err_workqueue; |
| 2051 | } |
| 2052 | |
| 2053 | if (pdata->audio) { |
| 2054 | pr_debug("%s: enabling default audio configs\n", __func__); |
| 2055 | if (adv7533_write_array(pdata, I2S_cfg, sizeof(I2S_cfg))) |
| 2056 | goto end; |
| 2057 | } |
| 2058 | |
| 2059 | INIT_DELAYED_WORK(&pdata->adv7533_intr_work_id, adv7533_intr_work); |
| 2060 | |
| 2061 | pm_runtime_enable(&client->dev); |
| 2062 | pm_runtime_set_active(&client->dev); |
| 2063 | |
| 2064 | return 0; |
| 2065 | end: |
| 2066 | if (pdata->workq) |
| 2067 | destroy_workqueue(pdata->workq); |
| 2068 | err_workqueue: |
| 2069 | msm_dba_helper_sysfs_remove(&client->dev); |
| 2070 | err_dba_helper: |
| 2071 | disable_irq(pdata->irq); |
| 2072 | free_irq(pdata->irq, pdata); |
| 2073 | err_irq: |
| 2074 | adv7533_gpio_configure(pdata, false); |
| 2075 | err_gpio_cfg: |
| 2076 | adv7533_unregister_dba(pdata); |
| 2077 | err_dba_reg: |
| 2078 | err_i2c_prog: |
| 2079 | adv7533_enable_vreg(pdata, 0); |
| 2080 | adv7533_config_vreg(pdata, 0); |
| 2081 | err_dt_parse: |
| 2082 | devm_kfree(&client->dev, pdata); |
| 2083 | return ret; |
| 2084 | } |
| 2085 | |
| 2086 | static int adv7533_remove(struct i2c_client *client) |
| 2087 | { |
| 2088 | int ret = -EINVAL; |
| 2089 | struct msm_dba_device_info *dev; |
| 2090 | struct adv7533 *pdata; |
| 2091 | |
| 2092 | if (!client) |
| 2093 | goto end; |
| 2094 | |
| 2095 | dev = dev_get_drvdata(&client->dev); |
| 2096 | if (!dev) |
| 2097 | goto end; |
| 2098 | |
| 2099 | pdata = container_of(dev, struct adv7533, dev_info); |
| 2100 | if (!pdata) |
| 2101 | goto end; |
| 2102 | |
| 2103 | pm_runtime_disable(&client->dev); |
| 2104 | disable_irq(pdata->irq); |
| 2105 | free_irq(pdata->irq, pdata); |
| 2106 | |
| 2107 | adv7533_config_vreg(pdata, 0); |
| 2108 | ret = adv7533_gpio_configure(pdata, false); |
| 2109 | |
| 2110 | mutex_destroy(&pdata->ops_mutex); |
| 2111 | |
| 2112 | devm_kfree(&client->dev, pdata); |
| 2113 | |
| 2114 | end: |
| 2115 | return ret; |
| 2116 | } |
| 2117 | |
| 2118 | static struct i2c_driver adv7533_driver = { |
| 2119 | .driver = { |
| 2120 | .name = "adv7533", |
| 2121 | .owner = THIS_MODULE, |
| 2122 | }, |
| 2123 | .probe = adv7533_probe, |
| 2124 | .remove = adv7533_remove, |
| 2125 | .id_table = adv7533_id, |
| 2126 | }; |
| 2127 | |
| 2128 | static int __init adv7533_init(void) |
| 2129 | { |
| 2130 | return i2c_add_driver(&adv7533_driver); |
| 2131 | } |
| 2132 | |
| 2133 | static void __exit adv7533_exit(void) |
| 2134 | { |
| 2135 | i2c_del_driver(&adv7533_driver); |
| 2136 | } |
| 2137 | |
| 2138 | module_param_string(panel, mdss_mdp_panel, MDSS_MAX_PANEL_LEN, 0000); |
| 2139 | |
| 2140 | module_init(adv7533_init); |
| 2141 | module_exit(adv7533_exit); |
| 2142 | MODULE_LICENSE("GPL v2"); |
| 2143 | MODULE_DESCRIPTION("adv7533 driver"); |