blob: 022c2fa4af04063ebe2334dc19754d4597e7de05 [file] [log] [blame]
eric miao8f58de72007-12-19 17:14:02 +08001#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h>
6
Eric Miao09a53582010-06-14 00:43:00 +08007#include <asm/pmu.h>
Russell Kinga09e64f2008-08-05 16:14:15 +01008#include <mach/udc.h>
Igor Grinberg69f22be2010-07-27 15:06:58 +03009#include <mach/pxa3xx-u2d.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010010#include <mach/pxafb.h>
11#include <mach/mmc.h>
12#include <mach/irda.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010013#include <mach/ohci.h>
Mark F. Brown4a2490e2010-09-03 18:28:06 -040014#include <plat/pxa27x_keypad.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010015#include <mach/pxa2xx_spi.h>
16#include <mach/camera.h>
17#include <mach/audio.h>
Eric Miao75e874c2009-12-16 21:35:52 +080018#include <mach/hardware.h>
Haojian Zhuang82b95ec2009-09-10 13:55:23 +080019#include <plat/i2c.h>
20#include <plat/pxa3xx_nand.h>
eric miao8f58de72007-12-19 17:14:02 +080021
22#include "devices.h"
Philipp Zabelbc3a5952008-06-02 18:49:27 +010023#include "generic.h"
eric miao8f58de72007-12-19 17:14:02 +080024
25void __init pxa_register_device(struct platform_device *dev, void *data)
26{
27 int ret;
28
29 dev->dev.platform_data = data;
30
31 ret = platform_device_register(dev);
32 if (ret)
33 dev_err(&dev->dev, "unable to register device: %d\n", ret);
34}
35
Eric Miao09a53582010-06-14 00:43:00 +080036static struct resource pxa_resource_pmu = {
37 .start = IRQ_PMU,
38 .end = IRQ_PMU,
39 .flags = IORESOURCE_IRQ,
40};
41
42struct platform_device pxa_device_pmu = {
43 .name = "arm-pmu",
44 .id = ARM_PMU_DEVICE_CPU,
45 .resource = &pxa_resource_pmu,
46 .num_resources = 1,
47};
48
eric miao8f58de72007-12-19 17:14:02 +080049static struct resource pxamci_resources[] = {
50 [0] = {
51 .start = 0x41100000,
52 .end = 0x41100fff,
53 .flags = IORESOURCE_MEM,
54 },
55 [1] = {
56 .start = IRQ_MMC,
57 .end = IRQ_MMC,
58 .flags = IORESOURCE_IRQ,
59 },
60 [2] = {
61 .start = 21,
62 .end = 21,
63 .flags = IORESOURCE_DMA,
64 },
65 [3] = {
66 .start = 22,
67 .end = 22,
68 .flags = IORESOURCE_DMA,
69 },
70};
71
72static u64 pxamci_dmamask = 0xffffffffUL;
73
74struct platform_device pxa_device_mci = {
75 .name = "pxa2xx-mci",
Bridge Wufafc9d32007-12-21 19:00:13 +080076 .id = 0,
eric miao8f58de72007-12-19 17:14:02 +080077 .dev = {
78 .dma_mask = &pxamci_dmamask,
79 .coherent_dma_mask = 0xffffffff,
80 },
81 .num_resources = ARRAY_SIZE(pxamci_resources),
82 .resource = pxamci_resources,
83};
84
85void __init pxa_set_mci_info(struct pxamci_platform_data *info)
86{
87 pxa_register_device(&pxa_device_mci, info);
88}
89
90
Philipp Zabel12576292009-05-26 22:03:32 +020091static struct pxa2xx_udc_mach_info pxa_udc_info = {
92 .gpio_pullup = -1,
93 .gpio_vbus = -1,
94};
eric miao8f58de72007-12-19 17:14:02 +080095
96void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
97{
98 memcpy(&pxa_udc_info, info, sizeof *info);
99}
100
101static struct resource pxa2xx_udc_resources[] = {
102 [0] = {
103 .start = 0x40600000,
104 .end = 0x4060ffff,
105 .flags = IORESOURCE_MEM,
106 },
107 [1] = {
108 .start = IRQ_USB,
109 .end = IRQ_USB,
110 .flags = IORESOURCE_IRQ,
111 },
112};
113
114static u64 udc_dma_mask = ~(u32)0;
115
Philipp Zabel7a857622008-06-22 23:36:39 +0100116struct platform_device pxa25x_device_udc = {
117 .name = "pxa25x-udc",
118 .id = -1,
119 .resource = pxa2xx_udc_resources,
120 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
121 .dev = {
122 .platform_data = &pxa_udc_info,
123 .dma_mask = &udc_dma_mask,
124 }
125};
126
127struct platform_device pxa27x_device_udc = {
128 .name = "pxa27x-udc",
eric miao8f58de72007-12-19 17:14:02 +0800129 .id = -1,
130 .resource = pxa2xx_udc_resources,
131 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
132 .dev = {
133 .platform_data = &pxa_udc_info,
134 .dma_mask = &udc_dma_mask,
135 }
136};
137
Igor Grinberg69f22be2010-07-27 15:06:58 +0300138#ifdef CONFIG_PXA3xx
139static struct resource pxa3xx_u2d_resources[] = {
140 [0] = {
141 .start = 0x54100000,
142 .end = 0x54100fff,
143 .flags = IORESOURCE_MEM,
144 },
145 [1] = {
146 .start = IRQ_USB2,
147 .end = IRQ_USB2,
148 .flags = IORESOURCE_IRQ,
149 },
150};
151
152struct platform_device pxa3xx_device_u2d = {
153 .name = "pxa3xx-u2d",
154 .id = -1,
155 .resource = pxa3xx_u2d_resources,
156 .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources),
157};
158
159void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
160{
161 pxa_register_device(&pxa3xx_device_u2d, info);
162}
163#endif /* CONFIG_PXA3xx */
164
eric miao8f58de72007-12-19 17:14:02 +0800165static struct resource pxafb_resources[] = {
166 [0] = {
167 .start = 0x44000000,
168 .end = 0x4400ffff,
169 .flags = IORESOURCE_MEM,
170 },
171 [1] = {
172 .start = IRQ_LCD,
173 .end = IRQ_LCD,
174 .flags = IORESOURCE_IRQ,
175 },
176};
177
178static u64 fb_dma_mask = ~(u64)0;
179
180struct platform_device pxa_device_fb = {
181 .name = "pxa2xx-fb",
182 .id = -1,
183 .dev = {
184 .dma_mask = &fb_dma_mask,
185 .coherent_dma_mask = 0xffffffff,
186 },
187 .num_resources = ARRAY_SIZE(pxafb_resources),
188 .resource = pxafb_resources,
189};
190
191void __init set_pxa_fb_info(struct pxafb_mach_info *info)
192{
193 pxa_register_device(&pxa_device_fb, info);
194}
195
196void __init set_pxa_fb_parent(struct device *parent_dev)
197{
198 pxa_device_fb.dev.parent = parent_dev;
199}
200
201static struct resource pxa_resource_ffuart[] = {
202 {
Eric Miao02f65262008-11-28 14:08:53 +0800203 .start = 0x40100000,
204 .end = 0x40100023,
eric miao8f58de72007-12-19 17:14:02 +0800205 .flags = IORESOURCE_MEM,
206 }, {
207 .start = IRQ_FFUART,
208 .end = IRQ_FFUART,
209 .flags = IORESOURCE_IRQ,
210 }
211};
212
Russell Kingcc155c62009-11-09 13:34:08 +0800213struct platform_device pxa_device_ffuart = {
eric miao8f58de72007-12-19 17:14:02 +0800214 .name = "pxa2xx-uart",
215 .id = 0,
216 .resource = pxa_resource_ffuart,
217 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
218};
219
Russell Kingcc155c62009-11-09 13:34:08 +0800220void __init pxa_set_ffuart_info(void *info)
221{
222 pxa_register_device(&pxa_device_ffuart, info);
223}
224
eric miao8f58de72007-12-19 17:14:02 +0800225static struct resource pxa_resource_btuart[] = {
226 {
Eric Miao02f65262008-11-28 14:08:53 +0800227 .start = 0x40200000,
228 .end = 0x40200023,
eric miao8f58de72007-12-19 17:14:02 +0800229 .flags = IORESOURCE_MEM,
230 }, {
231 .start = IRQ_BTUART,
232 .end = IRQ_BTUART,
233 .flags = IORESOURCE_IRQ,
234 }
235};
236
237struct platform_device pxa_device_btuart = {
238 .name = "pxa2xx-uart",
239 .id = 1,
240 .resource = pxa_resource_btuart,
241 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
242};
243
Russell Kingcc155c62009-11-09 13:34:08 +0800244void __init pxa_set_btuart_info(void *info)
245{
246 pxa_register_device(&pxa_device_btuart, info);
247}
248
eric miao8f58de72007-12-19 17:14:02 +0800249static struct resource pxa_resource_stuart[] = {
250 {
Eric Miao02f65262008-11-28 14:08:53 +0800251 .start = 0x40700000,
252 .end = 0x40700023,
eric miao8f58de72007-12-19 17:14:02 +0800253 .flags = IORESOURCE_MEM,
254 }, {
255 .start = IRQ_STUART,
256 .end = IRQ_STUART,
257 .flags = IORESOURCE_IRQ,
258 }
259};
260
261struct platform_device pxa_device_stuart = {
262 .name = "pxa2xx-uart",
263 .id = 2,
264 .resource = pxa_resource_stuart,
265 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
266};
267
Russell Kingcc155c62009-11-09 13:34:08 +0800268void __init pxa_set_stuart_info(void *info)
269{
270 pxa_register_device(&pxa_device_stuart, info);
271}
272
eric miao8f58de72007-12-19 17:14:02 +0800273static struct resource pxa_resource_hwuart[] = {
274 {
Eric Miao02f65262008-11-28 14:08:53 +0800275 .start = 0x41600000,
276 .end = 0x4160002F,
eric miao8f58de72007-12-19 17:14:02 +0800277 .flags = IORESOURCE_MEM,
278 }, {
279 .start = IRQ_HWUART,
280 .end = IRQ_HWUART,
281 .flags = IORESOURCE_IRQ,
282 }
283};
284
285struct platform_device pxa_device_hwuart = {
286 .name = "pxa2xx-uart",
287 .id = 3,
288 .resource = pxa_resource_hwuart,
289 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
290};
291
Russell Kingcc155c62009-11-09 13:34:08 +0800292void __init pxa_set_hwuart_info(void *info)
293{
294 if (cpu_is_pxa255())
295 pxa_register_device(&pxa_device_hwuart, info);
296 else
297 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
298}
299
eric miao8f58de72007-12-19 17:14:02 +0800300static struct resource pxai2c_resources[] = {
301 {
302 .start = 0x40301680,
303 .end = 0x403016a3,
304 .flags = IORESOURCE_MEM,
305 }, {
306 .start = IRQ_I2C,
307 .end = IRQ_I2C,
308 .flags = IORESOURCE_IRQ,
309 },
310};
311
312struct platform_device pxa_device_i2c = {
313 .name = "pxa2xx-i2c",
314 .id = 0,
315 .resource = pxai2c_resources,
316 .num_resources = ARRAY_SIZE(pxai2c_resources),
317};
318
319void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
320{
321 pxa_register_device(&pxa_device_i2c, info);
322}
323
Eric Miao99464292008-11-28 15:01:55 +0800324#ifdef CONFIG_PXA27x
325static struct resource pxa27x_resources_i2c_power[] = {
326 {
327 .start = 0x40f00180,
328 .end = 0x40f001a3,
329 .flags = IORESOURCE_MEM,
330 }, {
331 .start = IRQ_PWRI2C,
332 .end = IRQ_PWRI2C,
333 .flags = IORESOURCE_IRQ,
334 },
335};
336
337struct platform_device pxa27x_device_i2c_power = {
338 .name = "pxa2xx-i2c",
339 .id = 1,
340 .resource = pxa27x_resources_i2c_power,
341 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
342};
343#endif
344
eric miao8f58de72007-12-19 17:14:02 +0800345static struct resource pxai2s_resources[] = {
346 {
347 .start = 0x40400000,
348 .end = 0x40400083,
349 .flags = IORESOURCE_MEM,
350 }, {
351 .start = IRQ_I2S,
352 .end = IRQ_I2S,
353 .flags = IORESOURCE_IRQ,
354 },
355};
356
357struct platform_device pxa_device_i2s = {
358 .name = "pxa2xx-i2s",
359 .id = -1,
360 .resource = pxai2s_resources,
361 .num_resources = ARRAY_SIZE(pxai2s_resources),
362};
363
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000364struct platform_device pxa_device_asoc_ssp1 = {
365 .name = "pxa-ssp-dai",
366 .id = 0,
367};
368
369struct platform_device pxa_device_asoc_ssp2= {
370 .name = "pxa-ssp-dai",
371 .id = 1,
372};
373
374struct platform_device pxa_device_asoc_ssp3 = {
375 .name = "pxa-ssp-dai",
376 .id = 2,
377};
378
379struct platform_device pxa_device_asoc_ssp4 = {
380 .name = "pxa-ssp-dai",
381 .id = 3,
382};
383
384struct platform_device pxa_device_asoc_platform = {
385 .name = "pxa-pcm-audio",
386 .id = -1,
387};
388
eric miao8f58de72007-12-19 17:14:02 +0800389static u64 pxaficp_dmamask = ~(u32)0;
390
391struct platform_device pxa_device_ficp = {
392 .name = "pxa2xx-ir",
393 .id = -1,
394 .dev = {
395 .dma_mask = &pxaficp_dmamask,
396 .coherent_dma_mask = 0xffffffff,
397 },
398};
399
400void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
401{
402 pxa_register_device(&pxa_device_ficp, info);
403}
404
Robert Jarzmik72493142008-11-13 23:50:56 +0100405static struct resource pxa_rtc_resources[] = {
406 [0] = {
407 .start = 0x40900000,
408 .end = 0x40900000 + 0x3b,
409 .flags = IORESOURCE_MEM,
410 },
411 [1] = {
412 .start = IRQ_RTC1Hz,
413 .end = IRQ_RTC1Hz,
414 .flags = IORESOURCE_IRQ,
415 },
416 [2] = {
417 .start = IRQ_RTCAlrm,
418 .end = IRQ_RTCAlrm,
419 .flags = IORESOURCE_IRQ,
420 },
421};
422
423struct platform_device sa1100_device_rtc = {
eric miao8f58de72007-12-19 17:14:02 +0800424 .name = "sa1100-rtc",
425 .id = -1,
426};
427
Robert Jarzmik72493142008-11-13 23:50:56 +0100428struct platform_device pxa_device_rtc = {
429 .name = "pxa-rtc",
430 .id = -1,
431 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
432 .resource = pxa_rtc_resources,
433};
434
Mark Brown9f19d632008-06-10 12:30:05 +0100435static struct resource pxa_ac97_resources[] = {
436 [0] = {
437 .start = 0x40500000,
438 .end = 0x40500000 + 0xfff,
439 .flags = IORESOURCE_MEM,
440 },
441 [1] = {
442 .start = IRQ_AC97,
443 .end = IRQ_AC97,
444 .flags = IORESOURCE_IRQ,
445 },
446};
447
448static u64 pxa_ac97_dmamask = 0xffffffffUL;
449
450struct platform_device pxa_device_ac97 = {
451 .name = "pxa2xx-ac97",
452 .id = -1,
453 .dev = {
454 .dma_mask = &pxa_ac97_dmamask,
455 .coherent_dma_mask = 0xffffffff,
456 },
457 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
458 .resource = pxa_ac97_resources,
459};
460
461void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
462{
463 pxa_register_device(&pxa_device_ac97, ops);
464}
465
eric miao8f58de72007-12-19 17:14:02 +0800466#ifdef CONFIG_PXA25x
467
eric miao75540c12008-04-13 21:44:04 +0100468static struct resource pxa25x_resource_pwm0[] = {
469 [0] = {
470 .start = 0x40b00000,
471 .end = 0x40b0000f,
472 .flags = IORESOURCE_MEM,
473 },
474};
475
476struct platform_device pxa25x_device_pwm0 = {
477 .name = "pxa25x-pwm",
478 .id = 0,
479 .resource = pxa25x_resource_pwm0,
480 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
481};
482
483static struct resource pxa25x_resource_pwm1[] = {
484 [0] = {
485 .start = 0x40c00000,
486 .end = 0x40c0000f,
487 .flags = IORESOURCE_MEM,
488 },
489};
490
491struct platform_device pxa25x_device_pwm1 = {
492 .name = "pxa25x-pwm",
493 .id = 1,
494 .resource = pxa25x_resource_pwm1,
495 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
496};
497
eric miao8f58de72007-12-19 17:14:02 +0800498static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
499
500static struct resource pxa25x_resource_ssp[] = {
501 [0] = {
502 .start = 0x41000000,
503 .end = 0x4100001f,
504 .flags = IORESOURCE_MEM,
505 },
506 [1] = {
507 .start = IRQ_SSP,
508 .end = IRQ_SSP,
509 .flags = IORESOURCE_IRQ,
510 },
511 [2] = {
512 /* DRCMR for RX */
513 .start = 13,
514 .end = 13,
515 .flags = IORESOURCE_DMA,
516 },
517 [3] = {
518 /* DRCMR for TX */
519 .start = 14,
520 .end = 14,
521 .flags = IORESOURCE_DMA,
522 },
523};
524
525struct platform_device pxa25x_device_ssp = {
526 .name = "pxa25x-ssp",
527 .id = 0,
528 .dev = {
529 .dma_mask = &pxa25x_ssp_dma_mask,
530 .coherent_dma_mask = DMA_BIT_MASK(32),
531 },
532 .resource = pxa25x_resource_ssp,
533 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
534};
535
536static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
537
538static struct resource pxa25x_resource_nssp[] = {
539 [0] = {
540 .start = 0x41400000,
541 .end = 0x4140002f,
542 .flags = IORESOURCE_MEM,
543 },
544 [1] = {
545 .start = IRQ_NSSP,
546 .end = IRQ_NSSP,
547 .flags = IORESOURCE_IRQ,
548 },
549 [2] = {
550 /* DRCMR for RX */
551 .start = 15,
552 .end = 15,
553 .flags = IORESOURCE_DMA,
554 },
555 [3] = {
556 /* DRCMR for TX */
557 .start = 16,
558 .end = 16,
559 .flags = IORESOURCE_DMA,
560 },
561};
562
563struct platform_device pxa25x_device_nssp = {
564 .name = "pxa25x-nssp",
565 .id = 1,
566 .dev = {
567 .dma_mask = &pxa25x_nssp_dma_mask,
568 .coherent_dma_mask = DMA_BIT_MASK(32),
569 },
570 .resource = pxa25x_resource_nssp,
571 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
572};
573
574static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
575
576static struct resource pxa25x_resource_assp[] = {
577 [0] = {
578 .start = 0x41500000,
579 .end = 0x4150002f,
580 .flags = IORESOURCE_MEM,
581 },
582 [1] = {
583 .start = IRQ_ASSP,
584 .end = IRQ_ASSP,
585 .flags = IORESOURCE_IRQ,
586 },
587 [2] = {
588 /* DRCMR for RX */
589 .start = 23,
590 .end = 23,
591 .flags = IORESOURCE_DMA,
592 },
593 [3] = {
594 /* DRCMR for TX */
595 .start = 24,
596 .end = 24,
597 .flags = IORESOURCE_DMA,
598 },
599};
600
601struct platform_device pxa25x_device_assp = {
602 /* ASSP is basically equivalent to NSSP */
603 .name = "pxa25x-nssp",
604 .id = 2,
605 .dev = {
606 .dma_mask = &pxa25x_assp_dma_mask,
607 .coherent_dma_mask = DMA_BIT_MASK(32),
608 },
609 .resource = pxa25x_resource_assp,
610 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
611};
612#endif /* CONFIG_PXA25x */
613
614#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
Haojian Zhuanga4553352010-11-24 11:54:19 +0800615static struct resource pxa27x_resource_camera[] = {
eric miao37320982008-01-23 13:39:13 +0800616 [0] = {
Haojian Zhuanga4553352010-11-24 11:54:19 +0800617 .start = 0x50000000,
618 .end = 0x50000fff,
eric miao37320982008-01-23 13:39:13 +0800619 .flags = IORESOURCE_MEM,
620 },
621 [1] = {
Haojian Zhuanga4553352010-11-24 11:54:19 +0800622 .start = IRQ_CAMERA,
623 .end = IRQ_CAMERA,
eric miao37320982008-01-23 13:39:13 +0800624 .flags = IORESOURCE_IRQ,
625 },
626};
627
Haojian Zhuanga4553352010-11-24 11:54:19 +0800628static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
629
630static struct platform_device pxa27x_device_camera = {
631 .name = "pxa27x-camera",
632 .id = 0, /* This is used to put cameras on this interface */
633 .dev = {
634 .dma_mask = &pxa27x_dma_mask_camera,
635 .coherent_dma_mask = 0xffffffff,
636 },
637 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
638 .resource = pxa27x_resource_camera,
eric miao37320982008-01-23 13:39:13 +0800639};
640
Haojian Zhuanga4553352010-11-24 11:54:19 +0800641void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
eric miao37320982008-01-23 13:39:13 +0800642{
Haojian Zhuanga4553352010-11-24 11:54:19 +0800643 pxa_register_device(&pxa27x_device_camera, info);
eric miao37320982008-01-23 13:39:13 +0800644}
645
eric miaoec68e452007-12-12 09:29:33 +0800646static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
647
648static struct resource pxa27x_resource_ohci[] = {
649 [0] = {
650 .start = 0x4C000000,
651 .end = 0x4C00ff6f,
652 .flags = IORESOURCE_MEM,
653 },
654 [1] = {
655 .start = IRQ_USBH1,
656 .end = IRQ_USBH1,
657 .flags = IORESOURCE_IRQ,
658 },
659};
660
661struct platform_device pxa27x_device_ohci = {
662 .name = "pxa27x-ohci",
663 .id = -1,
664 .dev = {
665 .dma_mask = &pxa27x_ohci_dma_mask,
666 .coherent_dma_mask = DMA_BIT_MASK(32),
667 },
668 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
669 .resource = pxa27x_resource_ohci,
670};
671
672void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
673{
674 pxa_register_device(&pxa27x_device_ohci, info);
675}
Haojian Zhuanga4553352010-11-24 11:54:19 +0800676#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
677
678#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
679static struct resource pxa27x_resource_keypad[] = {
680 [0] = {
681 .start = 0x41500000,
682 .end = 0x4150004c,
683 .flags = IORESOURCE_MEM,
684 },
685 [1] = {
686 .start = IRQ_KEYPAD,
687 .end = IRQ_KEYPAD,
688 .flags = IORESOURCE_IRQ,
689 },
690};
691
692struct platform_device pxa27x_device_keypad = {
693 .name = "pxa27x-keypad",
694 .id = -1,
695 .resource = pxa27x_resource_keypad,
696 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
697};
698
699void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
700{
701 pxa_register_device(&pxa27x_device_keypad, info);
702}
eric miaoec68e452007-12-12 09:29:33 +0800703
eric miao8f58de72007-12-19 17:14:02 +0800704static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
705
706static struct resource pxa27x_resource_ssp1[] = {
707 [0] = {
708 .start = 0x41000000,
709 .end = 0x4100003f,
710 .flags = IORESOURCE_MEM,
711 },
712 [1] = {
713 .start = IRQ_SSP,
714 .end = IRQ_SSP,
715 .flags = IORESOURCE_IRQ,
716 },
717 [2] = {
718 /* DRCMR for RX */
719 .start = 13,
720 .end = 13,
721 .flags = IORESOURCE_DMA,
722 },
723 [3] = {
724 /* DRCMR for TX */
725 .start = 14,
726 .end = 14,
727 .flags = IORESOURCE_DMA,
728 },
729};
730
731struct platform_device pxa27x_device_ssp1 = {
732 .name = "pxa27x-ssp",
733 .id = 0,
734 .dev = {
735 .dma_mask = &pxa27x_ssp1_dma_mask,
736 .coherent_dma_mask = DMA_BIT_MASK(32),
737 },
738 .resource = pxa27x_resource_ssp1,
739 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
740};
741
742static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
743
744static struct resource pxa27x_resource_ssp2[] = {
745 [0] = {
746 .start = 0x41700000,
747 .end = 0x4170003f,
748 .flags = IORESOURCE_MEM,
749 },
750 [1] = {
751 .start = IRQ_SSP2,
752 .end = IRQ_SSP2,
753 .flags = IORESOURCE_IRQ,
754 },
755 [2] = {
756 /* DRCMR for RX */
757 .start = 15,
758 .end = 15,
759 .flags = IORESOURCE_DMA,
760 },
761 [3] = {
762 /* DRCMR for TX */
763 .start = 16,
764 .end = 16,
765 .flags = IORESOURCE_DMA,
766 },
767};
768
769struct platform_device pxa27x_device_ssp2 = {
770 .name = "pxa27x-ssp",
771 .id = 1,
772 .dev = {
773 .dma_mask = &pxa27x_ssp2_dma_mask,
774 .coherent_dma_mask = DMA_BIT_MASK(32),
775 },
776 .resource = pxa27x_resource_ssp2,
777 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
778};
779
780static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
781
782static struct resource pxa27x_resource_ssp3[] = {
783 [0] = {
784 .start = 0x41900000,
785 .end = 0x4190003f,
786 .flags = IORESOURCE_MEM,
787 },
788 [1] = {
789 .start = IRQ_SSP3,
790 .end = IRQ_SSP3,
791 .flags = IORESOURCE_IRQ,
792 },
793 [2] = {
794 /* DRCMR for RX */
795 .start = 66,
796 .end = 66,
797 .flags = IORESOURCE_DMA,
798 },
799 [3] = {
800 /* DRCMR for TX */
801 .start = 67,
802 .end = 67,
803 .flags = IORESOURCE_DMA,
804 },
805};
806
807struct platform_device pxa27x_device_ssp3 = {
808 .name = "pxa27x-ssp",
809 .id = 2,
810 .dev = {
811 .dma_mask = &pxa27x_ssp3_dma_mask,
812 .coherent_dma_mask = DMA_BIT_MASK(32),
813 },
814 .resource = pxa27x_resource_ssp3,
815 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
816};
Guennadi Liakhovetski3f3acef2008-04-11 22:19:45 +0200817
eric miao75540c12008-04-13 21:44:04 +0100818static struct resource pxa27x_resource_pwm0[] = {
819 [0] = {
820 .start = 0x40b00000,
821 .end = 0x40b0001f,
822 .flags = IORESOURCE_MEM,
823 },
824};
825
826struct platform_device pxa27x_device_pwm0 = {
827 .name = "pxa27x-pwm",
828 .id = 0,
829 .resource = pxa27x_resource_pwm0,
830 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
831};
832
833static struct resource pxa27x_resource_pwm1[] = {
834 [0] = {
835 .start = 0x40c00000,
836 .end = 0x40c0001f,
837 .flags = IORESOURCE_MEM,
838 },
839};
840
841struct platform_device pxa27x_device_pwm1 = {
842 .name = "pxa27x-pwm",
843 .id = 1,
844 .resource = pxa27x_resource_pwm1,
845 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
846};
Haojian Zhuanga4553352010-11-24 11:54:19 +0800847#endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
eric miao8f58de72007-12-19 17:14:02 +0800848
849#ifdef CONFIG_PXA3xx
Bridge Wu8d33b052007-12-21 19:15:36 +0800850static struct resource pxa3xx_resources_mci2[] = {
851 [0] = {
852 .start = 0x42000000,
853 .end = 0x42000fff,
854 .flags = IORESOURCE_MEM,
855 },
856 [1] = {
857 .start = IRQ_MMC2,
858 .end = IRQ_MMC2,
859 .flags = IORESOURCE_IRQ,
860 },
861 [2] = {
862 .start = 93,
863 .end = 93,
864 .flags = IORESOURCE_DMA,
865 },
866 [3] = {
867 .start = 94,
868 .end = 94,
869 .flags = IORESOURCE_DMA,
870 },
871};
872
873struct platform_device pxa3xx_device_mci2 = {
874 .name = "pxa2xx-mci",
875 .id = 1,
876 .dev = {
877 .dma_mask = &pxamci_dmamask,
878 .coherent_dma_mask = 0xffffffff,
879 },
880 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
881 .resource = pxa3xx_resources_mci2,
882};
883
884void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
885{
886 pxa_register_device(&pxa3xx_device_mci2, info);
887}
888
Bridge Wu5a1f21b2007-12-21 19:27:08 +0800889static struct resource pxa3xx_resources_mci3[] = {
890 [0] = {
891 .start = 0x42500000,
892 .end = 0x42500fff,
893 .flags = IORESOURCE_MEM,
894 },
895 [1] = {
896 .start = IRQ_MMC3,
897 .end = IRQ_MMC3,
898 .flags = IORESOURCE_IRQ,
899 },
900 [2] = {
901 .start = 100,
902 .end = 100,
903 .flags = IORESOURCE_DMA,
904 },
905 [3] = {
906 .start = 101,
907 .end = 101,
908 .flags = IORESOURCE_DMA,
909 },
910};
911
912struct platform_device pxa3xx_device_mci3 = {
913 .name = "pxa2xx-mci",
914 .id = 2,
915 .dev = {
916 .dma_mask = &pxamci_dmamask,
917 .coherent_dma_mask = 0xffffffff,
918 },
919 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
920 .resource = pxa3xx_resources_mci3,
921};
922
923void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
924{
925 pxa_register_device(&pxa3xx_device_mci3, info);
926}
927
Haojian Zhuanga4553352010-11-24 11:54:19 +0800928static struct resource pxa3xx_resources_gcu[] = {
929 {
930 .start = 0x54000000,
931 .end = 0x54000fff,
932 .flags = IORESOURCE_MEM,
933 },
934 {
935 .start = IRQ_GCU,
936 .end = IRQ_GCU,
937 .flags = IORESOURCE_IRQ,
938 },
939};
940
941static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
942
943struct platform_device pxa3xx_device_gcu = {
944 .name = "pxa3xx-gcu",
945 .id = -1,
946 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
947 .resource = pxa3xx_resources_gcu,
948 .dev = {
949 .dma_mask = &pxa3xx_gcu_dmamask,
950 .coherent_dma_mask = 0xffffffff,
951 },
952};
953
954#endif /* CONFIG_PXA3xx */
955
956#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
957static struct resource pxa3xx_resources_i2c_power[] = {
958 {
959 .start = 0x40f500c0,
960 .end = 0x40f500d3,
961 .flags = IORESOURCE_MEM,
962 }, {
963 .start = IRQ_PWRI2C,
964 .end = IRQ_PWRI2C,
965 .flags = IORESOURCE_IRQ,
966 },
967};
968
969struct platform_device pxa3xx_device_i2c_power = {
970 .name = "pxa3xx-pwri2c",
971 .id = 1,
972 .resource = pxa3xx_resources_i2c_power,
973 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
974};
975
Eric Miao9ae819a2008-06-02 15:22:03 +0800976static struct resource pxa3xx_resources_nand[] = {
977 [0] = {
978 .start = 0x43100000,
979 .end = 0x43100053,
980 .flags = IORESOURCE_MEM,
981 },
982 [1] = {
983 .start = IRQ_NAND,
984 .end = IRQ_NAND,
985 .flags = IORESOURCE_IRQ,
986 },
987 [2] = {
988 /* DRCMR for Data DMA */
989 .start = 97,
990 .end = 97,
991 .flags = IORESOURCE_DMA,
992 },
993 [3] = {
994 /* DRCMR for Command DMA */
995 .start = 99,
996 .end = 99,
997 .flags = IORESOURCE_DMA,
998 },
999};
1000
1001static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
1002
1003struct platform_device pxa3xx_device_nand = {
1004 .name = "pxa3xx-nand",
1005 .id = -1,
1006 .dev = {
1007 .dma_mask = &pxa3xx_nand_dma_mask,
1008 .coherent_dma_mask = DMA_BIT_MASK(32),
1009 },
1010 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
1011 .resource = pxa3xx_resources_nand,
1012};
1013
1014void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1015{
1016 pxa_register_device(&pxa3xx_device_nand, info);
1017}
Daniel Mack1ff2c332009-07-09 19:04:49 +02001018
Haojian Zhuanga4553352010-11-24 11:54:19 +08001019static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
1020
1021static struct resource pxa3xx_resource_ssp4[] = {
1022 [0] = {
1023 .start = 0x41a00000,
1024 .end = 0x41a0003f,
Daniel Mack1ff2c332009-07-09 19:04:49 +02001025 .flags = IORESOURCE_MEM,
1026 },
Haojian Zhuanga4553352010-11-24 11:54:19 +08001027 [1] = {
1028 .start = IRQ_SSP4,
1029 .end = IRQ_SSP4,
Daniel Mack1ff2c332009-07-09 19:04:49 +02001030 .flags = IORESOURCE_IRQ,
1031 },
Haojian Zhuanga4553352010-11-24 11:54:19 +08001032 [2] = {
1033 /* DRCMR for RX */
1034 .start = 2,
1035 .end = 2,
1036 .flags = IORESOURCE_DMA,
1037 },
1038 [3] = {
1039 /* DRCMR for TX */
1040 .start = 3,
1041 .end = 3,
1042 .flags = IORESOURCE_DMA,
Daniel Mack1ff2c332009-07-09 19:04:49 +02001043 },
1044};
1045
Haojian Zhuanga4553352010-11-24 11:54:19 +08001046struct platform_device pxa3xx_device_ssp4 = {
1047 /* PXA3xx SSP is basically equivalent to PXA27x */
1048 .name = "pxa27x-ssp",
1049 .id = 3,
1050 .dev = {
1051 .dma_mask = &pxa3xx_ssp4_dma_mask,
1052 .coherent_dma_mask = DMA_BIT_MASK(32),
1053 },
1054 .resource = pxa3xx_resource_ssp4,
1055 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
1056};
1057#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
Guennadi Liakhovetskie1722742008-06-13 09:17:31 +01001058
1059/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1060 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1061void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1062{
1063 struct platform_device *pd;
1064
1065 pd = platform_device_alloc("pxa2xx-spi", id);
1066 if (pd == NULL) {
1067 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1068 id);
1069 return;
1070 }
1071
1072 pd->dev.platform_data = info;
1073 platform_device_add(pd);
1074}