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gerrit-public.fairphone.software / kernel / msm-4.9 / 073adf4fa7f91a91f64a88af278a5d2b075c1e83 / . / arch / arm / boot / dts / prima2-cb.dts
blob: a0a423d1d573e3f6b3df71de3ad67c9b83e3f022 [file] [log] [blame]
Binghua Duan02c981c2011-07-08 17:40:12 +0800[diff] [blame]1/dts-v1/;
2/ {
3 model = "SiRF Prima2 eVB";
4 compatible = "sirf,prima2-cb", "sirf,prima2";
5 #address-cells = <1>;
6 #size-cells = <1>;
7 interrupt-parent = <&intc>;
8
9 memory {
10 reg = <0x00000000 0x20000000>;
11 };
12
13 chosen {
14 bootargs = "mem=512M real_root=/dev/mmcblk0p2 console=ttyS0 panel=1 bootsplash=true bpp=16 androidboot.console=ttyS1";
15 linux,stdout-path = &uart1;
16 };
17
18 cpus {
19 #address-cells = <1>;
20 #size-cells = <0>;
21
22 cpu@0 {
23 reg = <0x0>;
24 d-cache-line-size = <32>;
25 i-cache-line-size = <32>;
26 d-cache-size = <32768>;
27 i-cache-size = <32768>;
28 /* from bootloader */
29 timebase-frequency = <0>;
30 bus-frequency = <0>;
31 clock-frequency = <0>;
32 };
33 };
34
35 axi {
36 compatible = "simple-bus";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 ranges = <0x40000000 0x40000000 0x80000000>;
40
41 l2-cache-controller@80040000 {
42 compatible = "arm,pl310-cache";
43 reg = <0x80040000 0x1000>;
44 interrupts = <59>;
45 };
46
47 intc: interrupt-controller@80020000 {
48 #interrupt-cells = <1>;
49 interrupt-controller;
50 compatible = "sirf,prima2-intc";
51 reg = <0x80020000 0x1000>;
52 };
53
54 sys-iobg {
55 compatible = "simple-bus";
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges = <0x88000000 0x88000000 0x40000>;
59
60 clock-controller@88000000 {
61 compatible = "sirf,prima2-clkc";
62 reg = <0x88000000 0x1000>;
63 interrupts = <3>;
64 };
65
66 reset-controller@88010000 {
67 compatible = "sirf,prima2-rstc";
68 reg = <0x88010000 0x1000>;
69 };
Barry Song073adf42011-09-04 22:15:16 -0700[diff] [blame^]70
71 rsc-controller@88020000 {
72 compatible = "sirf,prima2-rsc";
73 reg = <0x88020000 0x1000>;
74 };
Binghua Duan02c981c2011-07-08 17:40:12 +0800[diff] [blame]75 };
76
77 mem-iobg {
78 compatible = "simple-bus";
79 #address-cells = <1>;
80 #size-cells = <1>;
81 ranges = <0x90000000 0x90000000 0x10000>;
82
83 memory-controller@90000000 {
84 compatible = "sirf,prima2-memc";
85 reg = <0x90000000 0x10000>;
86 interrupts = <27>;
87 };
88 };
89
90 disp-iobg {
91 compatible = "simple-bus";
92 #address-cells = <1>;
93 #size-cells = <1>;
94 ranges = <0x90010000 0x90010000 0x30000>;
95
96 display@90010000 {
97 compatible = "sirf,prima2-lcd";
98 reg = <0x90010000 0x20000>;
99 interrupts = <30>;
100 };
101
102 vpp@90020000 {
103 compatible = "sirf,prima2-vpp";
104 reg = <0x90020000 0x10000>;
105 interrupts = <31>;
106 };
107 };
108
109 graphics-iobg {
110 compatible = "simple-bus";
111 #address-cells = <1>;
112 #size-cells = <1>;
113 ranges = <0x98000000 0x98000000 0x8000000>;
114
115 graphics@98000000 {
116 compatible = "powervr,sgx531";
117 reg = <0x98000000 0x8000000>;
118 interrupts = <6>;
119 };
120 };
121
122 multimedia-iobg {
123 compatible = "simple-bus";
124 #address-cells = <1>;
125 #size-cells = <1>;
126 ranges = <0xa0000000 0xa0000000 0x8000000>;
127
128 multimedia@a0000000 {
129 compatible = "sirf,prima2-video-codec";
130 reg = <0xa0000000 0x8000000>;
131 interrupts = <5>;
132 };
133 };
134
135 dsp-iobg {
136 compatible = "simple-bus";
137 #address-cells = <1>;
138 #size-cells = <1>;
139 ranges = <0xa8000000 0xa8000000 0x2000000>;
140
141 dspif@a8000000 {
142 compatible = "sirf,prima2-dspif";
143 reg = <0xa8000000 0x10000>;
144 interrupts = <9>;
145 };
146
147 gps@a8010000 {
148 compatible = "sirf,prima2-gps";
149 reg = <0xa8010000 0x10000>;
150 interrupts = <7>;
151 };
152
153 dsp@a9000000 {
154 compatible = "sirf,prima2-dsp";
155 reg = <0xa9000000 0x1000000>;
156 interrupts = <8>;
157 };
158 };
159
160 peri-iobg {
161 compatible = "simple-bus";
162 #address-cells = <1>;
163 #size-cells = <1>;
164 ranges = <0xb0000000 0xb0000000 0x180000>;
165
166 timer@b0020000 {
167 compatible = "sirf,prima2-tick";
168 reg = <0xb0020000 0x1000>;
169 interrupts = <0>;
170 };
171
172 nand@b0030000 {
173 compatible = "sirf,prima2-nand";
174 reg = <0xb0030000 0x10000>;
175 interrupts = <41>;
176 };
177
178 audio@b0040000 {
179 compatible = "sirf,prima2-audio";
180 reg = <0xb0040000 0x10000>;
181 interrupts = <35>;
182 };
183
184 uart0: uart@b0050000 {
185 cell-index = <0>;
186 compatible = "sirf,prima2-uart";
187 reg = <0xb0050000 0x10000>;
188 interrupts = <17>;
189 };
190
191 uart1: uart@b0060000 {
192 cell-index = <1>;
193 compatible = "sirf,prima2-uart";
194 reg = <0xb0060000 0x10000>;
195 interrupts = <18>;
196 };
197
198 uart2: uart@b0070000 {
199 cell-index = <2>;
200 compatible = "sirf,prima2-uart";
201 reg = <0xb0070000 0x10000>;
202 interrupts = <19>;
203 };
204
205 usp0: usp@b0080000 {
206 cell-index = <0>;
207 compatible = "sirf,prima2-usp";
208 reg = <0xb0080000 0x10000>;
209 interrupts = <20>;
210 };
211
212 usp1: usp@b0090000 {
213 cell-index = <1>;
214 compatible = "sirf,prima2-usp";
215 reg = <0xb0090000 0x10000>;
216 interrupts = <21>;
217 };
218
219 usp2: usp@b00a0000 {
220 cell-index = <2>;
221 compatible = "sirf,prima2-usp";
222 reg = <0xb00a0000 0x10000>;
223 interrupts = <22>;
224 };
225
226 dmac0: dma-controller@b00b0000 {
227 cell-index = <0>;
228 compatible = "sirf,prima2-dmac";
229 reg = <0xb00b0000 0x10000>;
230 interrupts = <12>;
231 };
232
233 dmac1: dma-controller@b0160000 {
234 cell-index = <1>;
235 compatible = "sirf,prima2-dmac";
236 reg = <0xb0160000 0x10000>;
237 interrupts = <13>;
238 };
239
240 vip@b00C0000 {
241 compatible = "sirf,prima2-vip";
242 reg = <0xb00C0000 0x10000>;
243 };
244
245 spi0: spi@b00d0000 {
246 cell-index = <0>;
247 compatible = "sirf,prima2-spi";
248 reg = <0xb00d0000 0x10000>;
249 interrupts = <15>;
250 };
251
252 spi1: spi@b0170000 {
253 cell-index = <1>;
254 compatible = "sirf,prima2-spi";
255 reg = <0xb0170000 0x10000>;
256 interrupts = <16>;
257 };
258
259 i2c0: i2c@b00e0000 {
260 cell-index = <0>;
261 compatible = "sirf,prima2-i2c";
262 reg = <0xb00e0000 0x10000>;
263 interrupts = <24>;
264 };
265
266 i2c1: i2c@b00f0000 {
267 cell-index = <1>;
268 compatible = "sirf,prima2-i2c";
269 reg = <0xb00f0000 0x10000>;
270 interrupts = <25>;
271 };
272
273 tsc@b0110000 {
274 compatible = "sirf,prima2-tsc";
275 reg = <0xb0110000 0x10000>;
276 interrupts = <33>;
277 };
278
279 gpio: gpio-controller@b0120000 {
280 #gpio-cells = <2>;
281 #interrupt-cells = <2>;
282 compatible = "sirf,prima2-gpio";
283 reg = <0xb0120000 0x10000>;
284 gpio-controller;
285 interrupt-controller;
286 };
287
288 pwm@b0130000 {
289 compatible = "sirf,prima2-pwm";
290 reg = <0xb0130000 0x10000>;
291 };
292
293 efusesys@b0140000 {
294 compatible = "sirf,prima2-efuse";
295 reg = <0xb0140000 0x10000>;
296 };
297
298 pulsec@b0150000 {
299 compatible = "sirf,prima2-pulsec";
300 reg = <0xb0150000 0x10000>;
301 interrupts = <48>;
302 };
303
304 pci-iobg {
305 compatible = "sirf,prima2-pciiobg", "simple-bus";
306 #address-cells = <1>;
307 #size-cells = <1>;
308 ranges = <0x56000000 0x56000000 0x1b00000>;
309
310 sd0: sdhci@56000000 {
311 cell-index = <0>;
312 compatible = "sirf,prima2-sdhc";
313 reg = <0x56000000 0x100000>;
314 interrupts = <38>;
315 };
316
317 sd1: sdhci@56100000 {
318 cell-index = <1>;
319 compatible = "sirf,prima2-sdhc";
320 reg = <0x56100000 0x100000>;
321 interrupts = <38>;
322 };
323
324 sd2: sdhci@56200000 {
325 cell-index = <2>;
326 compatible = "sirf,prima2-sdhc";
327 reg = <0x56200000 0x100000>;
328 interrupts = <23>;
329 };
330
331 sd3: sdhci@56300000 {
332 cell-index = <3>;
333 compatible = "sirf,prima2-sdhc";
334 reg = <0x56300000 0x100000>;
335 interrupts = <23>;
336 };
337
338 sd4: sdhci@56400000 {
339 cell-index = <4>;
340 compatible = "sirf,prima2-sdhc";
341 reg = <0x56400000 0x100000>;
342 interrupts = <39>;
343 };
344
345 sd5: sdhci@56500000 {
346 cell-index = <5>;
347 compatible = "sirf,prima2-sdhc";
348 reg = <0x56500000 0x100000>;
349 interrupts = <39>;
350 };
351
352 pci-copy@57900000 {
353 compatible = "sirf,prima2-pcicp";
354 reg = <0x57900000 0x100000>;
355 interrupts = <40>;
356 };
357
358 rom-interface@57a00000 {
359 compatible = "sirf,prima2-romif";
360 reg = <0x57a00000 0x100000>;
361 };
362 };
363 };
364
365 rtc-iobg {
366 compatible = "sirf,prima2-rtciobg", "simple-bus";
367 #address-cells = <1>;
368 #size-cells = <1>;
369 reg = <0x80030000 0x10000>;
370
371 gpsrtc@1000 {
372 compatible = "sirf,prima2-gpsrtc";
373 reg = <0x1000 0x1000>;
374 interrupts = <55 56 57>;
375 };
376
377 sysrtc@2000 {
378 compatible = "sirf,prima2-sysrtc";
379 reg = <0x2000 0x1000>;
380 interrupts = <52 53 54>;
381 };
382
383 pwrc@3000 {
384 compatible = "sirf,prima2-pwrc";
385 reg = <0x3000 0x1000>;
386 interrupts = <32>;
387 };
388 };
389
390 uus-iobg {
391 compatible = "simple-bus";
392 #address-cells = <1>;
393 #size-cells = <1>;
394 ranges = <0xb8000000 0xb8000000 0x40000>;
395
396 usb0: usb@b00e0000 {
397 compatible = "chipidea,ci13611a-prima2";
398 reg = <0xb8000000 0x10000>;
399 interrupts = <10>;
400 };
401
402 usb1: usb@b00f0000 {
403 compatible = "chipidea,ci13611a-prima2";
404 reg = <0xb8010000 0x10000>;
405 interrupts = <11>;
406 };
407
408 sata@b00f0000 {
409 compatible = "synopsys,dwc-ahsata";
410 reg = <0xb8020000 0x10000>;
411 interrupts = <37>;
412 };
413
414 security@b00f0000 {
415 compatible = "sirf,prima2-security";
416 reg = <0xb8030000 0x10000>;
417 interrupts = <42>;
418 };
419 };
420 };
421};