Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1 | /* |
| 2 | * drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c |
| 3 | * Copyright (c) 2015 Mellanox Technologies. All rights reserved. |
| 4 | * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com> |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions are met: |
| 8 | * |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
| 14 | * 3. Neither the names of the copyright holders nor the names of its |
| 15 | * contributors may be used to endorse or promote products derived from |
| 16 | * this software without specific prior written permission. |
| 17 | * |
| 18 | * Alternatively, this software may be distributed under the terms of the |
| 19 | * GNU General Public License ("GPL") version 2 as published by the Free |
| 20 | * Software Foundation. |
| 21 | * |
| 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 25 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
| 26 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 32 | * POSSIBILITY OF SUCH DAMAGE. |
| 33 | */ |
| 34 | |
| 35 | #include <linux/kernel.h> |
| 36 | #include <linux/types.h> |
Ido Schimmel | dd6cb0f | 2016-04-06 17:10:01 +0200 | [diff] [blame] | 37 | #include <linux/dcbnl.h> |
Ido Schimmel | ff6551e | 2016-04-06 17:10:03 +0200 | [diff] [blame] | 38 | #include <linux/if_ether.h> |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 39 | |
| 40 | #include "spectrum.h" |
| 41 | #include "core.h" |
| 42 | #include "port.h" |
| 43 | #include "reg.h" |
| 44 | |
Jiri Pirko | 078f9c7 | 2016-04-14 18:19:19 +0200 | [diff] [blame^] | 45 | static struct mlxsw_sp_sb_pr *mlxsw_sp_sb_pr_get(struct mlxsw_sp *mlxsw_sp, |
| 46 | u8 pool, |
| 47 | enum mlxsw_reg_sbxx_dir dir) |
| 48 | { |
| 49 | return &mlxsw_sp->sb.prs[dir][pool]; |
| 50 | } |
| 51 | |
| 52 | static struct mlxsw_sp_sb_cm *mlxsw_sp_sb_cm_get(struct mlxsw_sp *mlxsw_sp, |
| 53 | u8 local_port, u8 pg_buff, |
| 54 | enum mlxsw_reg_sbxx_dir dir) |
| 55 | { |
| 56 | return &mlxsw_sp->sb.ports[local_port].cms[dir][pg_buff]; |
| 57 | } |
| 58 | |
| 59 | static struct mlxsw_sp_sb_pm *mlxsw_sp_sb_pm_get(struct mlxsw_sp *mlxsw_sp, |
| 60 | u8 local_port, u8 pool, |
| 61 | enum mlxsw_reg_sbxx_dir dir) |
| 62 | { |
| 63 | return &mlxsw_sp->sb.ports[local_port].pms[dir][pool]; |
| 64 | } |
| 65 | |
Jiri Pirko | 94266e3 | 2016-04-14 18:19:16 +0200 | [diff] [blame] | 66 | static int mlxsw_sp_sb_pr_write(struct mlxsw_sp *mlxsw_sp, u8 pool, |
| 67 | enum mlxsw_reg_sbxx_dir dir, |
| 68 | enum mlxsw_reg_sbpr_mode mode, u32 size) |
| 69 | { |
| 70 | char sbpr_pl[MLXSW_REG_SBPR_LEN]; |
Jiri Pirko | 078f9c7 | 2016-04-14 18:19:19 +0200 | [diff] [blame^] | 71 | struct mlxsw_sp_sb_pr *pr; |
| 72 | int err; |
Jiri Pirko | 94266e3 | 2016-04-14 18:19:16 +0200 | [diff] [blame] | 73 | |
| 74 | mlxsw_reg_sbpr_pack(sbpr_pl, pool, dir, mode, size); |
Jiri Pirko | 078f9c7 | 2016-04-14 18:19:19 +0200 | [diff] [blame^] | 75 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpr), sbpr_pl); |
| 76 | if (err) |
| 77 | return err; |
| 78 | |
| 79 | pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool, dir); |
| 80 | pr->mode = mode; |
| 81 | pr->size = size; |
| 82 | return 0; |
Jiri Pirko | 94266e3 | 2016-04-14 18:19:16 +0200 | [diff] [blame] | 83 | } |
| 84 | |
| 85 | static int mlxsw_sp_sb_cm_write(struct mlxsw_sp *mlxsw_sp, u8 local_port, |
| 86 | u8 pg_buff, enum mlxsw_reg_sbxx_dir dir, |
| 87 | u32 min_buff, u32 max_buff, u8 pool) |
| 88 | { |
| 89 | char sbcm_pl[MLXSW_REG_SBCM_LEN]; |
Jiri Pirko | 078f9c7 | 2016-04-14 18:19:19 +0200 | [diff] [blame^] | 90 | int err; |
Jiri Pirko | 94266e3 | 2016-04-14 18:19:16 +0200 | [diff] [blame] | 91 | |
| 92 | mlxsw_reg_sbcm_pack(sbcm_pl, local_port, pg_buff, dir, |
| 93 | min_buff, max_buff, pool); |
Jiri Pirko | 078f9c7 | 2016-04-14 18:19:19 +0200 | [diff] [blame^] | 94 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbcm), sbcm_pl); |
| 95 | if (err) |
| 96 | return err; |
| 97 | if (pg_buff < MLXSW_SP_SB_TC_COUNT) { |
| 98 | struct mlxsw_sp_sb_cm *cm; |
| 99 | |
| 100 | cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port, pg_buff, dir); |
| 101 | cm->min_buff = min_buff; |
| 102 | cm->max_buff = max_buff; |
| 103 | cm->pool = pool; |
| 104 | } |
| 105 | return 0; |
Jiri Pirko | 94266e3 | 2016-04-14 18:19:16 +0200 | [diff] [blame] | 106 | } |
| 107 | |
| 108 | static int mlxsw_sp_sb_pm_write(struct mlxsw_sp *mlxsw_sp, u8 local_port, |
| 109 | u8 pool, enum mlxsw_reg_sbxx_dir dir, |
| 110 | u32 min_buff, u32 max_buff) |
| 111 | { |
| 112 | char sbpm_pl[MLXSW_REG_SBPM_LEN]; |
Jiri Pirko | 078f9c7 | 2016-04-14 18:19:19 +0200 | [diff] [blame^] | 113 | struct mlxsw_sp_sb_pm *pm; |
| 114 | int err; |
Jiri Pirko | 94266e3 | 2016-04-14 18:19:16 +0200 | [diff] [blame] | 115 | |
| 116 | mlxsw_reg_sbpm_pack(sbpm_pl, local_port, pool, dir, min_buff, max_buff); |
Jiri Pirko | 078f9c7 | 2016-04-14 18:19:19 +0200 | [diff] [blame^] | 117 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl); |
| 118 | if (err) |
| 119 | return err; |
| 120 | |
| 121 | pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port, pool, dir); |
| 122 | pm->min_buff = min_buff; |
| 123 | pm->max_buff = max_buff; |
| 124 | return 0; |
Jiri Pirko | 94266e3 | 2016-04-14 18:19:16 +0200 | [diff] [blame] | 125 | } |
| 126 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 127 | static const u16 mlxsw_sp_pbs[] = { |
| 128 | 2 * MLXSW_SP_BYTES_TO_CELLS(ETH_FRAME_LEN), |
| 129 | 0, |
| 130 | 0, |
| 131 | 0, |
| 132 | 0, |
| 133 | 0, |
| 134 | 0, |
| 135 | 0, |
| 136 | 0, /* Unused */ |
| 137 | 2 * MLXSW_SP_BYTES_TO_CELLS(MLXSW_PORT_MAX_MTU), |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 138 | }; |
| 139 | |
| 140 | #define MLXSW_SP_PBS_LEN ARRAY_SIZE(mlxsw_sp_pbs) |
| 141 | |
| 142 | static int mlxsw_sp_port_pb_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 143 | { |
| 144 | char pbmc_pl[MLXSW_REG_PBMC_LEN]; |
| 145 | int i; |
| 146 | |
| 147 | mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, |
| 148 | 0xffff, 0xffff / 2); |
| 149 | for (i = 0; i < MLXSW_SP_PBS_LEN; i++) { |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 150 | if (i == 8) |
| 151 | continue; |
| 152 | mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, i, mlxsw_sp_pbs[i]); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 153 | } |
Ido Schimmel | d6b7c13 | 2016-04-06 17:10:05 +0200 | [diff] [blame] | 154 | mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, |
| 155 | MLXSW_REG_PBMC_PORT_SHARED_BUF_IDX, 0); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 156 | return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, |
| 157 | MLXSW_REG(pbmc), pbmc_pl); |
| 158 | } |
| 159 | |
Ido Schimmel | dd6cb0f | 2016-04-06 17:10:01 +0200 | [diff] [blame] | 160 | static int mlxsw_sp_port_pb_prio_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 161 | { |
| 162 | char pptb_pl[MLXSW_REG_PPTB_LEN]; |
| 163 | int i; |
| 164 | |
| 165 | mlxsw_reg_pptb_pack(pptb_pl, mlxsw_sp_port->local_port); |
| 166 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) |
| 167 | mlxsw_reg_pptb_prio_to_buff_set(pptb_pl, i, 0); |
| 168 | return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pptb), |
| 169 | pptb_pl); |
| 170 | } |
| 171 | |
| 172 | static int mlxsw_sp_port_headroom_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 173 | { |
| 174 | int err; |
| 175 | |
| 176 | err = mlxsw_sp_port_pb_init(mlxsw_sp_port); |
| 177 | if (err) |
| 178 | return err; |
| 179 | return mlxsw_sp_port_pb_prio_init(mlxsw_sp_port); |
| 180 | } |
| 181 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 182 | #define MLXSW_SP_SB_PR_INGRESS_SIZE \ |
Ido Schimmel | 1a19844 | 2016-04-06 17:10:02 +0200 | [diff] [blame] | 183 | (15000000 - (2 * 20000 * MLXSW_PORT_MAX_PORTS)) |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 184 | #define MLXSW_SP_SB_PR_EGRESS_SIZE \ |
Ido Schimmel | 1a19844 | 2016-04-06 17:10:02 +0200 | [diff] [blame] | 185 | (14000000 - (8 * 1500 * MLXSW_PORT_MAX_PORTS)) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 186 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 187 | #define MLXSW_SP_SB_PR(_mode, _size) \ |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 188 | { \ |
| 189 | .mode = _mode, \ |
| 190 | .size = _size, \ |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 191 | } |
| 192 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 193 | static const struct mlxsw_sp_sb_pr mlxsw_sp_sb_prs_ingress[] = { |
| 194 | MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, |
| 195 | MLXSW_SP_BYTES_TO_CELLS(MLXSW_SP_SB_PR_INGRESS_SIZE)), |
| 196 | MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0), |
| 197 | MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0), |
| 198 | MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0), |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 199 | }; |
| 200 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 201 | #define MLXSW_SP_SB_PRS_INGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_prs_ingress) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 202 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 203 | static const struct mlxsw_sp_sb_pr mlxsw_sp_sb_prs_egress[] = { |
| 204 | MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, |
| 205 | MLXSW_SP_BYTES_TO_CELLS(MLXSW_SP_SB_PR_EGRESS_SIZE)), |
| 206 | MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0), |
| 207 | MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0), |
| 208 | MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, |
| 209 | MLXSW_SP_BYTES_TO_CELLS(MLXSW_SP_SB_PR_EGRESS_SIZE)), |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 210 | }; |
| 211 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 212 | #define MLXSW_SP_SB_PRS_EGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_prs_egress) |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 213 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 214 | static int __mlxsw_sp_sb_prs_init(struct mlxsw_sp *mlxsw_sp, |
| 215 | enum mlxsw_reg_sbxx_dir dir, |
| 216 | const struct mlxsw_sp_sb_pr *prs, |
| 217 | size_t prs_len) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 218 | { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 219 | int i; |
| 220 | int err; |
| 221 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 222 | for (i = 0; i < prs_len; i++) { |
| 223 | const struct mlxsw_sp_sb_pr *pr; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 224 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 225 | pr = &prs[i]; |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 226 | err = mlxsw_sp_sb_pr_write(mlxsw_sp, i, dir, |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 227 | pr->mode, pr->size); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 228 | if (err) |
| 229 | return err; |
| 230 | } |
| 231 | return 0; |
| 232 | } |
| 233 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 234 | static int mlxsw_sp_sb_prs_init(struct mlxsw_sp *mlxsw_sp) |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 235 | { |
| 236 | int err; |
| 237 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 238 | err = __mlxsw_sp_sb_prs_init(mlxsw_sp, MLXSW_REG_SBXX_DIR_INGRESS, |
| 239 | mlxsw_sp_sb_prs_ingress, |
| 240 | MLXSW_SP_SB_PRS_INGRESS_LEN); |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 241 | if (err) |
| 242 | return err; |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 243 | return __mlxsw_sp_sb_prs_init(mlxsw_sp, MLXSW_REG_SBXX_DIR_EGRESS, |
| 244 | mlxsw_sp_sb_prs_egress, |
| 245 | MLXSW_SP_SB_PRS_EGRESS_LEN); |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 246 | } |
| 247 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 248 | #define MLXSW_SP_SB_CM(_min_buff, _max_buff, _pool) \ |
| 249 | { \ |
| 250 | .min_buff = _min_buff, \ |
| 251 | .max_buff = _max_buff, \ |
| 252 | .pool = _pool, \ |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 253 | } |
| 254 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 255 | static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms_ingress[] = { |
| 256 | MLXSW_SP_SB_CM(MLXSW_SP_BYTES_TO_CELLS(10000), 8, 0), |
| 257 | MLXSW_SP_SB_CM(0, 0, 0), |
| 258 | MLXSW_SP_SB_CM(0, 0, 0), |
| 259 | MLXSW_SP_SB_CM(0, 0, 0), |
| 260 | MLXSW_SP_SB_CM(0, 0, 0), |
| 261 | MLXSW_SP_SB_CM(0, 0, 0), |
| 262 | MLXSW_SP_SB_CM(0, 0, 0), |
| 263 | MLXSW_SP_SB_CM(0, 0, 0), |
| 264 | MLXSW_SP_SB_CM(0, 0, 0), /* dummy, this PG does not exist */ |
| 265 | MLXSW_SP_SB_CM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 266 | }; |
| 267 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 268 | #define MLXSW_SP_SB_CMS_INGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_cms_ingress) |
| 269 | |
| 270 | static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms_egress[] = { |
| 271 | MLXSW_SP_SB_CM(MLXSW_SP_BYTES_TO_CELLS(1500), 9, 0), |
| 272 | MLXSW_SP_SB_CM(MLXSW_SP_BYTES_TO_CELLS(1500), 9, 0), |
| 273 | MLXSW_SP_SB_CM(MLXSW_SP_BYTES_TO_CELLS(1500), 9, 0), |
| 274 | MLXSW_SP_SB_CM(MLXSW_SP_BYTES_TO_CELLS(1500), 9, 0), |
| 275 | MLXSW_SP_SB_CM(MLXSW_SP_BYTES_TO_CELLS(1500), 9, 0), |
| 276 | MLXSW_SP_SB_CM(MLXSW_SP_BYTES_TO_CELLS(1500), 9, 0), |
| 277 | MLXSW_SP_SB_CM(MLXSW_SP_BYTES_TO_CELLS(1500), 9, 0), |
| 278 | MLXSW_SP_SB_CM(MLXSW_SP_BYTES_TO_CELLS(1500), 9, 0), |
| 279 | MLXSW_SP_SB_CM(0, 0, 0), |
| 280 | MLXSW_SP_SB_CM(0, 0, 0), |
| 281 | MLXSW_SP_SB_CM(0, 0, 0), |
| 282 | MLXSW_SP_SB_CM(0, 0, 0), |
| 283 | MLXSW_SP_SB_CM(0, 0, 0), |
| 284 | MLXSW_SP_SB_CM(0, 0, 0), |
| 285 | MLXSW_SP_SB_CM(0, 0, 0), |
| 286 | MLXSW_SP_SB_CM(0, 0, 0), |
| 287 | MLXSW_SP_SB_CM(1, 0xff, 0), |
| 288 | }; |
| 289 | |
| 290 | #define MLXSW_SP_SB_CMS_EGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_cms_egress) |
| 291 | |
| 292 | #define MLXSW_SP_CPU_PORT_SB_CM MLXSW_SP_SB_CM(104, 2, 3) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 293 | |
| 294 | static const struct mlxsw_sp_sb_cm mlxsw_sp_cpu_port_sb_cms[] = { |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 295 | MLXSW_SP_CPU_PORT_SB_CM, |
| 296 | MLXSW_SP_CPU_PORT_SB_CM, |
| 297 | MLXSW_SP_CPU_PORT_SB_CM, |
| 298 | MLXSW_SP_CPU_PORT_SB_CM, |
| 299 | MLXSW_SP_CPU_PORT_SB_CM, |
| 300 | MLXSW_SP_CPU_PORT_SB_CM, |
| 301 | MLXSW_SP_CPU_PORT_SB_CM, |
| 302 | MLXSW_SP_CPU_PORT_SB_CM, |
| 303 | MLXSW_SP_CPU_PORT_SB_CM, |
| 304 | MLXSW_SP_CPU_PORT_SB_CM, |
| 305 | MLXSW_SP_CPU_PORT_SB_CM, |
| 306 | MLXSW_SP_CPU_PORT_SB_CM, |
| 307 | MLXSW_SP_CPU_PORT_SB_CM, |
| 308 | MLXSW_SP_CPU_PORT_SB_CM, |
| 309 | MLXSW_SP_CPU_PORT_SB_CM, |
| 310 | MLXSW_SP_CPU_PORT_SB_CM, |
| 311 | MLXSW_SP_CPU_PORT_SB_CM, |
| 312 | MLXSW_SP_CPU_PORT_SB_CM, |
| 313 | MLXSW_SP_CPU_PORT_SB_CM, |
| 314 | MLXSW_SP_CPU_PORT_SB_CM, |
| 315 | MLXSW_SP_CPU_PORT_SB_CM, |
| 316 | MLXSW_SP_CPU_PORT_SB_CM, |
| 317 | MLXSW_SP_CPU_PORT_SB_CM, |
| 318 | MLXSW_SP_CPU_PORT_SB_CM, |
| 319 | MLXSW_SP_CPU_PORT_SB_CM, |
| 320 | MLXSW_SP_CPU_PORT_SB_CM, |
| 321 | MLXSW_SP_CPU_PORT_SB_CM, |
| 322 | MLXSW_SP_CPU_PORT_SB_CM, |
| 323 | MLXSW_SP_CPU_PORT_SB_CM, |
| 324 | MLXSW_SP_CPU_PORT_SB_CM, |
| 325 | MLXSW_SP_CPU_PORT_SB_CM, |
| 326 | MLXSW_SP_CPU_PORT_SB_CM, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 327 | }; |
| 328 | |
| 329 | #define MLXSW_SP_CPU_PORT_SB_MCS_LEN \ |
| 330 | ARRAY_SIZE(mlxsw_sp_cpu_port_sb_cms) |
| 331 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 332 | static int __mlxsw_sp_sb_cms_init(struct mlxsw_sp *mlxsw_sp, u8 local_port, |
| 333 | enum mlxsw_reg_sbxx_dir dir, |
| 334 | const struct mlxsw_sp_sb_cm *cms, |
| 335 | size_t cms_len) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 336 | { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 337 | int i; |
| 338 | int err; |
| 339 | |
| 340 | for (i = 0; i < cms_len; i++) { |
| 341 | const struct mlxsw_sp_sb_cm *cm; |
| 342 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 343 | if (i == 8 && dir == MLXSW_REG_SBXX_DIR_INGRESS) |
| 344 | continue; /* PG number 8 does not exist, skip it */ |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 345 | cm = &cms[i]; |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 346 | err = mlxsw_sp_sb_cm_write(mlxsw_sp, local_port, i, dir, |
| 347 | cm->min_buff, cm->max_buff, |
| 348 | cm->pool); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 349 | if (err) |
| 350 | return err; |
| 351 | } |
| 352 | return 0; |
| 353 | } |
| 354 | |
| 355 | static int mlxsw_sp_port_sb_cms_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 356 | { |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 357 | int err; |
| 358 | |
| 359 | err = __mlxsw_sp_sb_cms_init(mlxsw_sp_port->mlxsw_sp, |
| 360 | mlxsw_sp_port->local_port, |
| 361 | MLXSW_REG_SBXX_DIR_INGRESS, |
| 362 | mlxsw_sp_sb_cms_ingress, |
| 363 | MLXSW_SP_SB_CMS_INGRESS_LEN); |
| 364 | if (err) |
| 365 | return err; |
| 366 | return __mlxsw_sp_sb_cms_init(mlxsw_sp_port->mlxsw_sp, |
| 367 | mlxsw_sp_port->local_port, |
| 368 | MLXSW_REG_SBXX_DIR_EGRESS, |
| 369 | mlxsw_sp_sb_cms_egress, |
| 370 | MLXSW_SP_SB_CMS_EGRESS_LEN); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 371 | } |
| 372 | |
| 373 | static int mlxsw_sp_cpu_port_sb_cms_init(struct mlxsw_sp *mlxsw_sp) |
| 374 | { |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 375 | return __mlxsw_sp_sb_cms_init(mlxsw_sp, 0, MLXSW_REG_SBXX_DIR_EGRESS, |
| 376 | mlxsw_sp_cpu_port_sb_cms, |
| 377 | MLXSW_SP_CPU_PORT_SB_MCS_LEN); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 378 | } |
| 379 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 380 | #define MLXSW_SP_SB_PM(_min_buff, _max_buff) \ |
| 381 | { \ |
| 382 | .min_buff = _min_buff, \ |
| 383 | .max_buff = _max_buff, \ |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 384 | } |
| 385 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 386 | static const struct mlxsw_sp_sb_pm mlxsw_sp_sb_pms_ingress[] = { |
| 387 | MLXSW_SP_SB_PM(0, 0xff), |
| 388 | MLXSW_SP_SB_PM(0, 0), |
| 389 | MLXSW_SP_SB_PM(0, 0), |
| 390 | MLXSW_SP_SB_PM(0, 0), |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 391 | }; |
| 392 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 393 | #define MLXSW_SP_SB_PMS_INGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_pms_ingress) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 394 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 395 | static const struct mlxsw_sp_sb_pm mlxsw_sp_sb_pms_egress[] = { |
| 396 | MLXSW_SP_SB_PM(0, 7), |
| 397 | MLXSW_SP_SB_PM(0, 0), |
| 398 | MLXSW_SP_SB_PM(0, 0), |
| 399 | MLXSW_SP_SB_PM(0, 0), |
| 400 | }; |
| 401 | |
| 402 | #define MLXSW_SP_SB_PMS_EGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_pms_egress) |
| 403 | |
| 404 | static int __mlxsw_sp_port_sb_pms_init(struct mlxsw_sp *mlxsw_sp, u8 local_port, |
| 405 | enum mlxsw_reg_sbxx_dir dir, |
| 406 | const struct mlxsw_sp_sb_pm *pms, |
| 407 | size_t pms_len) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 408 | { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 409 | int i; |
| 410 | int err; |
| 411 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 412 | for (i = 0; i < pms_len; i++) { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 413 | const struct mlxsw_sp_sb_pm *pm; |
| 414 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 415 | pm = &pms[i]; |
| 416 | err = mlxsw_sp_sb_pm_write(mlxsw_sp, local_port, i, dir, |
Jiri Pirko | 94266e3 | 2016-04-14 18:19:16 +0200 | [diff] [blame] | 417 | pm->min_buff, pm->max_buff); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 418 | if (err) |
| 419 | return err; |
| 420 | } |
| 421 | return 0; |
| 422 | } |
| 423 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 424 | static int mlxsw_sp_port_sb_pms_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 425 | { |
| 426 | int err; |
| 427 | |
| 428 | err = __mlxsw_sp_port_sb_pms_init(mlxsw_sp_port->mlxsw_sp, |
| 429 | mlxsw_sp_port->local_port, |
| 430 | MLXSW_REG_SBXX_DIR_INGRESS, |
| 431 | mlxsw_sp_sb_pms_ingress, |
| 432 | MLXSW_SP_SB_PMS_INGRESS_LEN); |
| 433 | if (err) |
| 434 | return err; |
| 435 | return __mlxsw_sp_port_sb_pms_init(mlxsw_sp_port->mlxsw_sp, |
| 436 | mlxsw_sp_port->local_port, |
| 437 | MLXSW_REG_SBXX_DIR_EGRESS, |
| 438 | mlxsw_sp_sb_pms_egress, |
| 439 | MLXSW_SP_SB_PMS_EGRESS_LEN); |
| 440 | } |
| 441 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 442 | struct mlxsw_sp_sb_mm { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 443 | u32 min_buff; |
| 444 | u32 max_buff; |
| 445 | u8 pool; |
| 446 | }; |
| 447 | |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 448 | #define MLXSW_SP_SB_MM(_min_buff, _max_buff, _pool) \ |
| 449 | { \ |
| 450 | .min_buff = _min_buff, \ |
| 451 | .max_buff = _max_buff, \ |
| 452 | .pool = _pool, \ |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 453 | } |
| 454 | |
| 455 | static const struct mlxsw_sp_sb_mm mlxsw_sp_sb_mms[] = { |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 456 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 457 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 458 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 459 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 460 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 461 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 462 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 463 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 464 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 465 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 466 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 467 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 468 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 469 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
| 470 | MLXSW_SP_SB_MM(MLXSW_SP_BYTES_TO_CELLS(20000), 0xff, 0), |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 471 | }; |
| 472 | |
| 473 | #define MLXSW_SP_SB_MMS_LEN ARRAY_SIZE(mlxsw_sp_sb_mms) |
| 474 | |
| 475 | static int mlxsw_sp_sb_mms_init(struct mlxsw_sp *mlxsw_sp) |
| 476 | { |
| 477 | char sbmm_pl[MLXSW_REG_SBMM_LEN]; |
| 478 | int i; |
| 479 | int err; |
| 480 | |
| 481 | for (i = 0; i < MLXSW_SP_SB_MMS_LEN; i++) { |
| 482 | const struct mlxsw_sp_sb_mm *mc; |
| 483 | |
| 484 | mc = &mlxsw_sp_sb_mms[i]; |
Jiri Pirko | b11c3b4 | 2016-04-14 18:19:17 +0200 | [diff] [blame] | 485 | mlxsw_reg_sbmm_pack(sbmm_pl, i, mc->min_buff, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 486 | mc->max_buff, mc->pool); |
| 487 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbmm), sbmm_pl); |
| 488 | if (err) |
| 489 | return err; |
| 490 | } |
| 491 | return 0; |
| 492 | } |
| 493 | |
| 494 | int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp) |
| 495 | { |
| 496 | int err; |
| 497 | |
Jiri Pirko | aa99bc7 | 2016-04-14 18:19:18 +0200 | [diff] [blame] | 498 | err = mlxsw_sp_sb_prs_init(mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 499 | if (err) |
| 500 | return err; |
| 501 | err = mlxsw_sp_cpu_port_sb_cms_init(mlxsw_sp); |
| 502 | if (err) |
| 503 | return err; |
| 504 | err = mlxsw_sp_sb_mms_init(mlxsw_sp); |
| 505 | |
| 506 | return err; |
| 507 | } |
| 508 | |
| 509 | int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 510 | { |
| 511 | int err; |
| 512 | |
Ido Schimmel | dd6cb0f | 2016-04-06 17:10:01 +0200 | [diff] [blame] | 513 | err = mlxsw_sp_port_headroom_init(mlxsw_sp_port); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 514 | if (err) |
| 515 | return err; |
| 516 | err = mlxsw_sp_port_sb_cms_init(mlxsw_sp_port); |
| 517 | if (err) |
| 518 | return err; |
| 519 | err = mlxsw_sp_port_sb_pms_init(mlxsw_sp_port); |
| 520 | |
| 521 | return err; |
| 522 | } |