blob: 720088396bb917a89552bedf521487c425649b58 [file] [log] [blame]
Francois Romieu890e8d02005-07-30 13:08:43 +02001/*
2 sis190.c: Silicon Integrated Systems SiS190 ethernet driver
3
4 Copyright (c) 2003 K.M. Liu <kmliu@sis.com>
5 Copyright (c) 2003, 2004 Jeff Garzik <jgarzik@pobox.com>
6 Copyright (c) 2003, 2004, 2005 Francois Romieu <romieu@fr.zoreil.com>
7
Francois Romieu40292fb2005-07-30 13:12:06 +02008 Based on r8169.c, tg3.c, 8139cp.c, skge.c, epic100.c and SiS 190/191
9 genuine driver.
Francois Romieu890e8d02005-07-30 13:08:43 +020010
11 This software may be used and distributed according to the terms of
12 the GNU General Public License (GPL), incorporated herein by reference.
13 Drivers based on or derived from this code fall under the GPL and must
14 retain the authorship, copyright and license notice. This file is not
15 a complete program and may only be used when the entire operating
16 system is licensed under the GPL.
17
18 See the file COPYING in this distribution for more information.
19
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/netdevice.h>
Francois Romieu43afb942005-07-30 13:10:21 +020025#include <linux/rtnetlink.h>
Francois Romieu890e8d02005-07-30 13:08:43 +020026#include <linux/etherdevice.h>
27#include <linux/ethtool.h>
28#include <linux/pci.h>
29#include <linux/mii.h>
30#include <linux/delay.h>
31#include <linux/crc32.h>
32#include <linux/dma-mapping.h>
33#include <asm/irq.h>
34
35#define net_drv(p, arg...) if (netif_msg_drv(p)) \
36 printk(arg)
37#define net_probe(p, arg...) if (netif_msg_probe(p)) \
38 printk(arg)
39#define net_link(p, arg...) if (netif_msg_link(p)) \
40 printk(arg)
41#define net_intr(p, arg...) if (netif_msg_intr(p)) \
42 printk(arg)
43#define net_tx_err(p, arg...) if (netif_msg_tx_err(p)) \
44 printk(arg)
45
Francois Romieufcb98212005-07-30 13:15:22 +020046#define PHY_MAX_ADDR 32
47#define PHY_ID_ANY 0x1f
48#define MII_REG_ANY 0x1f
49
Stephen Hemmingerbea33482007-10-03 16:41:36 -070050#define DRV_VERSION "1.2"
Francois Romieu890e8d02005-07-30 13:08:43 +020051#define DRV_NAME "sis190"
52#define SIS190_DRIVER_NAME DRV_NAME " Gigabit Ethernet driver " DRV_VERSION
53#define PFX DRV_NAME ": "
54
Francois Romieu890e8d02005-07-30 13:08:43 +020055#define sis190_rx_skb netif_rx
56#define sis190_rx_quota(count, quota) count
Francois Romieu890e8d02005-07-30 13:08:43 +020057
58#define MAC_ADDR_LEN 6
59
Francois Romieubcad5e52005-07-30 13:13:47 +020060#define NUM_TX_DESC 64 /* [8..1024] */
61#define NUM_RX_DESC 64 /* [8..8192] */
Francois Romieu890e8d02005-07-30 13:08:43 +020062#define TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
63#define RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
64#define RX_BUF_SIZE 1536
Francois Romieu8b5641d2005-07-30 13:13:03 +020065#define RX_BUF_MASK 0xfff8
Francois Romieu890e8d02005-07-30 13:08:43 +020066
67#define SIS190_REGS_SIZE 0x80
68#define SIS190_TX_TIMEOUT (6*HZ)
69#define SIS190_PHY_TIMEOUT (10*HZ)
70#define SIS190_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | \
71 NETIF_MSG_LINK | NETIF_MSG_IFUP | \
72 NETIF_MSG_IFDOWN)
73
74/* Enhanced PHY access register bit definitions */
75#define EhnMIIread 0x0000
76#define EhnMIIwrite 0x0020
77#define EhnMIIdataShift 16
78#define EhnMIIpmdShift 6 /* 7016 only */
79#define EhnMIIregShift 11
80#define EhnMIIreq 0x0010
81#define EhnMIInotDone 0x0010
82
83/* Write/read MMIO register */
84#define SIS_W8(reg, val) writeb ((val), ioaddr + (reg))
85#define SIS_W16(reg, val) writew ((val), ioaddr + (reg))
86#define SIS_W32(reg, val) writel ((val), ioaddr + (reg))
87#define SIS_R8(reg) readb (ioaddr + (reg))
88#define SIS_R16(reg) readw (ioaddr + (reg))
89#define SIS_R32(reg) readl (ioaddr + (reg))
90
91#define SIS_PCI_COMMIT() SIS_R32(IntrControl)
92
93enum sis190_registers {
94 TxControl = 0x00,
95 TxDescStartAddr = 0x04,
Francois Romieu188f23b2005-07-30 13:11:43 +020096 rsv0 = 0x08, // reserved
97 TxSts = 0x0c, // unused (Control/Status)
Francois Romieu890e8d02005-07-30 13:08:43 +020098 RxControl = 0x10,
99 RxDescStartAddr = 0x14,
Francois Romieu188f23b2005-07-30 13:11:43 +0200100 rsv1 = 0x18, // reserved
101 RxSts = 0x1c, // unused
Francois Romieu890e8d02005-07-30 13:08:43 +0200102 IntrStatus = 0x20,
103 IntrMask = 0x24,
104 IntrControl = 0x28,
Francois Romieu188f23b2005-07-30 13:11:43 +0200105 IntrTimer = 0x2c, // unused (Interupt Timer)
106 PMControl = 0x30, // unused (Power Mgmt Control/Status)
107 rsv2 = 0x34, // reserved
Francois Romieu890e8d02005-07-30 13:08:43 +0200108 ROMControl = 0x38,
109 ROMInterface = 0x3c,
110 StationControl = 0x40,
111 GMIIControl = 0x44,
Francois Romieu188f23b2005-07-30 13:11:43 +0200112 GIoCR = 0x48, // unused (GMAC IO Compensation)
113 GIoCtrl = 0x4c, // unused (GMAC IO Control)
Francois Romieu890e8d02005-07-30 13:08:43 +0200114 TxMacControl = 0x50,
Francois Romieu188f23b2005-07-30 13:11:43 +0200115 TxLimit = 0x54, // unused (Tx MAC Timer/TryLimit)
116 RGDelay = 0x58, // unused (RGMII Tx Internal Delay)
117 rsv3 = 0x5c, // reserved
Francois Romieu890e8d02005-07-30 13:08:43 +0200118 RxMacControl = 0x60,
119 RxMacAddr = 0x62,
120 RxHashTable = 0x68,
121 // Undocumented = 0x6c,
Francois Romieu188f23b2005-07-30 13:11:43 +0200122 RxWolCtrl = 0x70,
123 RxWolData = 0x74, // unused (Rx WOL Data Access)
124 RxMPSControl = 0x78, // unused (Rx MPS Control)
125 rsv4 = 0x7c, // reserved
Francois Romieu890e8d02005-07-30 13:08:43 +0200126};
127
128enum sis190_register_content {
129 /* IntrStatus */
130 SoftInt = 0x40000000, // unused
131 Timeup = 0x20000000, // unused
132 PauseFrame = 0x00080000, // unused
133 MagicPacket = 0x00040000, // unused
134 WakeupFrame = 0x00020000, // unused
135 LinkChange = 0x00010000,
136 RxQEmpty = 0x00000080,
137 RxQInt = 0x00000040,
138 TxQ1Empty = 0x00000020, // unused
139 TxQ1Int = 0x00000010,
140 TxQ0Empty = 0x00000008, // unused
141 TxQ0Int = 0x00000004,
142 RxHalt = 0x00000002,
143 TxHalt = 0x00000001,
144
Francois Romieu890e8d02005-07-30 13:08:43 +0200145 /* {Rx/Tx}CmdBits */
146 CmdReset = 0x10,
147 CmdRxEnb = 0x08, // unused
148 CmdTxEnb = 0x01,
149 RxBufEmpty = 0x01, // unused
150
151 /* Cfg9346Bits */
152 Cfg9346_Lock = 0x00, // unused
153 Cfg9346_Unlock = 0xc0, // unused
154
155 /* RxMacControl */
156 AcceptErr = 0x20, // unused
157 AcceptRunt = 0x10, // unused
158 AcceptBroadcast = 0x0800,
159 AcceptMulticast = 0x0400,
160 AcceptMyPhys = 0x0200,
161 AcceptAllPhys = 0x0100,
162
163 /* RxConfigBits */
164 RxCfgFIFOShift = 13,
165 RxCfgDMAShift = 8, // 0x1a in RxControl ?
166
167 /* TxConfigBits */
168 TxInterFrameGapShift = 24,
169 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
170
Francois Romieu890e8d02005-07-30 13:08:43 +0200171 LinkStatus = 0x02, // unused
172 FullDup = 0x01, // unused
173
174 /* TBICSRBit */
175 TBILinkOK = 0x02000000, // unused
176};
177
178struct TxDesc {
Francois Romieu3cec93c2005-07-30 13:14:18 +0200179 __le32 PSize;
180 __le32 status;
181 __le32 addr;
182 __le32 size;
Francois Romieu890e8d02005-07-30 13:08:43 +0200183};
184
185struct RxDesc {
Francois Romieu3cec93c2005-07-30 13:14:18 +0200186 __le32 PSize;
187 __le32 status;
188 __le32 addr;
189 __le32 size;
Francois Romieu890e8d02005-07-30 13:08:43 +0200190};
191
192enum _DescStatusBit {
193 /* _Desc.status */
Francois Romieubcad5e52005-07-30 13:13:47 +0200194 OWNbit = 0x80000000, // RXOWN/TXOWN
195 INTbit = 0x40000000, // RXINT/TXINT
196 CRCbit = 0x00020000, // CRCOFF/CRCEN
197 PADbit = 0x00010000, // PREADD/PADEN
Francois Romieu890e8d02005-07-30 13:08:43 +0200198 /* _Desc.size */
Francois Romieubcad5e52005-07-30 13:13:47 +0200199 RingEnd = 0x80000000,
200 /* TxDesc.status */
201 LSEN = 0x08000000, // TSO ? -- FR
202 IPCS = 0x04000000,
203 TCPCS = 0x02000000,
204 UDPCS = 0x01000000,
205 BSTEN = 0x00800000,
206 EXTEN = 0x00400000,
207 DEFEN = 0x00200000,
208 BKFEN = 0x00100000,
209 CRSEN = 0x00080000,
210 COLEN = 0x00040000,
211 THOL3 = 0x30000000,
212 THOL2 = 0x20000000,
213 THOL1 = 0x10000000,
214 THOL0 = 0x00000000,
215 /* RxDesc.status */
216 IPON = 0x20000000,
217 TCPON = 0x10000000,
218 UDPON = 0x08000000,
219 Wakup = 0x00400000,
220 Magic = 0x00200000,
221 Pause = 0x00100000,
222 DEFbit = 0x00200000,
223 BCAST = 0x000c0000,
224 MCAST = 0x00080000,
225 UCAST = 0x00040000,
226 /* RxDesc.PSize */
227 TAGON = 0x80000000,
228 RxDescCountMask = 0x7f000000, // multi-desc pkt when > 1 ? -- FR
229 ABORT = 0x00800000,
230 SHORT = 0x00400000,
231 LIMIT = 0x00200000,
232 MIIER = 0x00100000,
233 OVRUN = 0x00080000,
234 NIBON = 0x00040000,
235 COLON = 0x00020000,
236 CRCOK = 0x00010000,
Francois Romieu890e8d02005-07-30 13:08:43 +0200237 RxSizeMask = 0x0000ffff
Francois Romieubcad5e52005-07-30 13:13:47 +0200238 /*
239 * The asic could apparently do vlan, TSO, jumbo (sis191 only) and
240 * provide two (unused with Linux) Tx queues. No publically
241 * available documentation alas.
242 */
Francois Romieu890e8d02005-07-30 13:08:43 +0200243};
244
Francois Romieu40292fb2005-07-30 13:12:06 +0200245enum sis190_eeprom_access_register_bits {
246 EECS = 0x00000001, // unused
247 EECLK = 0x00000002, // unused
248 EEDO = 0x00000008, // unused
249 EEDI = 0x00000004, // unused
250 EEREQ = 0x00000080,
251 EEROP = 0x00000200,
252 EEWOP = 0x00000100 // unused
253};
254
Francois Romieu830fb7d2005-07-30 13:12:37 +0200255/* EEPROM Addresses */
256enum sis190_eeprom_address {
257 EEPROMSignature = 0x00,
258 EEPROMCLK = 0x01, // unused
259 EEPROMInfo = 0x02,
260 EEPROMMACAddr = 0x03
261};
262
Francois Romieu900eb9d2005-09-03 00:55:27 +0200263enum sis190_feature {
264 F_HAS_RGMII = 1,
Francois Romieuc3d6f1f2005-09-03 00:56:57 +0200265 F_PHY_88E1111 = 2,
266 F_PHY_BCM5461 = 4
Francois Romieu900eb9d2005-09-03 00:55:27 +0200267};
268
Francois Romieu890e8d02005-07-30 13:08:43 +0200269struct sis190_private {
270 void __iomem *mmio_addr;
271 struct pci_dev *pci_dev;
David Howellsc4028952006-11-22 14:57:56 +0000272 struct net_device *dev;
Francois Romieu890e8d02005-07-30 13:08:43 +0200273 spinlock_t lock;
274 u32 rx_buf_sz;
275 u32 cur_rx;
276 u32 cur_tx;
277 u32 dirty_rx;
278 u32 dirty_tx;
279 dma_addr_t rx_dma;
280 dma_addr_t tx_dma;
281 struct RxDesc *RxDescRing;
282 struct TxDesc *TxDescRing;
283 struct sk_buff *Rx_skbuff[NUM_RX_DESC];
284 struct sk_buff *Tx_skbuff[NUM_TX_DESC];
285 struct work_struct phy_task;
286 struct timer_list timer;
287 u32 msg_enable;
Francois Romieu43afb942005-07-30 13:10:21 +0200288 struct mii_if_info mii_if;
Francois Romieufcb98212005-07-30 13:15:22 +0200289 struct list_head first_phy;
Francois Romieu900eb9d2005-09-03 00:55:27 +0200290 u32 features;
Francois Romieufcb98212005-07-30 13:15:22 +0200291};
292
293struct sis190_phy {
294 struct list_head list;
295 int phy_id;
296 u16 id[2];
297 u16 status;
298 u8 type;
299};
300
301enum sis190_phy_type {
302 UNKNOWN = 0x00,
303 HOME = 0x01,
304 LAN = 0x02,
305 MIX = 0x03
306};
307
308static struct mii_chip_info {
309 const char *name;
310 u16 id[2];
311 unsigned int type;
Francois Romieu900eb9d2005-09-03 00:55:27 +0200312 u32 feature;
Francois Romieufcb98212005-07-30 13:15:22 +0200313} mii_chip_table[] = {
Francois Romieuc3d6f1f2005-09-03 00:56:57 +0200314 { "Broadcom PHY BCM5461", { 0x0020, 0x60c0 }, LAN, F_PHY_BCM5461 },
Francois Romieubd7a4442007-03-29 00:18:50 +0200315 { "Broadcom PHY AC131", { 0x0143, 0xbc70 }, LAN, 0 },
Francois Romieu900eb9d2005-09-03 00:55:27 +0200316 { "Agere PHY ET1101B", { 0x0282, 0xf010 }, LAN, 0 },
317 { "Marvell PHY 88E1111", { 0x0141, 0x0cc0 }, LAN, F_PHY_88E1111 },
318 { "Realtek PHY RTL8201", { 0x0000, 0x8200 }, LAN, 0 },
Francois Romieufcb98212005-07-30 13:15:22 +0200319 { NULL, }
Francois Romieu890e8d02005-07-30 13:08:43 +0200320};
321
Jesper Juhl3c6bee12006-01-09 20:54:01 -0800322static const struct {
Francois Romieu890e8d02005-07-30 13:08:43 +0200323 const char *name;
Francois Romieu890e8d02005-07-30 13:08:43 +0200324} sis_chip_info[] = {
Francois Romieue7976372005-09-03 00:57:51 +0200325 { "SiS 190 PCI Fast Ethernet adapter" },
326 { "SiS 191 PCI Gigabit Ethernet adapter" },
Francois Romieu890e8d02005-07-30 13:08:43 +0200327};
328
329static struct pci_device_id sis190_pci_tbl[] __devinitdata = {
330 { PCI_DEVICE(PCI_VENDOR_ID_SI, 0x0190), 0, 0, 0 },
Francois Romieue7976372005-09-03 00:57:51 +0200331 { PCI_DEVICE(PCI_VENDOR_ID_SI, 0x0191), 0, 0, 1 },
Francois Romieu890e8d02005-07-30 13:08:43 +0200332 { 0, },
333};
334
335MODULE_DEVICE_TABLE(pci, sis190_pci_tbl);
336
337static int rx_copybreak = 200;
338
339static struct {
340 u32 msg_enable;
341} debug = { -1 };
342
343MODULE_DESCRIPTION("SiS sis190 Gigabit Ethernet driver");
344module_param(rx_copybreak, int, 0);
345MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
346module_param_named(debug, debug.msg_enable, int, 0);
347MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
348MODULE_AUTHOR("K.M. Liu <kmliu@sis.com>, Ueimor <romieu@fr.zoreil.com>");
349MODULE_VERSION(DRV_VERSION);
350MODULE_LICENSE("GPL");
351
352static const u32 sis190_intr_mask =
Francois Romieu21461382005-09-03 00:54:25 +0200353 RxQEmpty | RxQInt | TxQ1Int | TxQ0Int | RxHalt | TxHalt | LinkChange;
Francois Romieu890e8d02005-07-30 13:08:43 +0200354
355/*
356 * Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
357 * The chips use a 64 element hash table based on the Ethernet CRC.
358 */
Arjan van de Venf71e1302006-03-03 21:33:57 -0500359static const int multicast_filter_limit = 32;
Francois Romieu890e8d02005-07-30 13:08:43 +0200360
361static void __mdio_cmd(void __iomem *ioaddr, u32 ctl)
362{
363 unsigned int i;
364
365 SIS_W32(GMIIControl, ctl);
366
367 msleep(1);
368
369 for (i = 0; i < 100; i++) {
370 if (!(SIS_R32(GMIIControl) & EhnMIInotDone))
371 break;
372 msleep(1);
373 }
374
375 if (i > 999)
376 printk(KERN_ERR PFX "PHY command failed !\n");
377}
378
Francois Romieu9ede1092005-07-30 13:14:38 +0200379static void mdio_write(void __iomem *ioaddr, int phy_id, int reg, int val)
Francois Romieu890e8d02005-07-30 13:08:43 +0200380{
Francois Romieu890e8d02005-07-30 13:08:43 +0200381 __mdio_cmd(ioaddr, EhnMIIreq | EhnMIIwrite |
Francois Romieu9ede1092005-07-30 13:14:38 +0200382 (((u32) reg) << EhnMIIregShift) | (phy_id << EhnMIIpmdShift) |
Francois Romieu890e8d02005-07-30 13:08:43 +0200383 (((u32) val) << EhnMIIdataShift));
384}
385
Francois Romieu9ede1092005-07-30 13:14:38 +0200386static int mdio_read(void __iomem *ioaddr, int phy_id, int reg)
Francois Romieu890e8d02005-07-30 13:08:43 +0200387{
Francois Romieu890e8d02005-07-30 13:08:43 +0200388 __mdio_cmd(ioaddr, EhnMIIreq | EhnMIIread |
Francois Romieu9ede1092005-07-30 13:14:38 +0200389 (((u32) reg) << EhnMIIregShift) | (phy_id << EhnMIIpmdShift));
Francois Romieu890e8d02005-07-30 13:08:43 +0200390
391 return (u16) (SIS_R32(GMIIControl) >> EhnMIIdataShift);
392}
393
Francois Romieu43afb942005-07-30 13:10:21 +0200394static void __mdio_write(struct net_device *dev, int phy_id, int reg, int val)
395{
396 struct sis190_private *tp = netdev_priv(dev);
397
Francois Romieu9ede1092005-07-30 13:14:38 +0200398 mdio_write(tp->mmio_addr, phy_id, reg, val);
Francois Romieu43afb942005-07-30 13:10:21 +0200399}
400
401static int __mdio_read(struct net_device *dev, int phy_id, int reg)
402{
403 struct sis190_private *tp = netdev_priv(dev);
404
Francois Romieu9ede1092005-07-30 13:14:38 +0200405 return mdio_read(tp->mmio_addr, phy_id, reg);
Francois Romieu43afb942005-07-30 13:10:21 +0200406}
407
Francois Romieufc10c392005-07-30 13:15:01 +0200408static u16 mdio_read_latched(void __iomem *ioaddr, int phy_id, int reg)
409{
410 mdio_read(ioaddr, phy_id, reg);
411 return mdio_read(ioaddr, phy_id, reg);
412}
413
Francois Romieu40292fb2005-07-30 13:12:06 +0200414static u16 __devinit sis190_read_eeprom(void __iomem *ioaddr, u32 reg)
Francois Romieu890e8d02005-07-30 13:08:43 +0200415{
Francois Romieu40292fb2005-07-30 13:12:06 +0200416 u16 data = 0xffff;
Francois Romieu890e8d02005-07-30 13:08:43 +0200417 unsigned int i;
Francois Romieu890e8d02005-07-30 13:08:43 +0200418
419 if (!(SIS_R32(ROMControl) & 0x0002))
420 return 0;
421
Francois Romieu40292fb2005-07-30 13:12:06 +0200422 SIS_W32(ROMInterface, EEREQ | EEROP | (reg << 10));
Francois Romieu890e8d02005-07-30 13:08:43 +0200423
424 for (i = 0; i < 200; i++) {
Francois Romieu40292fb2005-07-30 13:12:06 +0200425 if (!(SIS_R32(ROMInterface) & EEREQ)) {
426 data = (SIS_R32(ROMInterface) & 0xffff0000) >> 16;
Francois Romieu890e8d02005-07-30 13:08:43 +0200427 break;
Francois Romieu40292fb2005-07-30 13:12:06 +0200428 }
Francois Romieu890e8d02005-07-30 13:08:43 +0200429 msleep(1);
430 }
431
Francois Romieu890e8d02005-07-30 13:08:43 +0200432 return data;
433}
434
435static void sis190_irq_mask_and_ack(void __iomem *ioaddr)
436{
437 SIS_W32(IntrMask, 0x00);
438 SIS_W32(IntrStatus, 0xffffffff);
439 SIS_PCI_COMMIT();
440}
441
442static void sis190_asic_down(void __iomem *ioaddr)
443{
444 /* Stop the chip's Tx and Rx DMA processes. */
445
446 SIS_W32(TxControl, 0x1a00);
447 SIS_W32(RxControl, 0x1a00);
448
449 sis190_irq_mask_and_ack(ioaddr);
450}
451
452static void sis190_mark_as_last_descriptor(struct RxDesc *desc)
453{
454 desc->size |= cpu_to_le32(RingEnd);
455}
456
457static inline void sis190_give_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
458{
459 u32 eor = le32_to_cpu(desc->size) & RingEnd;
460
461 desc->PSize = 0x0;
Francois Romieu8b5641d2005-07-30 13:13:03 +0200462 desc->size = cpu_to_le32((rx_buf_sz & RX_BUF_MASK) | eor);
Francois Romieu890e8d02005-07-30 13:08:43 +0200463 wmb();
464 desc->status = cpu_to_le32(OWNbit | INTbit);
465}
466
467static inline void sis190_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
468 u32 rx_buf_sz)
469{
470 desc->addr = cpu_to_le32(mapping);
471 sis190_give_to_asic(desc, rx_buf_sz);
472}
473
474static inline void sis190_make_unusable_by_asic(struct RxDesc *desc)
475{
476 desc->PSize = 0x0;
477 desc->addr = 0xdeadbeef;
478 desc->size &= cpu_to_le32(RingEnd);
479 wmb();
480 desc->status = 0x0;
481}
482
483static int sis190_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
484 struct RxDesc *desc, u32 rx_buf_sz)
485{
486 struct sk_buff *skb;
487 dma_addr_t mapping;
488 int ret = 0;
489
490 skb = dev_alloc_skb(rx_buf_sz);
491 if (!skb)
492 goto err_out;
493
494 *sk_buff = skb;
495
496 mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
497 PCI_DMA_FROMDEVICE);
498
499 sis190_map_to_asic(desc, mapping, rx_buf_sz);
500out:
501 return ret;
502
503err_out:
504 ret = -ENOMEM;
505 sis190_make_unusable_by_asic(desc);
506 goto out;
507}
508
509static u32 sis190_rx_fill(struct sis190_private *tp, struct net_device *dev,
510 u32 start, u32 end)
511{
512 u32 cur;
513
514 for (cur = start; cur < end; cur++) {
515 int ret, i = cur % NUM_RX_DESC;
516
517 if (tp->Rx_skbuff[i])
518 continue;
519
520 ret = sis190_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
521 tp->RxDescRing + i, tp->rx_buf_sz);
522 if (ret < 0)
523 break;
524 }
525 return cur - start;
526}
527
528static inline int sis190_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
529 struct RxDesc *desc, int rx_buf_sz)
530{
531 int ret = -1;
532
533 if (pkt_size < rx_copybreak) {
534 struct sk_buff *skb;
535
536 skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN);
537 if (skb) {
538 skb_reserve(skb, NET_IP_ALIGN);
David S. Miller8c7b7fa2007-07-10 22:08:12 -0700539 skb_copy_to_linear_data(skb, sk_buff[0]->data, pkt_size);
Francois Romieu890e8d02005-07-30 13:08:43 +0200540 *sk_buff = skb;
541 sis190_give_to_asic(desc, rx_buf_sz);
542 ret = 0;
543 }
544 }
545 return ret;
546}
547
Francois Romieubcad5e52005-07-30 13:13:47 +0200548static inline int sis190_rx_pkt_err(u32 status, struct net_device_stats *stats)
549{
550#define ErrMask (OVRUN | SHORT | LIMIT | MIIER | NIBON | COLON | ABORT)
551
552 if ((status & CRCOK) && !(status & ErrMask))
553 return 0;
554
555 if (!(status & CRCOK))
556 stats->rx_crc_errors++;
557 else if (status & OVRUN)
558 stats->rx_over_errors++;
559 else if (status & (SHORT | LIMIT))
560 stats->rx_length_errors++;
561 else if (status & (MIIER | NIBON | COLON))
562 stats->rx_frame_errors++;
563
564 stats->rx_errors++;
565 return -1;
566}
567
Francois Romieu890e8d02005-07-30 13:08:43 +0200568static int sis190_rx_interrupt(struct net_device *dev,
569 struct sis190_private *tp, void __iomem *ioaddr)
570{
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700571 struct net_device_stats *stats = &dev->stats;
Francois Romieu890e8d02005-07-30 13:08:43 +0200572 u32 rx_left, cur_rx = tp->cur_rx;
573 u32 delta, count;
574
575 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
576 rx_left = sis190_rx_quota(rx_left, (u32) dev->quota);
577
578 for (; rx_left > 0; rx_left--, cur_rx++) {
579 unsigned int entry = cur_rx % NUM_RX_DESC;
580 struct RxDesc *desc = tp->RxDescRing + entry;
581 u32 status;
582
583 if (desc->status & OWNbit)
584 break;
585
586 status = le32_to_cpu(desc->PSize);
587
588 // net_intr(tp, KERN_INFO "%s: Rx PSize = %08x.\n", dev->name,
589 // status);
590
Francois Romieubcad5e52005-07-30 13:13:47 +0200591 if (sis190_rx_pkt_err(status, stats) < 0)
Francois Romieu890e8d02005-07-30 13:08:43 +0200592 sis190_give_to_asic(desc, tp->rx_buf_sz);
Francois Romieubcad5e52005-07-30 13:13:47 +0200593 else {
Francois Romieu890e8d02005-07-30 13:08:43 +0200594 struct sk_buff *skb = tp->Rx_skbuff[entry];
595 int pkt_size = (status & RxSizeMask) - 4;
596 void (*pci_action)(struct pci_dev *, dma_addr_t,
597 size_t, int) = pci_dma_sync_single_for_device;
598
599 if (unlikely(pkt_size > tp->rx_buf_sz)) {
600 net_intr(tp, KERN_INFO
601 "%s: (frag) status = %08x.\n",
602 dev->name, status);
603 stats->rx_dropped++;
604 stats->rx_length_errors++;
605 sis190_give_to_asic(desc, tp->rx_buf_sz);
606 continue;
607 }
608
609 pci_dma_sync_single_for_cpu(tp->pci_dev,
610 le32_to_cpu(desc->addr), tp->rx_buf_sz,
611 PCI_DMA_FROMDEVICE);
612
613 if (sis190_try_rx_copy(&skb, pkt_size, desc,
614 tp->rx_buf_sz)) {
615 pci_action = pci_unmap_single;
616 tp->Rx_skbuff[entry] = NULL;
617 sis190_make_unusable_by_asic(desc);
618 }
619
620 pci_action(tp->pci_dev, le32_to_cpu(desc->addr),
621 tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
622
Francois Romieu890e8d02005-07-30 13:08:43 +0200623 skb_put(skb, pkt_size);
624 skb->protocol = eth_type_trans(skb, dev);
625
626 sis190_rx_skb(skb);
627
628 dev->last_rx = jiffies;
Francois Romieu890e8d02005-07-30 13:08:43 +0200629 stats->rx_packets++;
Francois Romieubcad5e52005-07-30 13:13:47 +0200630 stats->rx_bytes += pkt_size;
631 if ((status & BCAST) == MCAST)
632 stats->multicast++;
Francois Romieu890e8d02005-07-30 13:08:43 +0200633 }
634 }
635 count = cur_rx - tp->cur_rx;
636 tp->cur_rx = cur_rx;
637
638 delta = sis190_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
639 if (!delta && count && netif_msg_intr(tp))
640 printk(KERN_INFO "%s: no Rx buffer allocated.\n", dev->name);
641 tp->dirty_rx += delta;
642
643 if (((tp->dirty_rx + NUM_RX_DESC) == tp->cur_rx) && netif_msg_intr(tp))
644 printk(KERN_EMERG "%s: Rx buffers exhausted.\n", dev->name);
645
646 return count;
647}
648
649static void sis190_unmap_tx_skb(struct pci_dev *pdev, struct sk_buff *skb,
650 struct TxDesc *desc)
651{
652 unsigned int len;
653
654 len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
655
656 pci_unmap_single(pdev, le32_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
657
658 memset(desc, 0x00, sizeof(*desc));
659}
660
661static void sis190_tx_interrupt(struct net_device *dev,
662 struct sis190_private *tp, void __iomem *ioaddr)
663{
664 u32 pending, dirty_tx = tp->dirty_tx;
665 /*
666 * It would not be needed if queueing was allowed to be enabled
667 * again too early (hint: think preempt and unclocked smp systems).
668 */
669 unsigned int queue_stopped;
670
671 smp_rmb();
672 pending = tp->cur_tx - dirty_tx;
673 queue_stopped = (pending == NUM_TX_DESC);
674
675 for (; pending; pending--, dirty_tx++) {
676 unsigned int entry = dirty_tx % NUM_TX_DESC;
677 struct TxDesc *txd = tp->TxDescRing + entry;
678 struct sk_buff *skb;
679
680 if (le32_to_cpu(txd->status) & OWNbit)
681 break;
682
683 skb = tp->Tx_skbuff[entry];
684
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700685 dev->stats.tx_packets++;
686 dev->stats.tx_bytes += skb->len;
Francois Romieu890e8d02005-07-30 13:08:43 +0200687
688 sis190_unmap_tx_skb(tp->pci_dev, skb, txd);
689 tp->Tx_skbuff[entry] = NULL;
690 dev_kfree_skb_irq(skb);
691 }
692
693 if (tp->dirty_tx != dirty_tx) {
694 tp->dirty_tx = dirty_tx;
695 smp_wmb();
696 if (queue_stopped)
697 netif_wake_queue(dev);
698 }
699}
700
701/*
702 * The interrupt handler does all of the Rx thread work and cleans up after
703 * the Tx thread.
704 */
David Howells7d12e782006-10-05 14:55:46 +0100705static irqreturn_t sis190_interrupt(int irq, void *__dev)
Francois Romieu890e8d02005-07-30 13:08:43 +0200706{
707 struct net_device *dev = __dev;
708 struct sis190_private *tp = netdev_priv(dev);
709 void __iomem *ioaddr = tp->mmio_addr;
710 unsigned int handled = 0;
711 u32 status;
712
713 status = SIS_R32(IntrStatus);
714
715 if ((status == 0xffffffff) || !status)
716 goto out;
717
718 handled = 1;
719
720 if (unlikely(!netif_running(dev))) {
721 sis190_asic_down(ioaddr);
722 goto out;
723 }
724
725 SIS_W32(IntrStatus, status);
726
727 // net_intr(tp, KERN_INFO "%s: status = %08x.\n", dev->name, status);
728
729 if (status & LinkChange) {
730 net_intr(tp, KERN_INFO "%s: link change.\n", dev->name);
731 schedule_work(&tp->phy_task);
732 }
733
734 if (status & RxQInt)
735 sis190_rx_interrupt(dev, tp, ioaddr);
736
737 if (status & TxQ0Int)
738 sis190_tx_interrupt(dev, tp, ioaddr);
739out:
740 return IRQ_RETVAL(handled);
741}
742
Francois Romieu4405d3b2005-07-30 13:09:20 +0200743#ifdef CONFIG_NET_POLL_CONTROLLER
744static void sis190_netpoll(struct net_device *dev)
745{
746 struct sis190_private *tp = netdev_priv(dev);
747 struct pci_dev *pdev = tp->pci_dev;
748
749 disable_irq(pdev->irq);
David Howells7d12e782006-10-05 14:55:46 +0100750 sis190_interrupt(pdev->irq, dev);
Francois Romieu4405d3b2005-07-30 13:09:20 +0200751 enable_irq(pdev->irq);
752}
753#endif
754
Francois Romieu890e8d02005-07-30 13:08:43 +0200755static void sis190_free_rx_skb(struct sis190_private *tp,
756 struct sk_buff **sk_buff, struct RxDesc *desc)
757{
758 struct pci_dev *pdev = tp->pci_dev;
759
760 pci_unmap_single(pdev, le32_to_cpu(desc->addr), tp->rx_buf_sz,
761 PCI_DMA_FROMDEVICE);
762 dev_kfree_skb(*sk_buff);
763 *sk_buff = NULL;
764 sis190_make_unusable_by_asic(desc);
765}
766
767static void sis190_rx_clear(struct sis190_private *tp)
768{
769 unsigned int i;
770
771 for (i = 0; i < NUM_RX_DESC; i++) {
772 if (!tp->Rx_skbuff[i])
773 continue;
774 sis190_free_rx_skb(tp, tp->Rx_skbuff + i, tp->RxDescRing + i);
775 }
776}
777
778static void sis190_init_ring_indexes(struct sis190_private *tp)
779{
780 tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
781}
782
783static int sis190_init_ring(struct net_device *dev)
784{
785 struct sis190_private *tp = netdev_priv(dev);
786
787 sis190_init_ring_indexes(tp);
788
789 memset(tp->Tx_skbuff, 0x0, NUM_TX_DESC * sizeof(struct sk_buff *));
790 memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
791
792 if (sis190_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
793 goto err_rx_clear;
794
795 sis190_mark_as_last_descriptor(tp->RxDescRing + NUM_RX_DESC - 1);
796
797 return 0;
798
799err_rx_clear:
800 sis190_rx_clear(tp);
801 return -ENOMEM;
802}
803
804static void sis190_set_rx_mode(struct net_device *dev)
805{
806 struct sis190_private *tp = netdev_priv(dev);
807 void __iomem *ioaddr = tp->mmio_addr;
808 unsigned long flags;
809 u32 mc_filter[2]; /* Multicast hash filter */
810 u16 rx_mode;
811
812 if (dev->flags & IFF_PROMISC) {
Francois Romieu890e8d02005-07-30 13:08:43 +0200813 rx_mode =
814 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
815 AcceptAllPhys;
816 mc_filter[1] = mc_filter[0] = 0xffffffff;
817 } else if ((dev->mc_count > multicast_filter_limit) ||
818 (dev->flags & IFF_ALLMULTI)) {
819 /* Too many to filter perfectly -- accept all multicasts. */
820 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
821 mc_filter[1] = mc_filter[0] = 0xffffffff;
822 } else {
823 struct dev_mc_list *mclist;
824 unsigned int i;
825
826 rx_mode = AcceptBroadcast | AcceptMyPhys;
827 mc_filter[1] = mc_filter[0] = 0;
828 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
829 i++, mclist = mclist->next) {
830 int bit_nr =
Aurelien Jarno8fee5f52005-10-05 23:29:58 +0200831 ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3f;
Francois Romieu890e8d02005-07-30 13:08:43 +0200832 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
833 rx_mode |= AcceptMulticast;
834 }
835 }
836
837 spin_lock_irqsave(&tp->lock, flags);
838
839 SIS_W16(RxMacControl, rx_mode | 0x2);
840 SIS_W32(RxHashTable, mc_filter[0]);
841 SIS_W32(RxHashTable + 4, mc_filter[1]);
842
843 spin_unlock_irqrestore(&tp->lock, flags);
844}
845
846static void sis190_soft_reset(void __iomem *ioaddr)
847{
848 SIS_W32(IntrControl, 0x8000);
849 SIS_PCI_COMMIT();
850 msleep(1);
851 SIS_W32(IntrControl, 0x0);
852 sis190_asic_down(ioaddr);
853 msleep(1);
854}
855
856static void sis190_hw_start(struct net_device *dev)
857{
858 struct sis190_private *tp = netdev_priv(dev);
859 void __iomem *ioaddr = tp->mmio_addr;
860
861 sis190_soft_reset(ioaddr);
862
863 SIS_W32(TxDescStartAddr, tp->tx_dma);
864 SIS_W32(RxDescStartAddr, tp->rx_dma);
865
866 SIS_W32(IntrStatus, 0xffffffff);
867 SIS_W32(IntrMask, 0x0);
Francois Romieu890e8d02005-07-30 13:08:43 +0200868 SIS_W32(GMIIControl, 0x0);
869 SIS_W32(TxMacControl, 0x60);
870 SIS_W16(RxMacControl, 0x02);
871 SIS_W32(RxHashTable, 0x0);
872 SIS_W32(0x6c, 0x0);
Francois Romieu188f23b2005-07-30 13:11:43 +0200873 SIS_W32(RxWolCtrl, 0x0);
874 SIS_W32(RxWolData, 0x0);
Francois Romieu890e8d02005-07-30 13:08:43 +0200875
876 SIS_PCI_COMMIT();
877
878 sis190_set_rx_mode(dev);
879
880 /* Enable all known interrupts by setting the interrupt mask. */
881 SIS_W32(IntrMask, sis190_intr_mask);
882
883 SIS_W32(TxControl, 0x1a00 | CmdTxEnb);
884 SIS_W32(RxControl, 0x1a1d);
885
886 netif_start_queue(dev);
887}
888
David Howellsc4028952006-11-22 14:57:56 +0000889static void sis190_phy_task(struct work_struct *work)
Francois Romieu890e8d02005-07-30 13:08:43 +0200890{
David Howellsc4028952006-11-22 14:57:56 +0000891 struct sis190_private *tp =
892 container_of(work, struct sis190_private, phy_task);
893 struct net_device *dev = tp->dev;
Francois Romieu890e8d02005-07-30 13:08:43 +0200894 void __iomem *ioaddr = tp->mmio_addr;
Francois Romieu9ede1092005-07-30 13:14:38 +0200895 int phy_id = tp->mii_if.phy_id;
Francois Romieu890e8d02005-07-30 13:08:43 +0200896 u16 val;
897
Francois Romieu43afb942005-07-30 13:10:21 +0200898 rtnl_lock();
899
Francois Romieuc014f6c2007-02-15 23:37:29 +0100900 if (!netif_running(dev))
901 goto out_unlock;
902
Francois Romieu9ede1092005-07-30 13:14:38 +0200903 val = mdio_read(ioaddr, phy_id, MII_BMCR);
Francois Romieu890e8d02005-07-30 13:08:43 +0200904 if (val & BMCR_RESET) {
905 // FIXME: needlessly high ? -- FR 02/07/2005
906 mod_timer(&tp->timer, jiffies + HZ/10);
Francois Romieufc10c392005-07-30 13:15:01 +0200907 } else if (!(mdio_read_latched(ioaddr, phy_id, MII_BMSR) &
908 BMSR_ANEGCOMPLETE)) {
Francois Romieu890e8d02005-07-30 13:08:43 +0200909 net_link(tp, KERN_WARNING "%s: PHY reset until link up.\n",
910 dev->name);
Francois Romieu21461382005-09-03 00:54:25 +0200911 netif_carrier_off(dev);
Francois Romieu9ede1092005-07-30 13:14:38 +0200912 mdio_write(ioaddr, phy_id, MII_BMCR, val | BMCR_RESET);
Francois Romieu890e8d02005-07-30 13:08:43 +0200913 mod_timer(&tp->timer, jiffies + SIS190_PHY_TIMEOUT);
914 } else {
915 /* Rejoice ! */
916 struct {
917 int val;
Francois Romieu6614a6d2005-09-03 00:56:16 +0200918 u32 ctl;
Francois Romieu890e8d02005-07-30 13:08:43 +0200919 const char *msg;
Francois Romieu890e8d02005-07-30 13:08:43 +0200920 } reg31[] = {
Francois Romieu6614a6d2005-09-03 00:56:16 +0200921 { LPA_1000XFULL | LPA_SLCT, 0x07000c00 | 0x00001000,
922 "1000 Mbps Full Duplex" },
923 { LPA_1000XHALF | LPA_SLCT, 0x07000c00,
924 "1000 Mbps Half Duplex" },
925 { LPA_100FULL, 0x04000800 | 0x00001000,
926 "100 Mbps Full Duplex" },
927 { LPA_100HALF, 0x04000800,
928 "100 Mbps Half Duplex" },
929 { LPA_10FULL, 0x04000400 | 0x00001000,
930 "10 Mbps Full Duplex" },
931 { LPA_10HALF, 0x04000400,
932 "10 Mbps Half Duplex" },
933 { 0, 0x04000400, "unknown" }
934 }, *p;
Francois Romieu8348b4d2005-07-30 13:16:14 +0200935 u16 adv;
Francois Romieu890e8d02005-07-30 13:08:43 +0200936
Francois Romieu9ede1092005-07-30 13:14:38 +0200937 val = mdio_read(ioaddr, phy_id, 0x1f);
Francois Romieu890e8d02005-07-30 13:08:43 +0200938 net_link(tp, KERN_INFO "%s: mii ext = %04x.\n", dev->name, val);
939
Francois Romieu9ede1092005-07-30 13:14:38 +0200940 val = mdio_read(ioaddr, phy_id, MII_LPA);
Francois Romieu8348b4d2005-07-30 13:16:14 +0200941 adv = mdio_read(ioaddr, phy_id, MII_ADVERTISE);
942 net_link(tp, KERN_INFO "%s: mii lpa = %04x adv = %04x.\n",
943 dev->name, val, adv);
944
945 val &= adv;
Francois Romieu890e8d02005-07-30 13:08:43 +0200946
Francois Romieu6614a6d2005-09-03 00:56:16 +0200947 for (p = reg31; p->val; p++) {
Francois Romieu890e8d02005-07-30 13:08:43 +0200948 if ((val & p->val) == p->val)
949 break;
950 }
Francois Romieu6614a6d2005-09-03 00:56:16 +0200951
952 p->ctl |= SIS_R32(StationControl) & ~0x0f001c00;
953
Francois Romieuc3d6f1f2005-09-03 00:56:57 +0200954 if ((tp->features & F_HAS_RGMII) &&
955 (tp->features & F_PHY_BCM5461)) {
956 // Set Tx Delay in RGMII mode.
957 mdio_write(ioaddr, phy_id, 0x18, 0xf1c7);
958 udelay(200);
959 mdio_write(ioaddr, phy_id, 0x1c, 0x8c00);
960 p->ctl |= 0x03000000;
961 }
962
Francois Romieu6614a6d2005-09-03 00:56:16 +0200963 SIS_W32(StationControl, p->ctl);
964
Francois Romieuc3d6f1f2005-09-03 00:56:57 +0200965 if (tp->features & F_HAS_RGMII) {
966 SIS_W32(RGDelay, 0x0441);
967 SIS_W32(RGDelay, 0x0440);
968 }
969
Francois Romieu890e8d02005-07-30 13:08:43 +0200970 net_link(tp, KERN_INFO "%s: link on %s mode.\n", dev->name,
971 p->msg);
972 netif_carrier_on(dev);
973 }
Francois Romieu43afb942005-07-30 13:10:21 +0200974
Francois Romieuc014f6c2007-02-15 23:37:29 +0100975out_unlock:
Francois Romieu43afb942005-07-30 13:10:21 +0200976 rtnl_unlock();
Francois Romieu890e8d02005-07-30 13:08:43 +0200977}
978
979static void sis190_phy_timer(unsigned long __opaque)
980{
981 struct net_device *dev = (struct net_device *)__opaque;
982 struct sis190_private *tp = netdev_priv(dev);
983
984 if (likely(netif_running(dev)))
985 schedule_work(&tp->phy_task);
986}
987
988static inline void sis190_delete_timer(struct net_device *dev)
989{
990 struct sis190_private *tp = netdev_priv(dev);
991
992 del_timer_sync(&tp->timer);
993}
994
995static inline void sis190_request_timer(struct net_device *dev)
996{
997 struct sis190_private *tp = netdev_priv(dev);
998 struct timer_list *timer = &tp->timer;
999
1000 init_timer(timer);
1001 timer->expires = jiffies + SIS190_PHY_TIMEOUT;
1002 timer->data = (unsigned long)dev;
1003 timer->function = sis190_phy_timer;
1004 add_timer(timer);
1005}
1006
1007static void sis190_set_rxbufsize(struct sis190_private *tp,
1008 struct net_device *dev)
1009{
1010 unsigned int mtu = dev->mtu;
1011
1012 tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
Francois Romieu8b5641d2005-07-30 13:13:03 +02001013 /* RxDesc->size has a licence to kill the lower bits */
1014 if (tp->rx_buf_sz & 0x07) {
1015 tp->rx_buf_sz += 8;
1016 tp->rx_buf_sz &= RX_BUF_MASK;
1017 }
Francois Romieu890e8d02005-07-30 13:08:43 +02001018}
1019
1020static int sis190_open(struct net_device *dev)
1021{
1022 struct sis190_private *tp = netdev_priv(dev);
1023 struct pci_dev *pdev = tp->pci_dev;
1024 int rc = -ENOMEM;
1025
1026 sis190_set_rxbufsize(tp, dev);
1027
1028 /*
1029 * Rx and Tx descriptors need 256 bytes alignment.
1030 * pci_alloc_consistent() guarantees a stronger alignment.
1031 */
1032 tp->TxDescRing = pci_alloc_consistent(pdev, TX_RING_BYTES, &tp->tx_dma);
1033 if (!tp->TxDescRing)
1034 goto out;
1035
1036 tp->RxDescRing = pci_alloc_consistent(pdev, RX_RING_BYTES, &tp->rx_dma);
1037 if (!tp->RxDescRing)
1038 goto err_free_tx_0;
1039
1040 rc = sis190_init_ring(dev);
1041 if (rc < 0)
1042 goto err_free_rx_1;
1043
David Howellsc4028952006-11-22 14:57:56 +00001044 INIT_WORK(&tp->phy_task, sis190_phy_task);
Francois Romieu890e8d02005-07-30 13:08:43 +02001045
1046 sis190_request_timer(dev);
1047
Thomas Gleixner1fb9df52006-07-01 19:29:39 -07001048 rc = request_irq(dev->irq, sis190_interrupt, IRQF_SHARED, dev->name, dev);
Francois Romieu890e8d02005-07-30 13:08:43 +02001049 if (rc < 0)
1050 goto err_release_timer_2;
1051
1052 sis190_hw_start(dev);
1053out:
1054 return rc;
1055
1056err_release_timer_2:
1057 sis190_delete_timer(dev);
1058 sis190_rx_clear(tp);
1059err_free_rx_1:
1060 pci_free_consistent(tp->pci_dev, RX_RING_BYTES, tp->RxDescRing,
1061 tp->rx_dma);
1062err_free_tx_0:
1063 pci_free_consistent(tp->pci_dev, TX_RING_BYTES, tp->TxDescRing,
1064 tp->tx_dma);
1065 goto out;
1066}
1067
1068static void sis190_tx_clear(struct sis190_private *tp)
1069{
1070 unsigned int i;
1071
1072 for (i = 0; i < NUM_TX_DESC; i++) {
1073 struct sk_buff *skb = tp->Tx_skbuff[i];
1074
1075 if (!skb)
1076 continue;
1077
1078 sis190_unmap_tx_skb(tp->pci_dev, skb, tp->TxDescRing + i);
1079 tp->Tx_skbuff[i] = NULL;
1080 dev_kfree_skb(skb);
1081
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001082 tp->dev->stats.tx_dropped++;
Francois Romieu890e8d02005-07-30 13:08:43 +02001083 }
1084 tp->cur_tx = tp->dirty_tx = 0;
1085}
1086
1087static void sis190_down(struct net_device *dev)
1088{
1089 struct sis190_private *tp = netdev_priv(dev);
1090 void __iomem *ioaddr = tp->mmio_addr;
1091 unsigned int poll_locked = 0;
1092
1093 sis190_delete_timer(dev);
1094
1095 netif_stop_queue(dev);
1096
Francois Romieu890e8d02005-07-30 13:08:43 +02001097 do {
1098 spin_lock_irq(&tp->lock);
1099
1100 sis190_asic_down(ioaddr);
1101
1102 spin_unlock_irq(&tp->lock);
1103
1104 synchronize_irq(dev->irq);
1105
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001106 if (!poll_locked)
Francois Romieu890e8d02005-07-30 13:08:43 +02001107 poll_locked++;
Francois Romieu890e8d02005-07-30 13:08:43 +02001108
1109 synchronize_sched();
1110
1111 } while (SIS_R32(IntrMask));
1112
1113 sis190_tx_clear(tp);
1114 sis190_rx_clear(tp);
1115}
1116
1117static int sis190_close(struct net_device *dev)
1118{
1119 struct sis190_private *tp = netdev_priv(dev);
1120 struct pci_dev *pdev = tp->pci_dev;
1121
1122 sis190_down(dev);
1123
1124 free_irq(dev->irq, dev);
1125
Francois Romieu890e8d02005-07-30 13:08:43 +02001126 pci_free_consistent(pdev, TX_RING_BYTES, tp->TxDescRing, tp->tx_dma);
1127 pci_free_consistent(pdev, RX_RING_BYTES, tp->RxDescRing, tp->rx_dma);
1128
1129 tp->TxDescRing = NULL;
1130 tp->RxDescRing = NULL;
1131
1132 return 0;
1133}
1134
1135static int sis190_start_xmit(struct sk_buff *skb, struct net_device *dev)
1136{
1137 struct sis190_private *tp = netdev_priv(dev);
1138 void __iomem *ioaddr = tp->mmio_addr;
1139 u32 len, entry, dirty_tx;
1140 struct TxDesc *desc;
1141 dma_addr_t mapping;
1142
1143 if (unlikely(skb->len < ETH_ZLEN)) {
Herbert Xu5b057c62006-06-23 02:06:41 -07001144 if (skb_padto(skb, ETH_ZLEN)) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001145 dev->stats.tx_dropped++;
Francois Romieu890e8d02005-07-30 13:08:43 +02001146 goto out;
1147 }
1148 len = ETH_ZLEN;
1149 } else {
1150 len = skb->len;
1151 }
1152
1153 entry = tp->cur_tx % NUM_TX_DESC;
1154 desc = tp->TxDescRing + entry;
1155
1156 if (unlikely(le32_to_cpu(desc->status) & OWNbit)) {
1157 netif_stop_queue(dev);
1158 net_tx_err(tp, KERN_ERR PFX
1159 "%s: BUG! Tx Ring full when queue awake!\n",
1160 dev->name);
1161 return NETDEV_TX_BUSY;
1162 }
1163
1164 mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
1165
1166 tp->Tx_skbuff[entry] = skb;
1167
1168 desc->PSize = cpu_to_le32(len);
1169 desc->addr = cpu_to_le32(mapping);
1170
1171 desc->size = cpu_to_le32(len);
1172 if (entry == (NUM_TX_DESC - 1))
1173 desc->size |= cpu_to_le32(RingEnd);
1174
1175 wmb();
1176
1177 desc->status = cpu_to_le32(OWNbit | INTbit | DEFbit | CRCbit | PADbit);
1178
1179 tp->cur_tx++;
1180
1181 smp_wmb();
1182
1183 SIS_W32(TxControl, 0x1a00 | CmdReset | CmdTxEnb);
1184
1185 dev->trans_start = jiffies;
1186
1187 dirty_tx = tp->dirty_tx;
1188 if ((tp->cur_tx - NUM_TX_DESC) == dirty_tx) {
1189 netif_stop_queue(dev);
1190 smp_rmb();
1191 if (dirty_tx != tp->dirty_tx)
1192 netif_wake_queue(dev);
1193 }
1194out:
1195 return NETDEV_TX_OK;
1196}
1197
Francois Romieufcb98212005-07-30 13:15:22 +02001198static void sis190_free_phy(struct list_head *first_phy)
1199{
1200 struct sis190_phy *cur, *next;
1201
1202 list_for_each_entry_safe(cur, next, first_phy, list) {
1203 kfree(cur);
1204 }
1205}
1206
1207/**
1208 * sis190_default_phy - Select default PHY for sis190 mac.
1209 * @dev: the net device to probe for
1210 *
1211 * Select first detected PHY with link as default.
1212 * If no one is link on, select PHY whose types is HOME as default.
1213 * If HOME doesn't exist, select LAN.
1214 */
1215static u16 sis190_default_phy(struct net_device *dev)
1216{
1217 struct sis190_phy *phy, *phy_home, *phy_default, *phy_lan;
1218 struct sis190_private *tp = netdev_priv(dev);
1219 struct mii_if_info *mii_if = &tp->mii_if;
1220 void __iomem *ioaddr = tp->mmio_addr;
1221 u16 status;
1222
1223 phy_home = phy_default = phy_lan = NULL;
1224
1225 list_for_each_entry(phy, &tp->first_phy, list) {
1226 status = mdio_read_latched(ioaddr, phy->phy_id, MII_BMSR);
1227
1228 // Link ON & Not select default PHY & not ghost PHY.
1229 if ((status & BMSR_LSTATUS) &&
1230 !phy_default &&
1231 (phy->type != UNKNOWN)) {
1232 phy_default = phy;
1233 } else {
1234 status = mdio_read(ioaddr, phy->phy_id, MII_BMCR);
1235 mdio_write(ioaddr, phy->phy_id, MII_BMCR,
1236 status | BMCR_ANENABLE | BMCR_ISOLATE);
1237 if (phy->type == HOME)
1238 phy_home = phy;
1239 else if (phy->type == LAN)
1240 phy_lan = phy;
1241 }
1242 }
1243
1244 if (!phy_default) {
1245 if (phy_home)
1246 phy_default = phy_home;
1247 else if (phy_lan)
1248 phy_default = phy_lan;
1249 else
1250 phy_default = list_entry(&tp->first_phy,
1251 struct sis190_phy, list);
1252 }
1253
1254 if (mii_if->phy_id != phy_default->phy_id) {
1255 mii_if->phy_id = phy_default->phy_id;
1256 net_probe(tp, KERN_INFO
1257 "%s: Using transceiver at address %d as default.\n",
Francois Romieu3690b6c2005-08-26 00:30:37 +02001258 pci_name(tp->pci_dev), mii_if->phy_id);
Francois Romieufcb98212005-07-30 13:15:22 +02001259 }
1260
1261 status = mdio_read(ioaddr, mii_if->phy_id, MII_BMCR);
1262 status &= (~BMCR_ISOLATE);
1263
1264 mdio_write(ioaddr, mii_if->phy_id, MII_BMCR, status);
1265 status = mdio_read_latched(ioaddr, mii_if->phy_id, MII_BMSR);
1266
1267 return status;
1268}
1269
1270static void sis190_init_phy(struct net_device *dev, struct sis190_private *tp,
1271 struct sis190_phy *phy, unsigned int phy_id,
1272 u16 mii_status)
1273{
1274 void __iomem *ioaddr = tp->mmio_addr;
1275 struct mii_chip_info *p;
1276
1277 INIT_LIST_HEAD(&phy->list);
1278 phy->status = mii_status;
1279 phy->phy_id = phy_id;
1280
1281 phy->id[0] = mdio_read(ioaddr, phy_id, MII_PHYSID1);
1282 phy->id[1] = mdio_read(ioaddr, phy_id, MII_PHYSID2);
1283
1284 for (p = mii_chip_table; p->type; p++) {
1285 if ((p->id[0] == phy->id[0]) &&
1286 (p->id[1] == (phy->id[1] & 0xfff0))) {
1287 break;
1288 }
1289 }
1290
1291 if (p->id[1]) {
1292 phy->type = (p->type == MIX) ?
1293 ((mii_status & (BMSR_100FULL | BMSR_100HALF)) ?
1294 LAN : HOME) : p->type;
Francois Romieu900eb9d2005-09-03 00:55:27 +02001295 tp->features |= p->feature;
Francois Romieufcb98212005-07-30 13:15:22 +02001296 } else
1297 phy->type = UNKNOWN;
1298
1299 net_probe(tp, KERN_INFO "%s: %s transceiver at address %d.\n",
Francois Romieu3690b6c2005-08-26 00:30:37 +02001300 pci_name(tp->pci_dev),
1301 (phy->type == UNKNOWN) ? "Unknown PHY" : p->name, phy_id);
Francois Romieufcb98212005-07-30 13:15:22 +02001302}
1303
Francois Romieu900eb9d2005-09-03 00:55:27 +02001304static void sis190_mii_probe_88e1111_fixup(struct sis190_private *tp)
1305{
1306 if (tp->features & F_PHY_88E1111) {
1307 void __iomem *ioaddr = tp->mmio_addr;
1308 int phy_id = tp->mii_if.phy_id;
1309 u16 reg[2][2] = {
1310 { 0x808b, 0x0ce1 },
1311 { 0x808f, 0x0c60 }
1312 }, *p;
1313
1314 p = (tp->features & F_HAS_RGMII) ? reg[0] : reg[1];
1315
1316 mdio_write(ioaddr, phy_id, 0x1b, p[0]);
1317 udelay(200);
1318 mdio_write(ioaddr, phy_id, 0x14, p[1]);
1319 udelay(200);
1320 }
1321}
1322
Francois Romieufcb98212005-07-30 13:15:22 +02001323/**
1324 * sis190_mii_probe - Probe MII PHY for sis190
1325 * @dev: the net device to probe for
1326 *
1327 * Search for total of 32 possible mii phy addresses.
1328 * Identify and set current phy if found one,
1329 * return error if it failed to found.
1330 */
1331static int __devinit sis190_mii_probe(struct net_device *dev)
1332{
1333 struct sis190_private *tp = netdev_priv(dev);
1334 struct mii_if_info *mii_if = &tp->mii_if;
1335 void __iomem *ioaddr = tp->mmio_addr;
1336 int phy_id;
1337 int rc = 0;
1338
1339 INIT_LIST_HEAD(&tp->first_phy);
1340
1341 for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
1342 struct sis190_phy *phy;
1343 u16 status;
1344
1345 status = mdio_read_latched(ioaddr, phy_id, MII_BMSR);
1346
1347 // Try next mii if the current one is not accessible.
1348 if (status == 0xffff || status == 0x0000)
1349 continue;
1350
1351 phy = kmalloc(sizeof(*phy), GFP_KERNEL);
1352 if (!phy) {
1353 sis190_free_phy(&tp->first_phy);
1354 rc = -ENOMEM;
1355 goto out;
1356 }
1357
1358 sis190_init_phy(dev, tp, phy, phy_id, status);
1359
1360 list_add(&tp->first_phy, &phy->list);
1361 }
1362
1363 if (list_empty(&tp->first_phy)) {
1364 net_probe(tp, KERN_INFO "%s: No MII transceivers found!\n",
Francois Romieu3690b6c2005-08-26 00:30:37 +02001365 pci_name(tp->pci_dev));
Francois Romieufcb98212005-07-30 13:15:22 +02001366 rc = -EIO;
1367 goto out;
1368 }
1369
1370 /* Select default PHY for mac */
1371 sis190_default_phy(dev);
1372
Francois Romieu900eb9d2005-09-03 00:55:27 +02001373 sis190_mii_probe_88e1111_fixup(tp);
1374
Francois Romieufcb98212005-07-30 13:15:22 +02001375 mii_if->dev = dev;
1376 mii_if->mdio_read = __mdio_read;
1377 mii_if->mdio_write = __mdio_write;
1378 mii_if->phy_id_mask = PHY_ID_ANY;
1379 mii_if->reg_num_mask = MII_REG_ANY;
1380out:
1381 return rc;
1382}
1383
1384static void __devexit sis190_mii_remove(struct net_device *dev)
1385{
1386 struct sis190_private *tp = netdev_priv(dev);
1387
1388 sis190_free_phy(&tp->first_phy);
1389}
1390
Francois Romieu890e8d02005-07-30 13:08:43 +02001391static void sis190_release_board(struct pci_dev *pdev)
1392{
1393 struct net_device *dev = pci_get_drvdata(pdev);
1394 struct sis190_private *tp = netdev_priv(dev);
1395
1396 iounmap(tp->mmio_addr);
1397 pci_release_regions(pdev);
1398 pci_disable_device(pdev);
1399 free_netdev(dev);
1400}
1401
1402static struct net_device * __devinit sis190_init_board(struct pci_dev *pdev)
1403{
1404 struct sis190_private *tp;
1405 struct net_device *dev;
1406 void __iomem *ioaddr;
1407 int rc;
1408
1409 dev = alloc_etherdev(sizeof(*tp));
1410 if (!dev) {
1411 net_drv(&debug, KERN_ERR PFX "unable to alloc new ethernet\n");
1412 rc = -ENOMEM;
1413 goto err_out_0;
1414 }
1415
Francois Romieu890e8d02005-07-30 13:08:43 +02001416 SET_NETDEV_DEV(dev, &pdev->dev);
1417
1418 tp = netdev_priv(dev);
David Howellsc4028952006-11-22 14:57:56 +00001419 tp->dev = dev;
Francois Romieu890e8d02005-07-30 13:08:43 +02001420 tp->msg_enable = netif_msg_init(debug.msg_enable, SIS190_MSG_DEFAULT);
1421
1422 rc = pci_enable_device(pdev);
1423 if (rc < 0) {
1424 net_probe(tp, KERN_ERR "%s: enable failure\n", pci_name(pdev));
1425 goto err_free_dev_1;
1426 }
1427
1428 rc = -ENODEV;
1429
1430 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
1431 net_probe(tp, KERN_ERR "%s: region #0 is no MMIO resource.\n",
1432 pci_name(pdev));
1433 goto err_pci_disable_2;
1434 }
1435 if (pci_resource_len(pdev, 0) < SIS190_REGS_SIZE) {
1436 net_probe(tp, KERN_ERR "%s: invalid PCI region size(s).\n",
1437 pci_name(pdev));
1438 goto err_pci_disable_2;
1439 }
1440
1441 rc = pci_request_regions(pdev, DRV_NAME);
1442 if (rc < 0) {
1443 net_probe(tp, KERN_ERR PFX "%s: could not request regions.\n",
1444 pci_name(pdev));
1445 goto err_pci_disable_2;
1446 }
1447
1448 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1449 if (rc < 0) {
1450 net_probe(tp, KERN_ERR "%s: DMA configuration failed.\n",
1451 pci_name(pdev));
1452 goto err_free_res_3;
1453 }
1454
1455 pci_set_master(pdev);
1456
1457 ioaddr = ioremap(pci_resource_start(pdev, 0), SIS190_REGS_SIZE);
1458 if (!ioaddr) {
1459 net_probe(tp, KERN_ERR "%s: cannot remap MMIO, aborting\n",
1460 pci_name(pdev));
1461 rc = -EIO;
1462 goto err_free_res_3;
1463 }
1464
1465 tp->pci_dev = pdev;
1466 tp->mmio_addr = ioaddr;
1467
1468 sis190_irq_mask_and_ack(ioaddr);
1469
1470 sis190_soft_reset(ioaddr);
1471out:
1472 return dev;
1473
1474err_free_res_3:
1475 pci_release_regions(pdev);
1476err_pci_disable_2:
1477 pci_disable_device(pdev);
1478err_free_dev_1:
1479 free_netdev(dev);
1480err_out_0:
1481 dev = ERR_PTR(rc);
1482 goto out;
1483}
1484
1485static void sis190_tx_timeout(struct net_device *dev)
1486{
1487 struct sis190_private *tp = netdev_priv(dev);
1488 void __iomem *ioaddr = tp->mmio_addr;
1489 u8 tmp8;
1490
1491 /* Disable Tx, if not already */
1492 tmp8 = SIS_R8(TxControl);
1493 if (tmp8 & CmdTxEnb)
1494 SIS_W8(TxControl, tmp8 & ~CmdTxEnb);
1495
Francois Romieu188f23b2005-07-30 13:11:43 +02001496
1497 net_tx_err(tp, KERN_INFO "%s: Transmit timeout, status %08x %08x.\n",
1498 dev->name, SIS_R32(TxControl), SIS_R32(TxSts));
1499
Francois Romieu890e8d02005-07-30 13:08:43 +02001500 /* Disable interrupts by clearing the interrupt mask. */
1501 SIS_W32(IntrMask, 0x0000);
1502
1503 /* Stop a shared interrupt from scavenging while we are. */
1504 spin_lock_irq(&tp->lock);
1505 sis190_tx_clear(tp);
1506 spin_unlock_irq(&tp->lock);
1507
1508 /* ...and finally, reset everything. */
1509 sis190_hw_start(dev);
1510
1511 netif_wake_queue(dev);
1512}
1513
Francois Romieu900eb9d2005-09-03 00:55:27 +02001514static void sis190_set_rgmii(struct sis190_private *tp, u8 reg)
1515{
1516 tp->features |= (reg & 0x80) ? F_HAS_RGMII : 0;
1517}
1518
Francois Romieu830fb7d2005-07-30 13:12:37 +02001519static int __devinit sis190_get_mac_addr_from_eeprom(struct pci_dev *pdev,
1520 struct net_device *dev)
1521{
1522 struct sis190_private *tp = netdev_priv(dev);
1523 void __iomem *ioaddr = tp->mmio_addr;
1524 u16 sig;
1525 int i;
1526
1527 net_probe(tp, KERN_INFO "%s: Read MAC address from EEPROM\n",
1528 pci_name(pdev));
1529
1530 /* Check to see if there is a sane EEPROM */
1531 sig = (u16) sis190_read_eeprom(ioaddr, EEPROMSignature);
1532
1533 if ((sig == 0xffff) || (sig == 0x0000)) {
1534 net_probe(tp, KERN_INFO "%s: Error EEPROM read %x.\n",
1535 pci_name(pdev), sig);
1536 return -EIO;
1537 }
1538
1539 /* Get MAC address from EEPROM */
1540 for (i = 0; i < MAC_ADDR_LEN / 2; i++) {
Francois Romieu3cec93c2005-07-30 13:14:18 +02001541 __le16 w = sis190_read_eeprom(ioaddr, EEPROMMACAddr + i);
Francois Romieu830fb7d2005-07-30 13:12:37 +02001542
Francois Romieu7939aae2007-01-18 23:22:23 +01001543 ((u16 *)dev->dev_addr)[i] = le16_to_cpu(w);
Francois Romieu830fb7d2005-07-30 13:12:37 +02001544 }
1545
Francois Romieu900eb9d2005-09-03 00:55:27 +02001546 sis190_set_rgmii(tp, sis190_read_eeprom(ioaddr, EEPROMInfo));
1547
Francois Romieu830fb7d2005-07-30 13:12:37 +02001548 return 0;
1549}
1550
1551/**
1552 * sis190_get_mac_addr_from_apc - Get MAC address for SiS965 model
1553 * @pdev: PCI device
1554 * @dev: network device to get address for
1555 *
1556 * SiS965 model, use APC CMOS RAM to store MAC address.
1557 * APC CMOS RAM is accessed through ISA bridge.
1558 * MAC address is read into @net_dev->dev_addr.
1559 */
1560static int __devinit sis190_get_mac_addr_from_apc(struct pci_dev *pdev,
1561 struct net_device *dev)
1562{
1563 struct sis190_private *tp = netdev_priv(dev);
1564 struct pci_dev *isa_bridge;
1565 u8 reg, tmp8;
1566 int i;
1567
1568 net_probe(tp, KERN_INFO "%s: Read MAC address from APC.\n",
1569 pci_name(pdev));
1570
1571 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0965, NULL);
Neil Muller8eb7ad62007-08-01 17:52:04 +02001572 if (!isa_bridge)
1573 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0966, NULL);
1574
Francois Romieu830fb7d2005-07-30 13:12:37 +02001575 if (!isa_bridge) {
1576 net_probe(tp, KERN_INFO "%s: Can not find ISA bridge.\n",
1577 pci_name(pdev));
1578 return -EIO;
1579 }
1580
1581 /* Enable port 78h & 79h to access APC Registers. */
1582 pci_read_config_byte(isa_bridge, 0x48, &tmp8);
1583 reg = (tmp8 & ~0x02);
1584 pci_write_config_byte(isa_bridge, 0x48, reg);
1585 udelay(50);
1586 pci_read_config_byte(isa_bridge, 0x48, &reg);
1587
1588 for (i = 0; i < MAC_ADDR_LEN; i++) {
1589 outb(0x9 + i, 0x78);
1590 dev->dev_addr[i] = inb(0x79);
1591 }
1592
1593 outb(0x12, 0x78);
1594 reg = inb(0x79);
1595
Francois Romieu900eb9d2005-09-03 00:55:27 +02001596 sis190_set_rgmii(tp, reg);
1597
Francois Romieu830fb7d2005-07-30 13:12:37 +02001598 /* Restore the value to ISA Bridge */
1599 pci_write_config_byte(isa_bridge, 0x48, tmp8);
1600 pci_dev_put(isa_bridge);
1601
1602 return 0;
1603}
1604
1605/**
1606 * sis190_init_rxfilter - Initialize the Rx filter
1607 * @dev: network device to initialize
1608 *
1609 * Set receive filter address to our MAC address
1610 * and enable packet filtering.
1611 */
1612static inline void sis190_init_rxfilter(struct net_device *dev)
1613{
1614 struct sis190_private *tp = netdev_priv(dev);
1615 void __iomem *ioaddr = tp->mmio_addr;
1616 u16 ctl;
1617 int i;
1618
1619 ctl = SIS_R16(RxMacControl);
1620 /*
1621 * Disable packet filtering before setting filter.
1622 * Note: SiS's driver writes 32 bits but RxMacControl is 16 bits
1623 * only and followed by RxMacAddr (6 bytes). Strange. -- FR
1624 */
1625 SIS_W16(RxMacControl, ctl & ~0x0f00);
1626
1627 for (i = 0; i < MAC_ADDR_LEN; i++)
1628 SIS_W8(RxMacAddr + i, dev->dev_addr[i]);
1629
1630 SIS_W16(RxMacControl, ctl);
1631 SIS_PCI_COMMIT();
1632}
1633
1634static int sis190_get_mac_addr(struct pci_dev *pdev, struct net_device *dev)
1635{
1636 u8 from;
1637
1638 pci_read_config_byte(pdev, 0x73, &from);
1639
1640 return (from & 0x00000001) ?
1641 sis190_get_mac_addr_from_apc(pdev, dev) :
1642 sis190_get_mac_addr_from_eeprom(pdev, dev);
1643}
1644
Francois Romieu890e8d02005-07-30 13:08:43 +02001645static void sis190_set_speed_auto(struct net_device *dev)
1646{
1647 struct sis190_private *tp = netdev_priv(dev);
1648 void __iomem *ioaddr = tp->mmio_addr;
Francois Romieu9ede1092005-07-30 13:14:38 +02001649 int phy_id = tp->mii_if.phy_id;
Francois Romieu890e8d02005-07-30 13:08:43 +02001650 int val;
1651
1652 net_link(tp, KERN_INFO "%s: Enabling Auto-negotiation.\n", dev->name);
1653
Francois Romieu9ede1092005-07-30 13:14:38 +02001654 val = mdio_read(ioaddr, phy_id, MII_ADVERTISE);
Francois Romieu890e8d02005-07-30 13:08:43 +02001655
1656 // Enable 10/100 Full/Half Mode, leave MII_ADVERTISE bit4:0
1657 // unchanged.
Francois Romieu9ede1092005-07-30 13:14:38 +02001658 mdio_write(ioaddr, phy_id, MII_ADVERTISE, (val & ADVERTISE_SLCT) |
Francois Romieu890e8d02005-07-30 13:08:43 +02001659 ADVERTISE_100FULL | ADVERTISE_10FULL |
1660 ADVERTISE_100HALF | ADVERTISE_10HALF);
1661
1662 // Enable 1000 Full Mode.
Francois Romieu9ede1092005-07-30 13:14:38 +02001663 mdio_write(ioaddr, phy_id, MII_CTRL1000, ADVERTISE_1000FULL);
Francois Romieu890e8d02005-07-30 13:08:43 +02001664
1665 // Enable auto-negotiation and restart auto-negotiation.
Francois Romieu9ede1092005-07-30 13:14:38 +02001666 mdio_write(ioaddr, phy_id, MII_BMCR,
Francois Romieu890e8d02005-07-30 13:08:43 +02001667 BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET);
1668}
1669
Francois Romieu43afb942005-07-30 13:10:21 +02001670static int sis190_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1671{
1672 struct sis190_private *tp = netdev_priv(dev);
1673
1674 return mii_ethtool_gset(&tp->mii_if, cmd);
1675}
1676
1677static int sis190_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1678{
1679 struct sis190_private *tp = netdev_priv(dev);
1680
1681 return mii_ethtool_sset(&tp->mii_if, cmd);
1682}
1683
Francois Romieu890e8d02005-07-30 13:08:43 +02001684static void sis190_get_drvinfo(struct net_device *dev,
1685 struct ethtool_drvinfo *info)
1686{
1687 struct sis190_private *tp = netdev_priv(dev);
1688
1689 strcpy(info->driver, DRV_NAME);
1690 strcpy(info->version, DRV_VERSION);
1691 strcpy(info->bus_info, pci_name(tp->pci_dev));
1692}
1693
1694static int sis190_get_regs_len(struct net_device *dev)
1695{
1696 return SIS190_REGS_SIZE;
1697}
1698
1699static void sis190_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1700 void *p)
1701{
1702 struct sis190_private *tp = netdev_priv(dev);
1703 unsigned long flags;
1704
1705 if (regs->len > SIS190_REGS_SIZE)
1706 regs->len = SIS190_REGS_SIZE;
1707
1708 spin_lock_irqsave(&tp->lock, flags);
1709 memcpy_fromio(p, tp->mmio_addr, regs->len);
1710 spin_unlock_irqrestore(&tp->lock, flags);
1711}
1712
Francois Romieu43afb942005-07-30 13:10:21 +02001713static int sis190_nway_reset(struct net_device *dev)
1714{
1715 struct sis190_private *tp = netdev_priv(dev);
1716
1717 return mii_nway_restart(&tp->mii_if);
1718}
1719
Francois Romieu890e8d02005-07-30 13:08:43 +02001720static u32 sis190_get_msglevel(struct net_device *dev)
1721{
1722 struct sis190_private *tp = netdev_priv(dev);
1723
1724 return tp->msg_enable;
1725}
1726
1727static void sis190_set_msglevel(struct net_device *dev, u32 value)
1728{
1729 struct sis190_private *tp = netdev_priv(dev);
1730
1731 tp->msg_enable = value;
1732}
1733
Jeff Garzik7282d492006-09-13 14:30:00 -04001734static const struct ethtool_ops sis190_ethtool_ops = {
Francois Romieu43afb942005-07-30 13:10:21 +02001735 .get_settings = sis190_get_settings,
1736 .set_settings = sis190_set_settings,
Francois Romieu890e8d02005-07-30 13:08:43 +02001737 .get_drvinfo = sis190_get_drvinfo,
1738 .get_regs_len = sis190_get_regs_len,
1739 .get_regs = sis190_get_regs,
1740 .get_link = ethtool_op_get_link,
1741 .get_msglevel = sis190_get_msglevel,
1742 .set_msglevel = sis190_set_msglevel,
Francois Romieu43afb942005-07-30 13:10:21 +02001743 .nway_reset = sis190_nway_reset,
Francois Romieu890e8d02005-07-30 13:08:43 +02001744};
1745
Francois Romieu43afb942005-07-30 13:10:21 +02001746static int sis190_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1747{
1748 struct sis190_private *tp = netdev_priv(dev);
1749
1750 return !netif_running(dev) ? -EINVAL :
1751 generic_mii_ioctl(&tp->mii_if, if_mii(ifr), cmd, NULL);
1752}
1753
Francois Romieu890e8d02005-07-30 13:08:43 +02001754static int __devinit sis190_init_one(struct pci_dev *pdev,
1755 const struct pci_device_id *ent)
1756{
1757 static int printed_version = 0;
1758 struct sis190_private *tp;
1759 struct net_device *dev;
1760 void __iomem *ioaddr;
Francois Romieu830fb7d2005-07-30 13:12:37 +02001761 int rc;
Joe Perches0795af52007-10-03 17:59:30 -07001762 DECLARE_MAC_BUF(mac);
Francois Romieu890e8d02005-07-30 13:08:43 +02001763
1764 if (!printed_version) {
1765 net_drv(&debug, KERN_INFO SIS190_DRIVER_NAME " loaded.\n");
1766 printed_version = 1;
1767 }
1768
1769 dev = sis190_init_board(pdev);
1770 if (IS_ERR(dev)) {
1771 rc = PTR_ERR(dev);
1772 goto out;
1773 }
1774
Francois Romieu10487fb2006-02-16 22:17:00 +01001775 pci_set_drvdata(pdev, dev);
1776
Francois Romieu890e8d02005-07-30 13:08:43 +02001777 tp = netdev_priv(dev);
1778 ioaddr = tp->mmio_addr;
1779
Francois Romieu830fb7d2005-07-30 13:12:37 +02001780 rc = sis190_get_mac_addr(pdev, dev);
1781 if (rc < 0)
1782 goto err_release_board;
Francois Romieu890e8d02005-07-30 13:08:43 +02001783
Francois Romieu830fb7d2005-07-30 13:12:37 +02001784 sis190_init_rxfilter(dev);
Francois Romieu890e8d02005-07-30 13:08:43 +02001785
David Howellsc4028952006-11-22 14:57:56 +00001786 INIT_WORK(&tp->phy_task, sis190_phy_task);
Francois Romieu890e8d02005-07-30 13:08:43 +02001787
1788 dev->open = sis190_open;
1789 dev->stop = sis190_close;
Francois Romieu43afb942005-07-30 13:10:21 +02001790 dev->do_ioctl = sis190_ioctl;
Francois Romieu890e8d02005-07-30 13:08:43 +02001791 dev->tx_timeout = sis190_tx_timeout;
1792 dev->watchdog_timeo = SIS190_TX_TIMEOUT;
1793 dev->hard_start_xmit = sis190_start_xmit;
Francois Romieu4405d3b2005-07-30 13:09:20 +02001794#ifdef CONFIG_NET_POLL_CONTROLLER
1795 dev->poll_controller = sis190_netpoll;
1796#endif
Francois Romieu890e8d02005-07-30 13:08:43 +02001797 dev->set_multicast_list = sis190_set_rx_mode;
1798 SET_ETHTOOL_OPS(dev, &sis190_ethtool_ops);
1799 dev->irq = pdev->irq;
1800 dev->base_addr = (unsigned long) 0xdead;
1801
1802 spin_lock_init(&tp->lock);
Francois Romieu890e8d02005-07-30 13:08:43 +02001803
Francois Romieufcb98212005-07-30 13:15:22 +02001804 rc = sis190_mii_probe(dev);
1805 if (rc < 0)
Francois Romieu3690b6c2005-08-26 00:30:37 +02001806 goto err_release_board;
1807
1808 rc = register_netdev(dev);
1809 if (rc < 0)
1810 goto err_remove_mii;
1811
Francois Romieu890e8d02005-07-30 13:08:43 +02001812 net_probe(tp, KERN_INFO "%s: %s at %p (IRQ: %d), "
Joe Perches0795af52007-10-03 17:59:30 -07001813 "%s\n",
1814 pci_name(pdev), sis_chip_info[ent->driver_data].name,
1815 ioaddr, dev->irq, print_mac(mac, dev->dev_addr));
Francois Romieu890e8d02005-07-30 13:08:43 +02001816
Francois Romieu900eb9d2005-09-03 00:55:27 +02001817 net_probe(tp, KERN_INFO "%s: %s mode.\n", dev->name,
1818 (tp->features & F_HAS_RGMII) ? "RGMII" : "GMII");
1819
Francois Romieu890e8d02005-07-30 13:08:43 +02001820 netif_carrier_off(dev);
1821
1822 sis190_set_speed_auto(dev);
1823out:
1824 return rc;
Francois Romieu830fb7d2005-07-30 13:12:37 +02001825
Francois Romieu3690b6c2005-08-26 00:30:37 +02001826err_remove_mii:
1827 sis190_mii_remove(dev);
Francois Romieu830fb7d2005-07-30 13:12:37 +02001828err_release_board:
1829 sis190_release_board(pdev);
1830 goto out;
Francois Romieu890e8d02005-07-30 13:08:43 +02001831}
1832
1833static void __devexit sis190_remove_one(struct pci_dev *pdev)
1834{
1835 struct net_device *dev = pci_get_drvdata(pdev);
1836
Francois Romieufcb98212005-07-30 13:15:22 +02001837 sis190_mii_remove(dev);
Francois Romieuc014f6c2007-02-15 23:37:29 +01001838 flush_scheduled_work();
Francois Romieu890e8d02005-07-30 13:08:43 +02001839 unregister_netdev(dev);
1840 sis190_release_board(pdev);
1841 pci_set_drvdata(pdev, NULL);
1842}
1843
1844static struct pci_driver sis190_pci_driver = {
1845 .name = DRV_NAME,
1846 .id_table = sis190_pci_tbl,
1847 .probe = sis190_init_one,
1848 .remove = __devexit_p(sis190_remove_one),
1849};
1850
1851static int __init sis190_init_module(void)
1852{
Jeff Garzik29917622006-08-19 17:48:59 -04001853 return pci_register_driver(&sis190_pci_driver);
Francois Romieu890e8d02005-07-30 13:08:43 +02001854}
1855
1856static void __exit sis190_cleanup_module(void)
1857{
1858 pci_unregister_driver(&sis190_pci_driver);
1859}
1860
1861module_init(sis190_init_module);
1862module_exit(sis190_cleanup_module);