Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 1 | /* |
| 2 | * xor offload engine api |
| 3 | * |
| 4 | * Copyright © 2006, Intel Corporation. |
| 5 | * |
| 6 | * Dan Williams <dan.j.williams@intel.com> |
| 7 | * |
| 8 | * with architecture considerations by: |
| 9 | * Neil Brown <neilb@suse.de> |
| 10 | * Jeff Garzik <jeff@garzik.org> |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify it |
| 13 | * under the terms and conditions of the GNU General Public License, |
| 14 | * version 2, as published by the Free Software Foundation. |
| 15 | * |
| 16 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 19 | * more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License along with |
| 22 | * this program; if not, write to the Free Software Foundation, Inc., |
| 23 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 24 | * |
| 25 | */ |
| 26 | #include <linux/kernel.h> |
| 27 | #include <linux/interrupt.h> |
| 28 | #include <linux/mm.h> |
| 29 | #include <linux/dma-mapping.h> |
| 30 | #include <linux/raid/xor.h> |
| 31 | #include <linux/async_tx.h> |
| 32 | |
Dan Williams | 1367a3d | 2008-02-02 18:46:43 -0700 | [diff] [blame] | 33 | /* do_async_xor - dma map the pages and perform the xor with an engine. |
| 34 | * This routine is marked __always_inline so it can be compiled away |
| 35 | * when CONFIG_DMA_ENGINE=n |
| 36 | */ |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 37 | static __always_inline struct dma_async_tx_descriptor * |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 38 | do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list, |
| 39 | unsigned int offset, int src_cnt, size_t len, |
| 40 | enum async_tx_flags flags, |
| 41 | struct dma_async_tx_descriptor *depend_tx, |
| 42 | dma_async_tx_callback cb_fn, void *cb_param) |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 43 | { |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 44 | struct dma_device *dma = chan->device; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 45 | dma_addr_t *dma_src = (dma_addr_t *) src_list; |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 46 | struct dma_async_tx_descriptor *tx = NULL; |
| 47 | int src_off = 0; |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 48 | int i; |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 49 | dma_async_tx_callback _cb_fn; |
| 50 | void *_cb_param; |
| 51 | enum async_tx_flags async_flags; |
| 52 | enum dma_ctrl_flags dma_flags; |
| 53 | int xor_src_cnt; |
| 54 | dma_addr_t dma_dest; |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 55 | |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 56 | dma_dest = dma_map_page(dma->dev, dest, offset, len, DMA_FROM_DEVICE); |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 57 | for (i = 0; i < src_cnt; i++) |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 58 | dma_src[i] = dma_map_page(dma->dev, src_list[i], offset, |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 59 | len, DMA_TO_DEVICE); |
| 60 | |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 61 | while (src_cnt) { |
| 62 | async_flags = flags; |
| 63 | dma_flags = 0; |
| 64 | xor_src_cnt = min(src_cnt, dma->max_xor); |
| 65 | /* if we are submitting additional xors, leave the chain open, |
| 66 | * clear the callback parameters, and leave the destination |
| 67 | * buffer mapped |
| 68 | */ |
| 69 | if (src_cnt > xor_src_cnt) { |
| 70 | async_flags &= ~ASYNC_TX_ACK; |
| 71 | dma_flags = DMA_COMPL_SKIP_DEST_UNMAP; |
| 72 | _cb_fn = NULL; |
| 73 | _cb_param = NULL; |
| 74 | } else { |
| 75 | _cb_fn = cb_fn; |
| 76 | _cb_param = cb_param; |
| 77 | } |
| 78 | if (_cb_fn) |
| 79 | dma_flags |= DMA_PREP_INTERRUPT; |
| 80 | |
| 81 | /* Since we have clobbered the src_list we are committed |
| 82 | * to doing this asynchronously. Drivers force forward progress |
| 83 | * in case they can not provide a descriptor |
| 84 | */ |
| 85 | tx = dma->device_prep_dma_xor(chan, dma_dest, &dma_src[src_off], |
| 86 | xor_src_cnt, len, dma_flags); |
| 87 | |
Dan Williams | 669ab0b | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 88 | if (unlikely(!tx)) |
| 89 | async_tx_quiesce(&depend_tx); |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 90 | |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 91 | /* spin wait for the preceeding transactions to complete */ |
Dan Williams | 669ab0b | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 92 | while (unlikely(!tx)) { |
| 93 | dma_async_issue_pending(chan); |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 94 | tx = dma->device_prep_dma_xor(chan, dma_dest, |
| 95 | &dma_src[src_off], |
| 96 | xor_src_cnt, len, |
| 97 | dma_flags); |
Dan Williams | 669ab0b | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 98 | } |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 99 | |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 100 | async_tx_submit(chan, tx, async_flags, depend_tx, _cb_fn, |
| 101 | _cb_param); |
| 102 | |
| 103 | depend_tx = tx; |
| 104 | flags |= ASYNC_TX_DEP_ACK; |
| 105 | |
| 106 | if (src_cnt > xor_src_cnt) { |
| 107 | /* drop completed sources */ |
| 108 | src_cnt -= xor_src_cnt; |
| 109 | src_off += xor_src_cnt; |
| 110 | |
| 111 | /* use the intermediate result a source */ |
| 112 | dma_src[--src_off] = dma_dest; |
| 113 | src_cnt++; |
| 114 | } else |
| 115 | break; |
| 116 | } |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 117 | |
| 118 | return tx; |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 119 | } |
| 120 | |
| 121 | static void |
| 122 | do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset, |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 123 | int src_cnt, size_t len, enum async_tx_flags flags, |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 124 | dma_async_tx_callback cb_fn, void *cb_param) |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 125 | { |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 126 | int i; |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 127 | int xor_src_cnt; |
| 128 | int src_off = 0; |
| 129 | void *dest_buf; |
| 130 | void **srcs = (void **) src_list; |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 131 | |
| 132 | /* reuse the 'src_list' array to convert to buffer pointers */ |
| 133 | for (i = 0; i < src_cnt; i++) |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 134 | srcs[i] = page_address(src_list[i]) + offset; |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 135 | |
| 136 | /* set destination address */ |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 137 | dest_buf = page_address(dest) + offset; |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 138 | |
| 139 | if (flags & ASYNC_TX_XOR_ZERO_DST) |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 140 | memset(dest_buf, 0, len); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 141 | |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 142 | while (src_cnt > 0) { |
| 143 | /* process up to 'MAX_XOR_BLOCKS' sources */ |
| 144 | xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS); |
| 145 | xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]); |
| 146 | |
| 147 | /* drop completed sources */ |
| 148 | src_cnt -= xor_src_cnt; |
| 149 | src_off += xor_src_cnt; |
| 150 | } |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 151 | |
Dan Williams | 3dce017 | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 152 | async_tx_sync_epilog(cb_fn, cb_param); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 153 | } |
| 154 | |
| 155 | /** |
| 156 | * async_xor - attempt to xor a set of blocks with a dma engine. |
| 157 | * xor_blocks always uses the dest as a source so the ASYNC_TX_XOR_ZERO_DST |
| 158 | * flag must be set to not include dest data in the calculation. The |
| 159 | * assumption with dma eninges is that they only use the destination |
| 160 | * buffer as a source when it is explicity specified in the source list. |
| 161 | * @dest: destination page |
| 162 | * @src_list: array of source pages (if the dest is also a source it must be |
| 163 | * at index zero). The contents of this array may be overwritten. |
| 164 | * @offset: offset in pages to start transaction |
| 165 | * @src_cnt: number of source pages |
| 166 | * @len: length in bytes |
| 167 | * @flags: ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DEST, |
Dan Williams | d909b34 | 2008-02-02 19:30:14 -0700 | [diff] [blame] | 168 | * ASYNC_TX_ACK, ASYNC_TX_DEP_ACK |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 169 | * @depend_tx: xor depends on the result of this transaction. |
| 170 | * @cb_fn: function to call when the xor completes |
| 171 | * @cb_param: parameter to pass to the callback routine |
| 172 | */ |
| 173 | struct dma_async_tx_descriptor * |
| 174 | async_xor(struct page *dest, struct page **src_list, unsigned int offset, |
| 175 | int src_cnt, size_t len, enum async_tx_flags flags, |
| 176 | struct dma_async_tx_descriptor *depend_tx, |
| 177 | dma_async_tx_callback cb_fn, void *cb_param) |
| 178 | { |
Dan Williams | 47437b2 | 2008-02-02 19:49:59 -0700 | [diff] [blame] | 179 | struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_XOR, |
| 180 | &dest, 1, src_list, |
| 181 | src_cnt, len); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 182 | BUG_ON(src_cnt <= 1); |
| 183 | |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 184 | if (chan) { |
| 185 | /* run the xor asynchronously */ |
| 186 | pr_debug("%s (async): len: %zu\n", __func__, len); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 187 | |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 188 | return do_async_xor(chan, dest, src_list, offset, src_cnt, len, |
| 189 | flags, depend_tx, cb_fn, cb_param); |
| 190 | } else { |
| 191 | /* run the xor synchronously */ |
| 192 | pr_debug("%s (sync): len: %zu\n", __func__, len); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 193 | |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 194 | /* in the sync case the dest is an implied source |
| 195 | * (assumes the dest is the first source) |
| 196 | */ |
| 197 | if (flags & ASYNC_TX_XOR_DROP_DST) { |
| 198 | src_cnt--; |
| 199 | src_list++; |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 200 | } |
| 201 | |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 202 | /* wait for any prerequisite operations */ |
Dan Williams | d2c52b7 | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 203 | async_tx_quiesce(&depend_tx); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 204 | |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 205 | do_sync_xor(dest, src_list, offset, src_cnt, len, |
Dan Williams | 3dce017 | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 206 | flags, cb_fn, cb_param); |
Dan Williams | 1e55db2 | 2008-07-16 19:44:56 -0700 | [diff] [blame] | 207 | |
| 208 | return NULL; |
| 209 | } |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 210 | } |
| 211 | EXPORT_SYMBOL_GPL(async_xor); |
| 212 | |
| 213 | static int page_is_zero(struct page *p, unsigned int offset, size_t len) |
| 214 | { |
| 215 | char *a = page_address(p) + offset; |
| 216 | return ((*(u32 *) a) == 0 && |
| 217 | memcmp(a, a + 4, len - 4) == 0); |
| 218 | } |
| 219 | |
| 220 | /** |
| 221 | * async_xor_zero_sum - attempt a xor parity check with a dma engine. |
| 222 | * @dest: destination page used if the xor is performed synchronously |
| 223 | * @src_list: array of source pages. The dest page must be listed as a source |
| 224 | * at index zero. The contents of this array may be overwritten. |
| 225 | * @offset: offset in pages to start transaction |
| 226 | * @src_cnt: number of source pages |
| 227 | * @len: length in bytes |
| 228 | * @result: 0 if sum == 0 else non-zero |
Dan Williams | d909b34 | 2008-02-02 19:30:14 -0700 | [diff] [blame] | 229 | * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 230 | * @depend_tx: xor depends on the result of this transaction. |
| 231 | * @cb_fn: function to call when the xor completes |
| 232 | * @cb_param: parameter to pass to the callback routine |
| 233 | */ |
| 234 | struct dma_async_tx_descriptor * |
| 235 | async_xor_zero_sum(struct page *dest, struct page **src_list, |
| 236 | unsigned int offset, int src_cnt, size_t len, |
| 237 | u32 *result, enum async_tx_flags flags, |
| 238 | struct dma_async_tx_descriptor *depend_tx, |
| 239 | dma_async_tx_callback cb_fn, void *cb_param) |
| 240 | { |
Dan Williams | 47437b2 | 2008-02-02 19:49:59 -0700 | [diff] [blame] | 241 | struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_ZERO_SUM, |
| 242 | &dest, 1, src_list, |
| 243 | src_cnt, len); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 244 | struct dma_device *device = chan ? chan->device : NULL; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 245 | struct dma_async_tx_descriptor *tx = NULL; |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 246 | |
| 247 | BUG_ON(src_cnt <= 1); |
| 248 | |
Dan Williams | 8d8002f | 2008-03-18 21:23:59 -0700 | [diff] [blame] | 249 | if (device && src_cnt <= device->max_xor) { |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 250 | dma_addr_t *dma_src = (dma_addr_t *) src_list; |
Dan Williams | d4c56f9 | 2008-02-02 19:49:58 -0700 | [diff] [blame] | 251 | unsigned long dma_prep_flags = cb_fn ? DMA_PREP_INTERRUPT : 0; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 252 | int i; |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 253 | |
Dan Williams | 3280ab3e | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 254 | pr_debug("%s: (async) len: %zu\n", __func__, len); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 255 | |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 256 | for (i = 0; i < src_cnt; i++) |
| 257 | dma_src[i] = dma_map_page(device->dev, src_list[i], |
| 258 | offset, len, DMA_TO_DEVICE); |
| 259 | |
| 260 | tx = device->device_prep_dma_zero_sum(chan, dma_src, src_cnt, |
| 261 | len, result, |
Dan Williams | d4c56f9 | 2008-02-02 19:49:58 -0700 | [diff] [blame] | 262 | dma_prep_flags); |
Dan Williams | 669ab0b | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 263 | if (unlikely(!tx)) { |
| 264 | async_tx_quiesce(&depend_tx); |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 265 | |
Dan Williams | e34a8ae | 2008-08-05 10:22:05 -0700 | [diff] [blame] | 266 | while (!tx) { |
Dan Williams | 669ab0b | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 267 | dma_async_issue_pending(chan); |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 268 | tx = device->device_prep_dma_zero_sum(chan, |
| 269 | dma_src, src_cnt, len, result, |
Dan Williams | d4c56f9 | 2008-02-02 19:49:58 -0700 | [diff] [blame] | 270 | dma_prep_flags); |
Dan Williams | e34a8ae | 2008-08-05 10:22:05 -0700 | [diff] [blame] | 271 | } |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 272 | } |
| 273 | |
| 274 | async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param); |
| 275 | } else { |
| 276 | unsigned long xor_flags = flags; |
| 277 | |
Dan Williams | 3280ab3e | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 278 | pr_debug("%s: (sync) len: %zu\n", __func__, len); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 279 | |
| 280 | xor_flags |= ASYNC_TX_XOR_DROP_DST; |
| 281 | xor_flags &= ~ASYNC_TX_ACK; |
| 282 | |
| 283 | tx = async_xor(dest, src_list, offset, src_cnt, len, xor_flags, |
| 284 | depend_tx, NULL, NULL); |
| 285 | |
Dan Williams | d2c52b7 | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 286 | async_tx_quiesce(&tx); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 287 | |
| 288 | *result = page_is_zero(dest, offset, len) ? 0 : 1; |
| 289 | |
Dan Williams | 3dce017 | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 290 | async_tx_sync_epilog(cb_fn, cb_param); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 291 | } |
| 292 | |
| 293 | return tx; |
| 294 | } |
| 295 | EXPORT_SYMBOL_GPL(async_xor_zero_sum); |
| 296 | |
| 297 | static int __init async_xor_init(void) |
| 298 | { |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 299 | #ifdef CONFIG_DMA_ENGINE |
| 300 | /* To conserve stack space the input src_list (array of page pointers) |
| 301 | * is reused to hold the array of dma addresses passed to the driver. |
| 302 | * This conversion is only possible when dma_addr_t is less than the |
| 303 | * the size of a pointer. HIGHMEM64G is known to violate this |
| 304 | * assumption. |
| 305 | */ |
| 306 | BUILD_BUG_ON(sizeof(dma_addr_t) > sizeof(struct page *)); |
| 307 | #endif |
| 308 | |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 309 | return 0; |
| 310 | } |
| 311 | |
| 312 | static void __exit async_xor_exit(void) |
| 313 | { |
| 314 | do { } while (0); |
| 315 | } |
| 316 | |
| 317 | module_init(async_xor_init); |
| 318 | module_exit(async_xor_exit); |
| 319 | |
| 320 | MODULE_AUTHOR("Intel Corporation"); |
| 321 | MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api"); |
| 322 | MODULE_LICENSE("GPL"); |