| Stephen Boyd | 45dd0e5 | 2015-08-06 16:07:42 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015, The Linux Foundation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #ifndef __QCOM_GDSC_H__ |
| 15 | #define __QCOM_GDSC_H__ |
| 16 | |
| 17 | #include <linux/err.h> |
| 18 | #include <linux/pm_domain.h> |
| 19 | |
| 20 | struct regmap; |
| Rajendra Nayak | 3c53f5e | 2015-08-06 16:07:45 +0530 | [diff] [blame] | 21 | struct reset_controller_dev; |
| Stephen Boyd | 45dd0e5 | 2015-08-06 16:07:42 +0530 | [diff] [blame] | 22 | |
| Rajendra Nayak | 014e193 | 2015-08-06 16:07:44 +0530 | [diff] [blame] | 23 | /* Powerdomain allowable state bitfields */ |
| 24 | #define PWRSTS_OFF BIT(0) |
| 25 | #define PWRSTS_RET BIT(1) |
| 26 | #define PWRSTS_ON BIT(2) |
| 27 | #define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON) |
| 28 | #define PWRSTS_RET_ON (PWRSTS_RET | PWRSTS_ON) |
| 29 | |
| Stephen Boyd | 45dd0e5 | 2015-08-06 16:07:42 +0530 | [diff] [blame] | 30 | /** |
| 31 | * struct gdsc - Globally Distributed Switch Controller |
| 32 | * @pd: generic power domain |
| 33 | * @regmap: regmap for MMIO accesses |
| 34 | * @gdscr: gsdc control register |
| Rajendra Nayak | 014e193 | 2015-08-06 16:07:44 +0530 | [diff] [blame] | 35 | * @cxcs: offsets of branch registers to toggle mem/periph bits in |
| 36 | * @cxc_count: number of @cxcs |
| 37 | * @pwrsts: Possible powerdomain power states |
| Rajendra Nayak | 3c53f5e | 2015-08-06 16:07:45 +0530 | [diff] [blame] | 38 | * @resets: ids of resets associated with this gdsc |
| 39 | * @reset_count: number of @resets |
| 40 | * @rcdev: reset controller |
| Stephen Boyd | 45dd0e5 | 2015-08-06 16:07:42 +0530 | [diff] [blame] | 41 | */ |
| 42 | struct gdsc { |
| 43 | struct generic_pm_domain pd; |
| 44 | struct regmap *regmap; |
| 45 | unsigned int gdscr; |
| Rajendra Nayak | 014e193 | 2015-08-06 16:07:44 +0530 | [diff] [blame] | 46 | unsigned int *cxcs; |
| 47 | unsigned int cxc_count; |
| 48 | const u8 pwrsts; |
| Rajendra Nayak | 3c53f5e | 2015-08-06 16:07:45 +0530 | [diff] [blame] | 49 | struct reset_controller_dev *rcdev; |
| 50 | unsigned int *resets; |
| 51 | unsigned int reset_count; |
| Stephen Boyd | 45dd0e5 | 2015-08-06 16:07:42 +0530 | [diff] [blame] | 52 | }; |
| 53 | |
| 54 | #ifdef CONFIG_QCOM_GDSC |
| Rajendra Nayak | 3c53f5e | 2015-08-06 16:07:45 +0530 | [diff] [blame] | 55 | int gdsc_register(struct device *, struct gdsc **, size_t n, |
| 56 | struct reset_controller_dev *, struct regmap *); |
| Stephen Boyd | 45dd0e5 | 2015-08-06 16:07:42 +0530 | [diff] [blame] | 57 | void gdsc_unregister(struct device *); |
| 58 | #else |
| 59 | static inline int gdsc_register(struct device *d, struct gdsc **g, size_t n, |
| Rajendra Nayak | 3c53f5e | 2015-08-06 16:07:45 +0530 | [diff] [blame] | 60 | struct reset_controller_dev *rcdev, |
| Stephen Boyd | 45dd0e5 | 2015-08-06 16:07:42 +0530 | [diff] [blame] | 61 | struct regmap *r) |
| 62 | { |
| 63 | return -ENOSYS; |
| 64 | } |
| 65 | |
| 66 | static inline void gdsc_unregister(struct device *d) {}; |
| 67 | #endif /* CONFIG_QCOM_GDSC */ |
| 68 | #endif /* __QCOM_GDSC_H__ */ |