blob: 3b894a668d3240ba02ea3fa130348df8239f0056 [file] [log] [blame]
Linus Walleij2744e8a2011-05-02 20:50:54 +02001/*
2 * Interface the pinctrl subsystem
3 *
4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
6 * This interface is used in the core to keep track of pins.
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
10 * License terms: GNU General Public License (GPL) version 2
11 */
12#ifndef __LINUX_PINCTRL_PINCTRL_H
13#define __LINUX_PINCTRL_PINCTRL_H
14
15#ifdef CONFIG_PINCTRL
16
17#include <linux/radix-tree.h>
Linus Walleij2744e8a2011-05-02 20:50:54 +020018#include <linux/list.h>
19#include <linux/seq_file.h>
Linus Walleij9a01be12012-03-06 21:15:51 +010020#include "pinctrl-state.h"
Stephen Warren46919ae2012-03-01 18:48:32 -070021
Stephen Warren0acfb072012-03-06 12:12:12 -070022struct device;
Linus Walleij2744e8a2011-05-02 20:50:54 +020023struct pinctrl_dev;
Stephen Warren57291ce2012-03-23 10:29:46 -060024struct pinctrl_map;
Linus Walleij2744e8a2011-05-02 20:50:54 +020025struct pinmux_ops;
Linus Walleijae6b4d82011-10-19 18:14:33 +020026struct pinconf_ops;
Linus Walleij2744e8a2011-05-02 20:50:54 +020027struct gpio_chip;
Stephen Warren57291ce2012-03-23 10:29:46 -060028struct device_node;
Linus Walleij2744e8a2011-05-02 20:50:54 +020029
30/**
31 * struct pinctrl_pin_desc - boards/machines provide information on their
32 * pins, pads or other muxable units in this struct
33 * @number: unique pin number from the global pin number space
34 * @name: a name for this pin
35 */
36struct pinctrl_pin_desc {
37 unsigned number;
38 const char *name;
39};
40
41/* Convenience macro to define a single named or anonymous pin descriptor */
42#define PINCTRL_PIN(a, b) { .number = a, .name = b }
43#define PINCTRL_PIN_ANON(a) { .number = a }
44
45/**
46 * struct pinctrl_gpio_range - each pin controller can provide subranges of
47 * the GPIO number space to be handled by the controller
48 * @node: list node for internal use
49 * @name: a name for the chip in this range
50 * @id: an ID number for the chip in this range
51 * @base: base offset of the GPIO range
Chanho Park3c739ad2011-11-11 18:47:58 +090052 * @pin_base: base pin number of the GPIO range
Linus Walleij2744e8a2011-05-02 20:50:54 +020053 * @npins: number of pins in the GPIO range, including the base number
54 * @gc: an optional pointer to a gpio_chip
55 */
56struct pinctrl_gpio_range {
57 struct list_head node;
58 const char *name;
59 unsigned int id;
60 unsigned int base;
Chanho Park3c739ad2011-11-11 18:47:58 +090061 unsigned int pin_base;
Linus Walleij2744e8a2011-05-02 20:50:54 +020062 unsigned int npins;
63 struct gpio_chip *gc;
64};
65
66/**
67 * struct pinctrl_ops - global pin control operations, to be implemented by
68 * pin controller drivers.
Viresh Kumard1e90e92012-03-30 11:25:40 +053069 * @get_groups_count: Returns the count of total number of groups registered.
Linus Walleij2744e8a2011-05-02 20:50:54 +020070 * @get_group_name: return the group name of the pin group
71 * @get_group_pins: return an array of pins corresponding to a certain
72 * group selector @pins, and the size of the array in @num_pins
73 * @pin_dbg_show: optional debugfs display hook that will provide per-device
74 * info for a certain pin in debugfs
Stephen Warren02ae6da2012-04-26 10:18:52 -060075 * @dt_node_to_map: parse a device tree "pin configuration node", and create
76 * mapping table entries for it. These are returned through the @map and
77 * @num_maps output parameters. This function is optional, and may be
78 * omitted for pinctrl drivers that do not support device tree.
79 * @dt_free_map: free mapping table entries created via @dt_node_to_map. The
80 * top-level @map pointer must be freed, along with any dynamically
81 * allocated members of the mapping table entries themselves. This
82 * function is optional, and may be omitted for pinctrl drivers that do
83 * not support device tree.
Linus Walleij2744e8a2011-05-02 20:50:54 +020084 */
85struct pinctrl_ops {
Viresh Kumard1e90e92012-03-30 11:25:40 +053086 int (*get_groups_count) (struct pinctrl_dev *pctldev);
Linus Walleij2744e8a2011-05-02 20:50:54 +020087 const char *(*get_group_name) (struct pinctrl_dev *pctldev,
88 unsigned selector);
89 int (*get_group_pins) (struct pinctrl_dev *pctldev,
90 unsigned selector,
Stephen Warrena5818a82011-10-19 16:19:25 -060091 const unsigned **pins,
92 unsigned *num_pins);
Linus Walleij2744e8a2011-05-02 20:50:54 +020093 void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s,
94 unsigned offset);
Stephen Warren57291ce2012-03-23 10:29:46 -060095 int (*dt_node_to_map) (struct pinctrl_dev *pctldev,
96 struct device_node *np_config,
97 struct pinctrl_map **map, unsigned *num_maps);
98 void (*dt_free_map) (struct pinctrl_dev *pctldev,
99 struct pinctrl_map *map, unsigned num_maps);
Linus Walleij2744e8a2011-05-02 20:50:54 +0200100};
101
102/**
103 * struct pinctrl_desc - pin controller descriptor, register this to pin
104 * control subsystem
105 * @name: name for the pin controller
106 * @pins: an array of pin descriptors describing all the pins handled by
107 * this pin controller
108 * @npins: number of descriptors in the array, usually just ARRAY_SIZE()
109 * of the pins field above
Linus Walleij2744e8a2011-05-02 20:50:54 +0200110 * @pctlops: pin control operation vtable, to support global concepts like
111 * grouping of pins, this is optional.
Linus Walleijae6b4d82011-10-19 18:14:33 +0200112 * @pmxops: pinmux operations vtable, if you support pinmuxing in your driver
113 * @confops: pin config operations vtable, if you support pin configuration in
114 * your driver
Linus Walleij2744e8a2011-05-02 20:50:54 +0200115 * @owner: module providing the pin controller, used for refcounting
116 */
117struct pinctrl_desc {
118 const char *name;
119 struct pinctrl_pin_desc const *pins;
120 unsigned int npins;
Linus Walleij2744e8a2011-05-02 20:50:54 +0200121 struct pinctrl_ops *pctlops;
122 struct pinmux_ops *pmxops;
Linus Walleijae6b4d82011-10-19 18:14:33 +0200123 struct pinconf_ops *confops;
Linus Walleij2744e8a2011-05-02 20:50:54 +0200124 struct module *owner;
125};
126
127/* External interface to pin controller */
128extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
129 struct device *dev, void *driver_data);
130extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
131extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
132extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
133 struct pinctrl_gpio_range *range);
134extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
135 struct pinctrl_gpio_range *range);
136extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
137extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
138#else
139
Barry Songe0e20752011-10-27 20:38:24 -0700140struct pinctrl_dev;
Linus Walleij2744e8a2011-05-02 20:50:54 +0200141
Linus Walleijae6b4d82011-10-19 18:14:33 +0200142/* Sufficiently stupid default functions when pinctrl is not in use */
Linus Walleij2744e8a2011-05-02 20:50:54 +0200143static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
144{
145 return pin >= 0;
146}
147
148#endif /* !CONFIG_PINCTRL */
149
150#endif /* __LINUX_PINCTRL_PINCTRL_H */