blob: a6fd56451d7e1ffe89665ae599eccd25b1c8870f [file] [log] [blame]
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -07001/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <linux/errno.h>
34#include <linux/if_ether.h>
Paul Gortmakeree40fa02011-05-27 16:14:23 -040035#include <linux/export.h>
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -070036
37#include <linux/mlx4/cmd.h>
38
39#include "mlx4.h"
40
41#define MLX4_MAC_VALID (1ull << 63)
42#define MLX4_MAC_MASK 0xffffffffffffULL
43
44#define MLX4_VLAN_VALID (1u << 31)
45#define MLX4_VLAN_MASK 0xfff
46
Eugenia Emantayev93ece0c2012-01-19 09:45:05 +000047#define MLX4_STATS_TRAFFIC_COUNTERS_MASK 0xfULL
48#define MLX4_STATS_TRAFFIC_DROPS_MASK 0xc0ULL
49#define MLX4_STATS_ERROR_COUNTERS_MASK 0x1ffc30ULL
50#define MLX4_STATS_PORT_COUNTERS_MASK 0x1fe00000ULL
51
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -070052void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table)
53{
54 int i;
55
56 mutex_init(&table->mutex);
57 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
58 table->entries[i] = 0;
59 table->refs[i] = 0;
60 }
61 table->max = 1 << dev->caps.log_num_macs;
62 table->total = 0;
63}
64
65void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table)
66{
67 int i;
68
69 mutex_init(&table->mutex);
70 for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) {
71 table->entries[i] = 0;
72 table->refs[i] = 0;
73 }
Yevgeny Petriline72ebf52011-10-18 01:50:29 +000074 table->max = (1 << dev->caps.log_num_vlans) - MLX4_VLAN_REGULAR;
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -070075 table->total = 0;
76}
77
Eugenia Emantayevffe455a2011-12-13 04:16:21 +000078static int mlx4_uc_steer_add(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn)
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -070079{
Yevgeny Petrilin16792002011-03-22 22:38:31 +000080 struct mlx4_qp qp;
81 u8 gid[16] = {0};
82 int err;
83
Yevgeny Petrilin16792002011-03-22 22:38:31 +000084 qp.qpn = *qpn;
85
86 mac &= 0xffffffffffffULL;
87 mac = cpu_to_be64(mac << 16);
88 memcpy(&gid[10], &mac, ETH_ALEN);
89 gid[5] = port;
90 gid[7] = MLX4_UC_STEER << 1;
91
Eugenia Emantayevffe455a2011-12-13 04:16:21 +000092 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
93 if (err)
94 mlx4_warn(dev, "Failed Attaching Unicast\n");
Yevgeny Petrilin16792002011-03-22 22:38:31 +000095
96 return err;
97}
98
99static void mlx4_uc_steer_release(struct mlx4_dev *dev, u8 port,
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000100 u64 mac, int qpn)
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000101{
102 struct mlx4_qp qp;
103 u8 gid[16] = {0};
104
105 qp.qpn = qpn;
106 mac &= 0xffffffffffffULL;
107 mac = cpu_to_be64(mac << 16);
108 memcpy(&gid[10], &mac, ETH_ALEN);
109 gid[5] = port;
110 gid[7] = MLX4_UC_STEER << 1;
111
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000112 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000113}
114
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000115static int validate_index(struct mlx4_dev *dev,
116 struct mlx4_mac_table *table, int index)
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700117{
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000118 int err = 0;
119
120 if (index < 0 || index >= table->max || !table->entries[index]) {
121 mlx4_warn(dev, "No valid Mac entry for the given index\n");
122 err = -EINVAL;
123 }
124 return err;
125}
126
127static int find_index(struct mlx4_dev *dev,
128 struct mlx4_mac_table *table, u64 mac)
129{
130 int i;
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000131
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000132 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000133 if ((mac & MLX4_MAC_MASK) ==
134 (MLX4_MAC_MASK & be64_to_cpu(table->entries[i])))
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000135 return i;
136 }
137 /* Mac not found */
138 return -EINVAL;
139}
140
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000141int mlx4_get_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn)
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000142{
143 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000144 struct mlx4_mac_entry *entry;
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000145 int index = 0;
146 int err = 0;
147
148 mlx4_dbg(dev, "Registering MAC: 0x%llx for adding\n",
149 (unsigned long long) mac);
150 index = mlx4_register_mac(dev, port, mac);
151 if (index < 0) {
152 err = index;
153 mlx4_err(dev, "Failed adding MAC: 0x%llx\n",
154 (unsigned long long) mac);
155 return err;
156 }
157
158 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)) {
159 *qpn = info->base_qpn + index;
160 return 0;
161 }
162
163 err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
164 mlx4_dbg(dev, "Reserved qp %d\n", *qpn);
165 if (err) {
166 mlx4_err(dev, "Failed to reserve qp for mac registration\n");
167 goto qp_err;
168 }
169
170 err = mlx4_uc_steer_add(dev, port, mac, qpn);
171 if (err)
172 goto steer_err;
173
174 entry = kmalloc(sizeof *entry, GFP_KERNEL);
175 if (!entry) {
176 err = -ENOMEM;
177 goto alloc_err;
178 }
179 entry->mac = mac;
180 err = radix_tree_insert(&info->mac_tree, *qpn, entry);
181 if (err)
182 goto insert_err;
183 return 0;
184
185insert_err:
186 kfree(entry);
187
188alloc_err:
189 mlx4_uc_steer_release(dev, port, mac, *qpn);
190
191steer_err:
192 mlx4_qp_release_range(dev, *qpn, 1);
193
194qp_err:
195 mlx4_unregister_mac(dev, port, mac);
196 return err;
197}
198EXPORT_SYMBOL_GPL(mlx4_get_eth_qp);
199
200void mlx4_put_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int qpn)
201{
202 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
203 struct mlx4_mac_entry *entry;
204
205 mlx4_dbg(dev, "Registering MAC: 0x%llx for deleting\n",
206 (unsigned long long) mac);
207 mlx4_unregister_mac(dev, port, mac);
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000208
Or Gerlitzccf86322011-07-07 19:19:29 +0000209 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER) {
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000210 entry = radix_tree_lookup(&info->mac_tree, qpn);
211 if (entry) {
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000212 mlx4_dbg(dev, "Releasing qp: port %d, mac 0x%llx,"
213 " qpn %d\n", port,
214 (unsigned long long) mac, qpn);
215 mlx4_uc_steer_release(dev, port, entry->mac, qpn);
216 mlx4_qp_release_range(dev, qpn, 1);
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000217 radix_tree_delete(&info->mac_tree, qpn);
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000218 kfree(entry);
219 }
220 }
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000221}
222EXPORT_SYMBOL_GPL(mlx4_put_eth_qp);
223
224static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port,
225 __be64 *entries)
226{
227 struct mlx4_cmd_mailbox *mailbox;
228 u32 in_mod;
229 int err;
230
231 mailbox = mlx4_alloc_cmd_mailbox(dev);
232 if (IS_ERR(mailbox))
233 return PTR_ERR(mailbox);
234
235 memcpy(mailbox->buf, entries, MLX4_MAC_TABLE_SIZE);
236
237 in_mod = MLX4_SET_PORT_MAC_TABLE << 8 | port;
238
239 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
240 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
241
242 mlx4_free_cmd_mailbox(dev, mailbox);
243 return err;
244}
245
246int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac)
247{
248 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
249 struct mlx4_mac_table *table = &info->mac_table;
250 int i, err = 0;
251 int free = -1;
252
253 mlx4_dbg(dev, "Registering MAC: 0x%llx for port %d\n",
254 (unsigned long long) mac, port);
255
256 mutex_lock(&table->mutex);
257 for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
258 if (free < 0 && !table->entries[i]) {
259 free = i;
260 continue;
261 }
262
263 if (mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) {
264 /* MAC already registered, Must not have duplicates */
265 err = -EEXIST;
266 goto out;
267 }
268 }
269
270 mlx4_dbg(dev, "Free MAC index is %d\n", free);
271
272 if (table->total == table->max) {
273 /* No free mac entries */
274 err = -ENOSPC;
275 goto out;
276 }
277
278 /* Register new MAC */
279 table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID);
280
281 err = mlx4_set_port_mac_table(dev, port, table->entries);
282 if (unlikely(err)) {
283 mlx4_err(dev, "Failed adding MAC: 0x%llx\n",
284 (unsigned long long) mac);
285 table->entries[free] = 0;
286 goto out;
287 }
288
289 err = free;
290 ++table->total;
291out:
292 mutex_unlock(&table->mutex);
293 return err;
294}
295EXPORT_SYMBOL_GPL(__mlx4_register_mac);
296
297int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac)
298{
299 u64 out_param;
300 int err;
301
302 if (mlx4_is_mfunc(dev)) {
303 set_param_l(&out_param, port);
304 err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC,
305 RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES,
306 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
307 if (err)
308 return err;
309
310 return get_param_l(&out_param);
311 }
312 return __mlx4_register_mac(dev, port, mac);
313}
314EXPORT_SYMBOL_GPL(mlx4_register_mac);
315
316
317void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)
318{
319 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
320 struct mlx4_mac_table *table = &info->mac_table;
321 int index;
322
323 index = find_index(dev, table, mac);
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700324
325 mutex_lock(&table->mutex);
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000326
327 if (validate_index(dev, table, index))
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700328 goto out;
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000329
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000330 table->entries[index] = 0;
331 mlx4_set_port_mac_table(dev, port, table->entries);
332 --table->total;
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700333out:
334 mutex_unlock(&table->mutex);
335}
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000336EXPORT_SYMBOL_GPL(__mlx4_unregister_mac);
337
338void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)
339{
340 u64 out_param;
341 int err;
342
343 if (mlx4_is_mfunc(dev)) {
344 set_param_l(&out_param, port);
345 err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC,
346 RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES,
347 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
348 return;
349 }
350 __mlx4_unregister_mac(dev, port, mac);
351 return;
352}
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700353EXPORT_SYMBOL_GPL(mlx4_unregister_mac);
354
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000355int mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac)
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000356{
357 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
358 struct mlx4_mac_table *table = &info->mac_table;
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000359 struct mlx4_mac_entry *entry;
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000360 int index = qpn - info->base_qpn;
361 int err = 0;
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000362
Or Gerlitzccf86322011-07-07 19:19:29 +0000363 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER) {
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000364 entry = radix_tree_lookup(&info->mac_tree, qpn);
365 if (!entry)
366 return -EINVAL;
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000367 mlx4_uc_steer_release(dev, port, entry->mac, qpn);
368 mlx4_unregister_mac(dev, port, entry->mac);
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000369 entry->mac = new_mac;
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000370 mlx4_register_mac(dev, port, new_mac);
371 err = mlx4_uc_steer_add(dev, port, entry->mac, &qpn);
372 return err;
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000373 }
374
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000375 /* CX1 doesn't support multi-functions */
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000376 mutex_lock(&table->mutex);
377
378 err = validate_index(dev, table, index);
379 if (err)
380 goto out;
381
382 table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID);
383
384 err = mlx4_set_port_mac_table(dev, port, table->entries);
385 if (unlikely(err)) {
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000386 mlx4_err(dev, "Failed adding MAC: 0x%llx\n",
387 (unsigned long long) new_mac);
Yevgeny Petrilin16792002011-03-22 22:38:31 +0000388 table->entries[index] = 0;
389 }
390out:
391 mutex_unlock(&table->mutex);
392 return err;
393}
394EXPORT_SYMBOL_GPL(mlx4_replace_mac);
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000395
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700396static int mlx4_set_port_vlan_table(struct mlx4_dev *dev, u8 port,
397 __be32 *entries)
398{
399 struct mlx4_cmd_mailbox *mailbox;
400 u32 in_mod;
401 int err;
402
403 mailbox = mlx4_alloc_cmd_mailbox(dev);
404 if (IS_ERR(mailbox))
405 return PTR_ERR(mailbox);
406
407 memcpy(mailbox->buf, entries, MLX4_VLAN_TABLE_SIZE);
408 in_mod = MLX4_SET_PORT_VLAN_TABLE << 8 | port;
409 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
Jack Morgensteinf9baff52011-12-13 04:10:51 +0000410 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700411
412 mlx4_free_cmd_mailbox(dev, mailbox);
413
414 return err;
415}
416
Eli Cohen4c3eb3c2010-08-26 17:19:22 +0300417int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx)
418{
419 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
420 int i;
421
422 for (i = 0; i < MLX4_MAX_VLAN_NUM; ++i) {
423 if (table->refs[i] &&
424 (vid == (MLX4_VLAN_MASK &
425 be32_to_cpu(table->entries[i])))) {
426 /* VLAN already registered, increase reference count */
427 *idx = i;
428 return 0;
429 }
430 }
431
432 return -ENOENT;
433}
434EXPORT_SYMBOL_GPL(mlx4_find_cached_vlan);
435
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000436static int __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan,
437 int *index)
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700438{
439 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
440 int i, err = 0;
441 int free = -1;
442
443 mutex_lock(&table->mutex);
Yevgeny Petriline72ebf52011-10-18 01:50:29 +0000444
445 if (table->total == table->max) {
446 /* No free vlan entries */
447 err = -ENOSPC;
448 goto out;
449 }
450
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700451 for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) {
452 if (free < 0 && (table->refs[i] == 0)) {
453 free = i;
454 continue;
455 }
456
457 if (table->refs[i] &&
458 (vlan == (MLX4_VLAN_MASK &
459 be32_to_cpu(table->entries[i])))) {
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300460 /* Vlan already registered, increase references count */
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700461 *index = i;
462 ++table->refs[i];
463 goto out;
464 }
465 }
466
Eli Cohen0926f912010-10-25 02:56:47 +0000467 if (free < 0) {
468 err = -ENOMEM;
469 goto out;
470 }
471
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000472 /* Register new VLAN */
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700473 table->refs[free] = 1;
474 table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID);
475
476 err = mlx4_set_port_vlan_table(dev, port, table->entries);
477 if (unlikely(err)) {
478 mlx4_warn(dev, "Failed adding vlan: %u\n", vlan);
479 table->refs[free] = 0;
480 table->entries[free] = 0;
481 goto out;
482 }
483
484 *index = free;
485 ++table->total;
486out:
487 mutex_unlock(&table->mutex);
488 return err;
489}
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000490
491int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index)
492{
493 u64 out_param;
494 int err;
495
496 if (mlx4_is_mfunc(dev)) {
497 set_param_l(&out_param, port);
498 err = mlx4_cmd_imm(dev, vlan, &out_param, RES_VLAN,
499 RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES,
500 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
501 if (!err)
502 *index = get_param_l(&out_param);
503
504 return err;
505 }
506 return __mlx4_register_vlan(dev, port, vlan, index);
507}
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700508EXPORT_SYMBOL_GPL(mlx4_register_vlan);
509
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000510static void __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index)
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700511{
512 struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
513
514 if (index < MLX4_VLAN_REGULAR) {
515 mlx4_warn(dev, "Trying to free special vlan index %d\n", index);
516 return;
517 }
518
519 mutex_lock(&table->mutex);
520 if (!table->refs[index]) {
521 mlx4_warn(dev, "No vlan entry for index %d\n", index);
522 goto out;
523 }
524 if (--table->refs[index]) {
525 mlx4_dbg(dev, "Have more references for index %d,"
526 "no need to modify vlan table\n", index);
527 goto out;
528 }
529 table->entries[index] = 0;
530 mlx4_set_port_vlan_table(dev, port, table->entries);
531 --table->total;
532out:
533 mutex_unlock(&table->mutex);
534}
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000535
536void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index)
537{
538 u64 in_param;
539 int err;
540
541 if (mlx4_is_mfunc(dev)) {
542 set_param_l(&in_param, port);
543 err = mlx4_cmd(dev, in_param, RES_VLAN, RES_OP_RESERVE_AND_MAP,
544 MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A,
545 MLX4_CMD_WRAPPED);
546 if (!err)
547 mlx4_warn(dev, "Failed freeing vlan at index:%d\n",
548 index);
549
550 return;
551 }
552 __mlx4_unregister_vlan(dev, port, index);
553}
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700554EXPORT_SYMBOL_GPL(mlx4_unregister_vlan);
Yevgeny Petrilin7ff93f82008-10-22 15:38:42 -0700555
Jack Morgenstein9a5aa622008-11-28 21:29:46 -0800556int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps)
557{
558 struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
559 u8 *inbuf, *outbuf;
560 int err;
561
562 inmailbox = mlx4_alloc_cmd_mailbox(dev);
563 if (IS_ERR(inmailbox))
564 return PTR_ERR(inmailbox);
565
566 outmailbox = mlx4_alloc_cmd_mailbox(dev);
567 if (IS_ERR(outmailbox)) {
568 mlx4_free_cmd_mailbox(dev, inmailbox);
569 return PTR_ERR(outmailbox);
570 }
571
572 inbuf = inmailbox->buf;
573 outbuf = outmailbox->buf;
574 memset(inbuf, 0, 256);
575 memset(outbuf, 0, 256);
576 inbuf[0] = 1;
577 inbuf[1] = 1;
578 inbuf[2] = 1;
579 inbuf[3] = 1;
580 *(__be16 *) (&inbuf[16]) = cpu_to_be16(0x0015);
581 *(__be32 *) (&inbuf[20]) = cpu_to_be32(port);
582
583 err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3,
Jack Morgensteinf9baff52011-12-13 04:10:51 +0000584 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
585 MLX4_CMD_NATIVE);
Jack Morgenstein9a5aa622008-11-28 21:29:46 -0800586 if (!err)
587 *caps = *(__be32 *) (outbuf + 84);
588 mlx4_free_cmd_mailbox(dev, inmailbox);
589 mlx4_free_cmd_mailbox(dev, outmailbox);
590 return err;
591}
592
Linus Torvaldsf470f8d2011-11-01 10:51:38 -0700593int mlx4_check_ext_port_caps(struct mlx4_dev *dev, u8 port)
594{
595 struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
596 u8 *inbuf, *outbuf;
597 int err, packet_error;
598
599 inmailbox = mlx4_alloc_cmd_mailbox(dev);
600 if (IS_ERR(inmailbox))
601 return PTR_ERR(inmailbox);
602
603 outmailbox = mlx4_alloc_cmd_mailbox(dev);
604 if (IS_ERR(outmailbox)) {
605 mlx4_free_cmd_mailbox(dev, inmailbox);
606 return PTR_ERR(outmailbox);
607 }
608
609 inbuf = inmailbox->buf;
610 outbuf = outmailbox->buf;
611 memset(inbuf, 0, 256);
612 memset(outbuf, 0, 256);
613 inbuf[0] = 1;
614 inbuf[1] = 1;
615 inbuf[2] = 1;
616 inbuf[3] = 1;
617
618 *(__be16 *) (&inbuf[16]) = MLX4_ATTR_EXTENDED_PORT_INFO;
619 *(__be32 *) (&inbuf[20]) = cpu_to_be32(port);
620
621 err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3,
Jack Morgensteinf9baff52011-12-13 04:10:51 +0000622 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
623 MLX4_CMD_NATIVE);
Linus Torvaldsf470f8d2011-11-01 10:51:38 -0700624
625 packet_error = be16_to_cpu(*(__be16 *) (outbuf + 4));
626
627 dev->caps.ext_port_cap[port] = (!err && !packet_error) ?
628 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO
629 : 0;
630
631 mlx4_free_cmd_mailbox(dev, inmailbox);
632 mlx4_free_cmd_mailbox(dev, outmailbox);
633 return err;
634}
635
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000636static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod,
637 u8 op_mod, struct mlx4_cmd_mailbox *inbox)
638{
639 struct mlx4_priv *priv = mlx4_priv(dev);
640 struct mlx4_port_info *port_info;
641 struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master;
642 struct mlx4_slave_state *slave_st = &master->slave_state[slave];
643 struct mlx4_set_port_rqp_calc_context *qpn_context;
644 struct mlx4_set_port_general_context *gen_context;
645 int reset_qkey_viols;
646 int port;
647 int is_eth;
648 u32 in_modifier;
649 u32 promisc;
650 u16 mtu, prev_mtu;
651 int err;
652 int i;
653 __be32 agg_cap_mask;
654 __be32 slave_cap_mask;
655 __be32 new_cap_mask;
656
657 port = in_mod & 0xff;
658 in_modifier = in_mod >> 8;
659 is_eth = op_mod;
660 port_info = &priv->port[port];
661
662 /* Slaves cannot perform SET_PORT operations except changing MTU */
663 if (is_eth) {
664 if (slave != dev->caps.function &&
665 in_modifier != MLX4_SET_PORT_GENERAL) {
666 mlx4_warn(dev, "denying SET_PORT for slave:%d\n",
667 slave);
668 return -EINVAL;
669 }
670 switch (in_modifier) {
671 case MLX4_SET_PORT_RQP_CALC:
672 qpn_context = inbox->buf;
673 qpn_context->base_qpn =
674 cpu_to_be32(port_info->base_qpn);
675 qpn_context->n_mac = 0x7;
676 promisc = be32_to_cpu(qpn_context->promisc) >>
677 SET_PORT_PROMISC_SHIFT;
678 qpn_context->promisc = cpu_to_be32(
679 promisc << SET_PORT_PROMISC_SHIFT |
680 port_info->base_qpn);
681 promisc = be32_to_cpu(qpn_context->mcast) >>
682 SET_PORT_MC_PROMISC_SHIFT;
683 qpn_context->mcast = cpu_to_be32(
684 promisc << SET_PORT_MC_PROMISC_SHIFT |
685 port_info->base_qpn);
686 break;
687 case MLX4_SET_PORT_GENERAL:
688 gen_context = inbox->buf;
689 /* Mtu is configured as the max MTU among all the
690 * the functions on the port. */
691 mtu = be16_to_cpu(gen_context->mtu);
692 mtu = min_t(int, mtu, dev->caps.eth_mtu_cap[port]);
693 prev_mtu = slave_st->mtu[port];
694 slave_st->mtu[port] = mtu;
695 if (mtu > master->max_mtu[port])
696 master->max_mtu[port] = mtu;
697 if (mtu < prev_mtu && prev_mtu ==
698 master->max_mtu[port]) {
699 slave_st->mtu[port] = mtu;
700 master->max_mtu[port] = mtu;
701 for (i = 0; i < dev->num_slaves; i++) {
702 master->max_mtu[port] =
703 max(master->max_mtu[port],
704 master->slave_state[i].mtu[port]);
705 }
706 }
707
708 gen_context->mtu = cpu_to_be16(master->max_mtu[port]);
709 break;
710 }
711 return mlx4_cmd(dev, inbox->dma, in_mod, op_mod,
712 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
713 MLX4_CMD_NATIVE);
714 }
715
716 /* For IB, we only consider:
717 * - The capability mask, which is set to the aggregate of all
718 * slave function capabilities
719 * - The QKey violatin counter - reset according to each request.
720 */
721
722 if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
723 reset_qkey_viols = (*(u8 *) inbox->buf) & 0x40;
724 new_cap_mask = ((__be32 *) inbox->buf)[2];
725 } else {
726 reset_qkey_viols = ((u8 *) inbox->buf)[3] & 0x1;
727 new_cap_mask = ((__be32 *) inbox->buf)[1];
728 }
729
730 agg_cap_mask = 0;
731 slave_cap_mask =
732 priv->mfunc.master.slave_state[slave].ib_cap_mask[port];
733 priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = new_cap_mask;
734 for (i = 0; i < dev->num_slaves; i++)
735 agg_cap_mask |=
736 priv->mfunc.master.slave_state[i].ib_cap_mask[port];
737
738 /* only clear mailbox for guests. Master may be setting
739 * MTU or PKEY table size
740 */
741 if (slave != dev->caps.function)
742 memset(inbox->buf, 0, 256);
743 if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
744 *(u8 *) inbox->buf = !!reset_qkey_viols << 6;
745 ((__be32 *) inbox->buf)[2] = agg_cap_mask;
746 } else {
747 ((u8 *) inbox->buf)[3] = !!reset_qkey_viols;
748 ((__be32 *) inbox->buf)[1] = agg_cap_mask;
749 }
750
751 err = mlx4_cmd(dev, inbox->dma, port, is_eth, MLX4_CMD_SET_PORT,
752 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
753 if (err)
754 priv->mfunc.master.slave_state[slave].ib_cap_mask[port] =
755 slave_cap_mask;
756 return err;
757}
758
759int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave,
760 struct mlx4_vhcr *vhcr,
761 struct mlx4_cmd_mailbox *inbox,
762 struct mlx4_cmd_mailbox *outbox,
763 struct mlx4_cmd_info *cmd)
764{
765 return mlx4_common_set_port(dev, slave, vhcr->in_modifier,
766 vhcr->op_modifier, inbox);
767}
768
Or Gerlitz096335b2012-01-11 19:02:17 +0200769/* bit locations for set port command with zero op modifier */
770enum {
771 MLX4_SET_PORT_VL_CAP = 4, /* bits 7:4 */
772 MLX4_SET_PORT_MTU_CAP = 12, /* bits 15:12 */
773 MLX4_CHANGE_PORT_VL_CAP = 21,
774 MLX4_CHANGE_PORT_MTU_CAP = 22,
775};
776
Yevgeny Petrilin7ff93f82008-10-22 15:38:42 -0700777int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port)
778{
779 struct mlx4_cmd_mailbox *mailbox;
Or Gerlitz096335b2012-01-11 19:02:17 +0200780 int err, vl_cap;
Yevgeny Petrilin7ff93f82008-10-22 15:38:42 -0700781
Roland Dreier352b09e2009-03-31 09:54:15 -0700782 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH)
783 return 0;
784
Yevgeny Petrilin7ff93f82008-10-22 15:38:42 -0700785 mailbox = mlx4_alloc_cmd_mailbox(dev);
786 if (IS_ERR(mailbox))
787 return PTR_ERR(mailbox);
788
789 memset(mailbox->buf, 0, 256);
Yevgeny Petrilin793730b2009-03-11 15:47:18 -0700790
791 ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port];
Or Gerlitz096335b2012-01-11 19:02:17 +0200792
793 /* IB VL CAP enum isn't used by the firmware, just numerical values */
794 for (vl_cap = 8; vl_cap >= 1; vl_cap >>= 1) {
795 ((__be32 *) mailbox->buf)[0] = cpu_to_be32(
796 (1 << MLX4_CHANGE_PORT_MTU_CAP) |
797 (1 << MLX4_CHANGE_PORT_VL_CAP) |
798 (dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) |
799 (vl_cap << MLX4_SET_PORT_VL_CAP));
800 err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
801 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
802 if (err != -ENOMEM)
803 break;
804 }
Yevgeny Petrilin7ff93f82008-10-22 15:38:42 -0700805
806 mlx4_free_cmd_mailbox(dev, mailbox);
807 return err;
808}
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000809
Joerg Roedelcb9ffb72011-12-15 06:48:37 +0000810int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000811 u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx)
812{
813 struct mlx4_cmd_mailbox *mailbox;
814 struct mlx4_set_port_general_context *context;
815 int err;
816 u32 in_mod;
817
818 mailbox = mlx4_alloc_cmd_mailbox(dev);
819 if (IS_ERR(mailbox))
820 return PTR_ERR(mailbox);
821 context = mailbox->buf;
822 memset(context, 0, sizeof *context);
823
824 context->flags = SET_PORT_GEN_ALL_VALID;
825 context->mtu = cpu_to_be16(mtu);
826 context->pptx = (pptx * (!pfctx)) << 7;
827 context->pfctx = pfctx;
828 context->pprx = (pprx * (!pfcrx)) << 7;
829 context->pfcrx = pfcrx;
830
831 in_mod = MLX4_SET_PORT_GENERAL << 8 | port;
832 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
833 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
834
835 mlx4_free_cmd_mailbox(dev, mailbox);
836 return err;
837}
838EXPORT_SYMBOL(mlx4_SET_PORT_general);
839
Joerg Roedelcb9ffb72011-12-15 06:48:37 +0000840int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000841 u8 promisc)
842{
843 struct mlx4_cmd_mailbox *mailbox;
844 struct mlx4_set_port_rqp_calc_context *context;
845 int err;
846 u32 in_mod;
847 u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ?
848 MCAST_DIRECT : MCAST_DEFAULT;
849
850 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER &&
851 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)
852 return 0;
853
854 mailbox = mlx4_alloc_cmd_mailbox(dev);
855 if (IS_ERR(mailbox))
856 return PTR_ERR(mailbox);
857 context = mailbox->buf;
858 memset(context, 0, sizeof *context);
859
860 context->base_qpn = cpu_to_be32(base_qpn);
861 context->n_mac = dev->caps.log_num_macs;
862 context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT |
863 base_qpn);
864 context->mcast = cpu_to_be32(m_promisc << SET_PORT_MC_PROMISC_SHIFT |
865 base_qpn);
866 context->intra_no_vlan = 0;
867 context->no_vlan = MLX4_NO_VLAN_IDX;
868 context->intra_vlan_miss = 0;
869 context->vlan_miss = MLX4_VLAN_MISS_IDX;
870
871 in_mod = MLX4_SET_PORT_RQP_CALC << 8 | port;
872 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
873 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
874
875 mlx4_free_cmd_mailbox(dev, mailbox);
876 return err;
877}
878EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc);
879
880int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave,
881 struct mlx4_vhcr *vhcr,
882 struct mlx4_cmd_mailbox *inbox,
883 struct mlx4_cmd_mailbox *outbox,
884 struct mlx4_cmd_info *cmd)
885{
886 int err = 0;
887
888 return err;
889}
890
891int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port,
892 u64 mac, u64 clear, u8 mode)
893{
894 return mlx4_cmd(dev, (mac | (clear << 63)), port, mode,
895 MLX4_CMD_SET_MCAST_FLTR, MLX4_CMD_TIME_CLASS_B,
896 MLX4_CMD_WRAPPED);
897}
898EXPORT_SYMBOL(mlx4_SET_MCAST_FLTR);
899
900int mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave,
901 struct mlx4_vhcr *vhcr,
902 struct mlx4_cmd_mailbox *inbox,
903 struct mlx4_cmd_mailbox *outbox,
904 struct mlx4_cmd_info *cmd)
905{
906 int err = 0;
907
908 return err;
909}
910
911int mlx4_common_dump_eth_stats(struct mlx4_dev *dev, int slave,
912 u32 in_mod, struct mlx4_cmd_mailbox *outbox)
913{
914 return mlx4_cmd_box(dev, 0, outbox->dma, in_mod, 0,
915 MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
916 MLX4_CMD_NATIVE);
917}
918
919int mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave,
920 struct mlx4_vhcr *vhcr,
921 struct mlx4_cmd_mailbox *inbox,
922 struct mlx4_cmd_mailbox *outbox,
923 struct mlx4_cmd_info *cmd)
924{
Eugenia Emantayev35fb9af2012-01-19 09:44:37 +0000925 if (slave != dev->caps.function)
926 return 0;
Eugenia Emantayevffe455a2011-12-13 04:16:21 +0000927 return mlx4_common_dump_eth_stats(dev, slave,
928 vhcr->in_modifier, outbox);
929}
Eugenia Emantayev93ece0c2012-01-19 09:45:05 +0000930
931void mlx4_set_stats_bitmap(struct mlx4_dev *dev, u64 *stats_bitmap)
932{
933 if (!mlx4_is_mfunc(dev)) {
934 *stats_bitmap = 0;
935 return;
936 }
937
938 *stats_bitmap = (MLX4_STATS_TRAFFIC_COUNTERS_MASK |
939 MLX4_STATS_TRAFFIC_DROPS_MASK |
940 MLX4_STATS_PORT_COUNTERS_MASK);
941
942 if (mlx4_is_master(dev))
943 *stats_bitmap |= MLX4_STATS_ERROR_COUNTERS_MASK;
944}
945EXPORT_SYMBOL(mlx4_set_stats_bitmap);