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Dan Williams9bc89cd2007-01-02 11:10:44 -07001/*
2 * core routines for the asynchronous memory transfer/transform api
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
Franck Bui-Huu82524742008-05-12 21:21:05 +020026#include <linux/rculist.h>
Dan Williams9bc89cd2007-01-02 11:10:44 -070027#include <linux/kernel.h>
28#include <linux/async_tx.h>
29
30#ifdef CONFIG_DMA_ENGINE
Dan Williamsbec08512009-01-06 11:38:14 -070031static int __init async_tx_init(void)
Dan Williams9bc89cd2007-01-02 11:10:44 -070032{
Dan Williams729b5d12009-03-25 09:13:25 -070033 async_dmaengine_get();
Dan Williams9bc89cd2007-01-02 11:10:44 -070034
35 printk(KERN_INFO "async_tx: api initialized (async)\n");
36
37 return 0;
Dan Williams9bc89cd2007-01-02 11:10:44 -070038}
39
40static void __exit async_tx_exit(void)
41{
Dan Williams729b5d12009-03-25 09:13:25 -070042 async_dmaengine_put();
Dan Williams9bc89cd2007-01-02 11:10:44 -070043}
44
Dan Williamsaf1f9512009-08-29 19:09:26 -070045module_init(async_tx_init);
46module_exit(async_tx_exit);
47
Dan Williams9bc89cd2007-01-02 11:10:44 -070048/**
Dan Williams47437b22008-02-02 19:49:59 -070049 * __async_tx_find_channel - find a channel to carry out the operation or let
Dan Williams9bc89cd2007-01-02 11:10:44 -070050 * the transaction execute synchronously
Dan Williamsa08abd82009-06-03 11:43:59 -070051 * @submit: transaction dependency and submission modifiers
Dan Williams9bc89cd2007-01-02 11:10:44 -070052 * @tx_type: transaction type
53 */
54struct dma_chan *
Dan Williamsa08abd82009-06-03 11:43:59 -070055__async_tx_find_channel(struct async_submit_ctl *submit,
56 enum dma_transaction_type tx_type)
Dan Williams9bc89cd2007-01-02 11:10:44 -070057{
Dan Williamsa08abd82009-06-03 11:43:59 -070058 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
59
Dan Williams9bc89cd2007-01-02 11:10:44 -070060 /* see if we can keep the chain on one channel */
61 if (depend_tx &&
Dan Williamsbec08512009-01-06 11:38:14 -070062 dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
Dan Williams9bc89cd2007-01-02 11:10:44 -070063 return depend_tx->chan;
Dan Williams729b5d12009-03-25 09:13:25 -070064 return async_dma_find_channel(tx_type);
Dan Williams9bc89cd2007-01-02 11:10:44 -070065}
Dan Williams47437b22008-02-02 19:49:59 -070066EXPORT_SYMBOL_GPL(__async_tx_find_channel);
Dan Williams9bc89cd2007-01-02 11:10:44 -070067#endif
68
Dan Williams19242d72008-04-17 20:17:25 -070069
70/**
71 * async_tx_channel_switch - queue an interrupt descriptor with a dependency
72 * pre-attached.
73 * @depend_tx: the operation that must finish before the new operation runs
74 * @tx: the new operation
75 */
76static void
77async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
78 struct dma_async_tx_descriptor *tx)
79{
Dan Williams95475e52009-07-14 12:19:02 -070080 struct dma_chan *chan = depend_tx->chan;
81 struct dma_device *device = chan->device;
Dan Williams19242d72008-04-17 20:17:25 -070082 struct dma_async_tx_descriptor *intr_tx = (void *) ~0;
83
84 /* first check to see if we can still append to depend_tx */
Dan Williamscaa20d972010-05-17 16:24:16 -070085 txd_lock(depend_tx);
86 if (txd_parent(depend_tx) && depend_tx->chan == tx->chan) {
87 txd_chain(depend_tx, tx);
Dan Williams19242d72008-04-17 20:17:25 -070088 intr_tx = NULL;
89 }
Dan Williamscaa20d972010-05-17 16:24:16 -070090 txd_unlock(depend_tx);
Dan Williams19242d72008-04-17 20:17:25 -070091
Dan Williams95475e52009-07-14 12:19:02 -070092 /* attached dependency, flush the parent channel */
93 if (!intr_tx) {
94 device->device_issue_pending(chan);
Dan Williams19242d72008-04-17 20:17:25 -070095 return;
Dan Williams95475e52009-07-14 12:19:02 -070096 }
Dan Williams19242d72008-04-17 20:17:25 -070097
98 /* see if we can schedule an interrupt
99 * otherwise poll for completion
100 */
101 if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
Dan Williams636bdea2008-04-17 20:17:26 -0700102 intr_tx = device->device_prep_dma_interrupt(chan, 0);
Dan Williams19242d72008-04-17 20:17:25 -0700103 else
104 intr_tx = NULL;
105
106 if (intr_tx) {
107 intr_tx->callback = NULL;
108 intr_tx->callback_param = NULL;
Dan Williamscaa20d972010-05-17 16:24:16 -0700109 /* safe to chain outside the lock since we know we are
Dan Williams19242d72008-04-17 20:17:25 -0700110 * not submitted yet
111 */
Dan Williamscaa20d972010-05-17 16:24:16 -0700112 txd_chain(intr_tx, tx);
Dan Williams19242d72008-04-17 20:17:25 -0700113
114 /* check if we need to append */
Dan Williamscaa20d972010-05-17 16:24:16 -0700115 txd_lock(depend_tx);
116 if (txd_parent(depend_tx)) {
117 txd_chain(depend_tx, intr_tx);
Dan Williams19242d72008-04-17 20:17:25 -0700118 async_tx_ack(intr_tx);
119 intr_tx = NULL;
120 }
Dan Williamscaa20d972010-05-17 16:24:16 -0700121 txd_unlock(depend_tx);
Dan Williams19242d72008-04-17 20:17:25 -0700122
123 if (intr_tx) {
Dan Williamscaa20d972010-05-17 16:24:16 -0700124 txd_clear_parent(intr_tx);
Dan Williams19242d72008-04-17 20:17:25 -0700125 intr_tx->tx_submit(intr_tx);
126 async_tx_ack(intr_tx);
127 }
Dan Williams95475e52009-07-14 12:19:02 -0700128 device->device_issue_pending(chan);
Dan Williams19242d72008-04-17 20:17:25 -0700129 } else {
130 if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
131 panic("%s: DMA_ERROR waiting for depend_tx\n",
132 __func__);
133 tx->tx_submit(tx);
134 }
135}
136
137
138/**
Dan Williamsa08abd82009-06-03 11:43:59 -0700139 * submit_disposition - flags for routing an incoming operation
Dan Williams19242d72008-04-17 20:17:25 -0700140 * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
141 * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
142 * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
Dan Williamsa08abd82009-06-03 11:43:59 -0700143 *
144 * while holding depend_tx->lock we must avoid submitting new operations
145 * to prevent a circular locking dependency with drivers that already
146 * hold a channel lock when calling async_tx_run_dependencies.
Dan Williams19242d72008-04-17 20:17:25 -0700147 */
148enum submit_disposition {
149 ASYNC_TX_SUBMITTED,
150 ASYNC_TX_CHANNEL_SWITCH,
151 ASYNC_TX_DIRECT_SUBMIT,
152};
153
Dan Williams9bc89cd2007-01-02 11:10:44 -0700154void
155async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
Dan Williamsa08abd82009-06-03 11:43:59 -0700156 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700157{
Dan Williamsa08abd82009-06-03 11:43:59 -0700158 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
159
160 tx->callback = submit->cb_fn;
161 tx->callback_param = submit->cb_param;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700162
Dan Williams19242d72008-04-17 20:17:25 -0700163 if (depend_tx) {
164 enum submit_disposition s;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700165
Dan Williams19242d72008-04-17 20:17:25 -0700166 /* sanity check the dependency chain:
167 * 1/ if ack is already set then we cannot be sure
168 * we are referring to the correct operation
169 * 2/ dependencies are 1:1 i.e. two transactions can
170 * not depend on the same parent
171 */
Dan Williamscaa20d972010-05-17 16:24:16 -0700172 BUG_ON(async_tx_test_ack(depend_tx) || txd_next(depend_tx) ||
173 txd_parent(tx));
Dan Williams19242d72008-04-17 20:17:25 -0700174
175 /* the lock prevents async_tx_run_dependencies from missing
176 * the setting of ->next when ->parent != NULL
177 */
Dan Williamscaa20d972010-05-17 16:24:16 -0700178 txd_lock(depend_tx);
179 if (txd_parent(depend_tx)) {
Dan Williams19242d72008-04-17 20:17:25 -0700180 /* we have a parent so we can not submit directly
181 * if we are staying on the same channel: append
182 * else: channel switch
183 */
184 if (depend_tx->chan == chan) {
Dan Williamscaa20d972010-05-17 16:24:16 -0700185 txd_chain(depend_tx, tx);
Dan Williams19242d72008-04-17 20:17:25 -0700186 s = ASYNC_TX_SUBMITTED;
187 } else
188 s = ASYNC_TX_CHANNEL_SWITCH;
189 } else {
190 /* we do not have a parent so we may be able to submit
191 * directly if we are staying on the same channel
192 */
193 if (depend_tx->chan == chan)
194 s = ASYNC_TX_DIRECT_SUBMIT;
195 else
196 s = ASYNC_TX_CHANNEL_SWITCH;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700197 }
Dan Williamscaa20d972010-05-17 16:24:16 -0700198 txd_unlock(depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700199
Dan Williams19242d72008-04-17 20:17:25 -0700200 switch (s) {
201 case ASYNC_TX_SUBMITTED:
202 break;
203 case ASYNC_TX_CHANNEL_SWITCH:
204 async_tx_channel_switch(depend_tx, tx);
205 break;
206 case ASYNC_TX_DIRECT_SUBMIT:
Dan Williamscaa20d972010-05-17 16:24:16 -0700207 txd_clear_parent(tx);
Dan Williams19242d72008-04-17 20:17:25 -0700208 tx->tx_submit(tx);
209 break;
210 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700211 } else {
Dan Williamscaa20d972010-05-17 16:24:16 -0700212 txd_clear_parent(tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700213 tx->tx_submit(tx);
214 }
215
Dan Williamsa08abd82009-06-03 11:43:59 -0700216 if (submit->flags & ASYNC_TX_ACK)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700217 async_tx_ack(tx);
218
Dan Williams88ba2aa2009-04-09 16:16:18 -0700219 if (depend_tx)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700220 async_tx_ack(depend_tx);
221}
222EXPORT_SYMBOL_GPL(async_tx_submit);
223
224/**
Dan Williamsa08abd82009-06-03 11:43:59 -0700225 * async_trigger_callback - schedules the callback function to be run
226 * @submit: submission and completion parameters
227 *
228 * honored flags: ASYNC_TX_ACK
229 *
230 * The callback is run after any dependent operations have completed.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700231 */
232struct dma_async_tx_descriptor *
Dan Williamsa08abd82009-06-03 11:43:59 -0700233async_trigger_callback(struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700234{
235 struct dma_chan *chan;
236 struct dma_device *device;
237 struct dma_async_tx_descriptor *tx;
Dan Williamsa08abd82009-06-03 11:43:59 -0700238 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700239
240 if (depend_tx) {
241 chan = depend_tx->chan;
242 device = chan->device;
243
244 /* see if we can schedule an interrupt
245 * otherwise poll for completion
246 */
247 if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
248 device = NULL;
249
Dan Williams636bdea2008-04-17 20:17:26 -0700250 tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700251 } else
252 tx = NULL;
253
254 if (tx) {
Dan Williams3280ab3e2008-03-13 17:45:28 -0700255 pr_debug("%s: (async)\n", __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700256
Dan Williamsa08abd82009-06-03 11:43:59 -0700257 async_tx_submit(chan, tx, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700258 } else {
Dan Williams3280ab3e2008-03-13 17:45:28 -0700259 pr_debug("%s: (sync)\n", __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700260
261 /* wait for any prerequisite operations */
Dan Williamsa08abd82009-06-03 11:43:59 -0700262 async_tx_quiesce(&submit->depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700263
Dan Williamsa08abd82009-06-03 11:43:59 -0700264 async_tx_sync_epilog(submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700265 }
266
267 return tx;
268}
269EXPORT_SYMBOL_GPL(async_trigger_callback);
270
Dan Williamsd2c52b72008-07-17 17:59:55 -0700271/**
272 * async_tx_quiesce - ensure tx is complete and freeable upon return
273 * @tx - transaction to quiesce
274 */
275void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
276{
277 if (*tx) {
278 /* if ack is already set then we cannot be sure
279 * we are referring to the correct operation
280 */
281 BUG_ON(async_tx_test_ack(*tx));
282 if (dma_wait_for_async_tx(*tx) == DMA_ERROR)
283 panic("DMA_ERROR waiting for transaction\n");
284 async_tx_ack(*tx);
285 *tx = NULL;
286 }
287}
288EXPORT_SYMBOL_GPL(async_tx_quiesce);
289
Dan Williams9bc89cd2007-01-02 11:10:44 -0700290MODULE_AUTHOR("Intel Corporation");
291MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
292MODULE_LICENSE("GPL");