blob: 693dc32b606b4e915bf606c58105397f88ac40fe [file] [log] [blame]
Saeed Bishara651c74c2008-06-22 22:45:06 +02001/*
2 * arch/arm/mach-kirkwood/common.c
3 *
4 * Core functions for Marvell Kirkwood SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/serial_8250.h>
15#include <linux/mbus.h>
16#include <linux/mv643xx_eth.h>
17#include <linux/ata_platform.h>
18#include <asm/page.h>
19#include <asm/timex.h>
20#include <asm/mach/map.h>
21#include <asm/mach/time.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010022#include <mach/kirkwood.h>
Lennert Buytenhek6f088f12008-08-09 13:44:58 +020023#include <plat/cache-feroceon-l2.h>
24#include <plat/ehci-orion.h>
Saeed Bishara09c0ed22008-06-23 04:26:07 -110025#include <plat/mv_xor.h>
Lennert Buytenhek6f088f12008-08-09 13:44:58 +020026#include <plat/orion_nand.h>
27#include <plat/time.h>
Saeed Bishara651c74c2008-06-22 22:45:06 +020028#include "common.h"
29
30/*****************************************************************************
31 * I/O Address Mapping
32 ****************************************************************************/
33static struct map_desc kirkwood_io_desc[] __initdata = {
34 {
35 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
36 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
37 .length = KIRKWOOD_PCIE_IO_SIZE,
38 .type = MT_DEVICE,
39 }, {
40 .virtual = KIRKWOOD_REGS_VIRT_BASE,
41 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
42 .length = KIRKWOOD_REGS_SIZE,
43 .type = MT_DEVICE,
44 },
45};
46
47void __init kirkwood_map_io(void)
48{
49 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
50}
51
52
53/*****************************************************************************
54 * EHCI
55 ****************************************************************************/
56static struct orion_ehci_data kirkwood_ehci_data = {
57 .dram = &kirkwood_mbus_dram_info,
58};
59
60static u64 ehci_dmamask = 0xffffffffUL;
61
62
63/*****************************************************************************
64 * EHCI0
65 ****************************************************************************/
66static struct resource kirkwood_ehci_resources[] = {
67 {
68 .start = USB_PHYS_BASE,
69 .end = USB_PHYS_BASE + 0x0fff,
70 .flags = IORESOURCE_MEM,
71 }, {
72 .start = IRQ_KIRKWOOD_USB,
73 .end = IRQ_KIRKWOOD_USB,
74 .flags = IORESOURCE_IRQ,
75 },
76};
77
78static struct platform_device kirkwood_ehci = {
79 .name = "orion-ehci",
80 .id = 0,
81 .dev = {
82 .dma_mask = &ehci_dmamask,
83 .coherent_dma_mask = 0xffffffff,
84 .platform_data = &kirkwood_ehci_data,
85 },
86 .resource = kirkwood_ehci_resources,
87 .num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
88};
89
90void __init kirkwood_ehci_init(void)
91{
92 platform_device_register(&kirkwood_ehci);
93}
94
95
96/*****************************************************************************
97 * GE00
98 ****************************************************************************/
99struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
100 .t_clk = KIRKWOOD_TCLK,
101 .dram = &kirkwood_mbus_dram_info,
102};
103
104static struct resource kirkwood_ge00_shared_resources[] = {
105 {
106 .name = "ge00 base",
107 .start = GE00_PHYS_BASE + 0x2000,
108 .end = GE00_PHYS_BASE + 0x3fff,
109 .flags = IORESOURCE_MEM,
110 },
111};
112
113static struct platform_device kirkwood_ge00_shared = {
114 .name = MV643XX_ETH_SHARED_NAME,
115 .id = 0,
116 .dev = {
117 .platform_data = &kirkwood_ge00_shared_data,
118 },
119 .num_resources = 1,
120 .resource = kirkwood_ge00_shared_resources,
121};
122
123static struct resource kirkwood_ge00_resources[] = {
124 {
125 .name = "ge00 irq",
126 .start = IRQ_KIRKWOOD_GE00_SUM,
127 .end = IRQ_KIRKWOOD_GE00_SUM,
128 .flags = IORESOURCE_IRQ,
129 },
130};
131
132static struct platform_device kirkwood_ge00 = {
133 .name = MV643XX_ETH_NAME,
134 .id = 0,
135 .num_resources = 1,
136 .resource = kirkwood_ge00_resources,
137};
138
139void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
140{
141 eth_data->shared = &kirkwood_ge00_shared;
142 kirkwood_ge00.dev.platform_data = eth_data;
143
144 platform_device_register(&kirkwood_ge00_shared);
145 platform_device_register(&kirkwood_ge00);
146}
147
148
149/*****************************************************************************
150 * SoC RTC
151 ****************************************************************************/
152static struct resource kirkwood_rtc_resource = {
153 .start = RTC_PHYS_BASE,
154 .end = RTC_PHYS_BASE + SZ_16 - 1,
155 .flags = IORESOURCE_MEM,
156};
157
158void __init kirkwood_rtc_init(void)
159{
160 platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
161}
162
163
164/*****************************************************************************
165 * SATA
166 ****************************************************************************/
167static struct resource kirkwood_sata_resources[] = {
168 {
169 .name = "sata base",
170 .start = SATA_PHYS_BASE,
171 .end = SATA_PHYS_BASE + 0x5000 - 1,
172 .flags = IORESOURCE_MEM,
173 }, {
174 .name = "sata irq",
175 .start = IRQ_KIRKWOOD_SATA,
176 .end = IRQ_KIRKWOOD_SATA,
177 .flags = IORESOURCE_IRQ,
178 },
179};
180
181static struct platform_device kirkwood_sata = {
182 .name = "sata_mv",
183 .id = 0,
184 .dev = {
185 .coherent_dma_mask = 0xffffffff,
186 },
187 .num_resources = ARRAY_SIZE(kirkwood_sata_resources),
188 .resource = kirkwood_sata_resources,
189};
190
191void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
192{
193 sata_data->dram = &kirkwood_mbus_dram_info;
194 kirkwood_sata.dev.platform_data = sata_data;
195 platform_device_register(&kirkwood_sata);
196}
197
198
199/*****************************************************************************
200 * UART0
201 ****************************************************************************/
202static struct plat_serial8250_port kirkwood_uart0_data[] = {
203 {
204 .mapbase = UART0_PHYS_BASE,
205 .membase = (char *)UART0_VIRT_BASE,
206 .irq = IRQ_KIRKWOOD_UART_0,
207 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
208 .iotype = UPIO_MEM,
209 .regshift = 2,
210 .uartclk = KIRKWOOD_TCLK,
211 }, {
212 },
213};
214
215static struct resource kirkwood_uart0_resources[] = {
216 {
217 .start = UART0_PHYS_BASE,
218 .end = UART0_PHYS_BASE + 0xff,
219 .flags = IORESOURCE_MEM,
220 }, {
221 .start = IRQ_KIRKWOOD_UART_0,
222 .end = IRQ_KIRKWOOD_UART_0,
223 .flags = IORESOURCE_IRQ,
224 },
225};
226
227static struct platform_device kirkwood_uart0 = {
228 .name = "serial8250",
229 .id = 0,
230 .dev = {
231 .platform_data = kirkwood_uart0_data,
232 },
233 .resource = kirkwood_uart0_resources,
234 .num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
235};
236
237void __init kirkwood_uart0_init(void)
238{
239 platform_device_register(&kirkwood_uart0);
240}
241
242
243/*****************************************************************************
244 * UART1
245 ****************************************************************************/
246static struct plat_serial8250_port kirkwood_uart1_data[] = {
247 {
248 .mapbase = UART1_PHYS_BASE,
249 .membase = (char *)UART1_VIRT_BASE,
250 .irq = IRQ_KIRKWOOD_UART_1,
251 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
252 .iotype = UPIO_MEM,
253 .regshift = 2,
254 .uartclk = KIRKWOOD_TCLK,
255 }, {
256 },
257};
258
259static struct resource kirkwood_uart1_resources[] = {
260 {
261 .start = UART1_PHYS_BASE,
262 .end = UART1_PHYS_BASE + 0xff,
263 .flags = IORESOURCE_MEM,
264 }, {
265 .start = IRQ_KIRKWOOD_UART_1,
266 .end = IRQ_KIRKWOOD_UART_1,
267 .flags = IORESOURCE_IRQ,
268 },
269};
270
271static struct platform_device kirkwood_uart1 = {
272 .name = "serial8250",
273 .id = 1,
274 .dev = {
275 .platform_data = kirkwood_uart1_data,
276 },
277 .resource = kirkwood_uart1_resources,
278 .num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
279};
280
281void __init kirkwood_uart1_init(void)
282{
283 platform_device_register(&kirkwood_uart1);
284}
285
286
287/*****************************************************************************
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100288 * XOR
289 ****************************************************************************/
290static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
291 .dram = &kirkwood_mbus_dram_info,
292};
293
294static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK;
295
296
297/*****************************************************************************
298 * XOR0
299 ****************************************************************************/
300static struct resource kirkwood_xor0_shared_resources[] = {
301 {
302 .name = "xor 0 low",
303 .start = XOR0_PHYS_BASE,
304 .end = XOR0_PHYS_BASE + 0xff,
305 .flags = IORESOURCE_MEM,
306 }, {
307 .name = "xor 0 high",
308 .start = XOR0_HIGH_PHYS_BASE,
309 .end = XOR0_HIGH_PHYS_BASE + 0xff,
310 .flags = IORESOURCE_MEM,
311 },
312};
313
314static struct platform_device kirkwood_xor0_shared = {
315 .name = MV_XOR_SHARED_NAME,
316 .id = 0,
317 .dev = {
318 .platform_data = &kirkwood_xor_shared_data,
319 },
320 .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
321 .resource = kirkwood_xor0_shared_resources,
322};
323
324static struct resource kirkwood_xor00_resources[] = {
325 [0] = {
326 .start = IRQ_KIRKWOOD_XOR_00,
327 .end = IRQ_KIRKWOOD_XOR_00,
328 .flags = IORESOURCE_IRQ,
329 },
330};
331
332static struct mv_xor_platform_data kirkwood_xor00_data = {
333 .shared = &kirkwood_xor0_shared,
334 .hw_id = 0,
335 .pool_size = PAGE_SIZE,
336};
337
338static struct platform_device kirkwood_xor00_channel = {
339 .name = MV_XOR_NAME,
340 .id = 0,
341 .num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
342 .resource = kirkwood_xor00_resources,
343 .dev = {
344 .dma_mask = &kirkwood_xor_dmamask,
345 .coherent_dma_mask = DMA_64BIT_MASK,
346 .platform_data = (void *)&kirkwood_xor00_data,
347 },
348};
349
350static struct resource kirkwood_xor01_resources[] = {
351 [0] = {
352 .start = IRQ_KIRKWOOD_XOR_01,
353 .end = IRQ_KIRKWOOD_XOR_01,
354 .flags = IORESOURCE_IRQ,
355 },
356};
357
358static struct mv_xor_platform_data kirkwood_xor01_data = {
359 .shared = &kirkwood_xor0_shared,
360 .hw_id = 1,
361 .pool_size = PAGE_SIZE,
362};
363
364static struct platform_device kirkwood_xor01_channel = {
365 .name = MV_XOR_NAME,
366 .id = 1,
367 .num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
368 .resource = kirkwood_xor01_resources,
369 .dev = {
370 .dma_mask = &kirkwood_xor_dmamask,
371 .coherent_dma_mask = DMA_64BIT_MASK,
372 .platform_data = (void *)&kirkwood_xor01_data,
373 },
374};
375
376void __init kirkwood_xor0_init(void)
377{
378 platform_device_register(&kirkwood_xor0_shared);
379
380 /*
381 * two engines can't do memset simultaneously, this limitation
382 * satisfied by removing memset support from one of the engines.
383 */
384 dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
385 dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
386 platform_device_register(&kirkwood_xor00_channel);
387
388 dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
389 dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
390 dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
391 platform_device_register(&kirkwood_xor01_channel);
392}
393
394
395/*****************************************************************************
396 * XOR1
397 ****************************************************************************/
398static struct resource kirkwood_xor1_shared_resources[] = {
399 {
400 .name = "xor 1 low",
401 .start = XOR1_PHYS_BASE,
402 .end = XOR1_PHYS_BASE + 0xff,
403 .flags = IORESOURCE_MEM,
404 }, {
405 .name = "xor 1 high",
406 .start = XOR1_HIGH_PHYS_BASE,
407 .end = XOR1_HIGH_PHYS_BASE + 0xff,
408 .flags = IORESOURCE_MEM,
409 },
410};
411
412static struct platform_device kirkwood_xor1_shared = {
413 .name = MV_XOR_SHARED_NAME,
414 .id = 1,
415 .dev = {
416 .platform_data = &kirkwood_xor_shared_data,
417 },
418 .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
419 .resource = kirkwood_xor1_shared_resources,
420};
421
422static struct resource kirkwood_xor10_resources[] = {
423 [0] = {
424 .start = IRQ_KIRKWOOD_XOR_10,
425 .end = IRQ_KIRKWOOD_XOR_10,
426 .flags = IORESOURCE_IRQ,
427 },
428};
429
430static struct mv_xor_platform_data kirkwood_xor10_data = {
431 .shared = &kirkwood_xor1_shared,
432 .hw_id = 0,
433 .pool_size = PAGE_SIZE,
434};
435
436static struct platform_device kirkwood_xor10_channel = {
437 .name = MV_XOR_NAME,
438 .id = 2,
439 .num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
440 .resource = kirkwood_xor10_resources,
441 .dev = {
442 .dma_mask = &kirkwood_xor_dmamask,
443 .coherent_dma_mask = DMA_64BIT_MASK,
444 .platform_data = (void *)&kirkwood_xor10_data,
445 },
446};
447
448static struct resource kirkwood_xor11_resources[] = {
449 [0] = {
450 .start = IRQ_KIRKWOOD_XOR_11,
451 .end = IRQ_KIRKWOOD_XOR_11,
452 .flags = IORESOURCE_IRQ,
453 },
454};
455
456static struct mv_xor_platform_data kirkwood_xor11_data = {
457 .shared = &kirkwood_xor1_shared,
458 .hw_id = 1,
459 .pool_size = PAGE_SIZE,
460};
461
462static struct platform_device kirkwood_xor11_channel = {
463 .name = MV_XOR_NAME,
464 .id = 3,
465 .num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
466 .resource = kirkwood_xor11_resources,
467 .dev = {
468 .dma_mask = &kirkwood_xor_dmamask,
469 .coherent_dma_mask = DMA_64BIT_MASK,
470 .platform_data = (void *)&kirkwood_xor11_data,
471 },
472};
473
474void __init kirkwood_xor1_init(void)
475{
476 platform_device_register(&kirkwood_xor1_shared);
477
478 /*
479 * two engines can't do memset simultaneously, this limitation
480 * satisfied by removing memset support from one of the engines.
481 */
482 dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
483 dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
484 platform_device_register(&kirkwood_xor10_channel);
485
486 dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
487 dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
488 dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
489 platform_device_register(&kirkwood_xor11_channel);
490}
491
492
493/*****************************************************************************
Saeed Bishara651c74c2008-06-22 22:45:06 +0200494 * Time handling
495 ****************************************************************************/
496static void kirkwood_timer_init(void)
497{
498 orion_time_init(IRQ_KIRKWOOD_BRIDGE, KIRKWOOD_TCLK);
499}
500
501struct sys_timer kirkwood_timer = {
502 .init = kirkwood_timer_init,
503};
504
505
506/*****************************************************************************
507 * General
508 ****************************************************************************/
509static char * __init kirkwood_id(void)
510{
511 switch (readl(DEVICE_ID) & 0x3) {
512 case 0:
513 return "88F6180";
514 case 1:
515 return "88F6192";
516 case 2:
517 return "88F6281";
518 }
519
520 return "unknown 88F6000 variant";
521}
522
Saeed Bishara13387602008-06-23 01:05:08 -1100523static int __init is_l2_writethrough(void)
524{
525 return !!(readl(L2_CONFIG_REG) & L2_WRITETHROUGH);
526}
527
Saeed Bishara651c74c2008-06-22 22:45:06 +0200528void __init kirkwood_init(void)
529{
530 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
531 kirkwood_id(), KIRKWOOD_TCLK);
532
533 kirkwood_setup_cpu_mbus();
534
535#ifdef CONFIG_CACHE_FEROCEON_L2
Saeed Bishara13387602008-06-23 01:05:08 -1100536 feroceon_l2_init(is_l2_writethrough());
Saeed Bishara651c74c2008-06-22 22:45:06 +0200537#endif
538}