blob: d53abf75198facc473b4f656d036ec0de4eb1be6 [file] [log] [blame]
David S. Miller3eb80572009-01-21 21:30:23 -08001#ifndef __PCR_H
2#define __PCR_H
3
4struct pcr_ops {
David S. Miller09d053c2012-08-16 23:19:32 -07005 u64 (*read_pcr)(unsigned long);
6 void (*write_pcr)(unsigned long, u64);
7 u64 (*read_pic)(unsigned long);
8 void (*write_pic)(unsigned long, u64);
David S. Miller3eb80572009-01-21 21:30:23 -08009};
10extern const struct pcr_ops *pcr_ops;
11
12extern void deferred_pcr_work_irq(int irq, struct pt_regs *regs);
13extern void schedule_deferred_pcr_work(void);
14
15#define PCR_PIC_PRIV 0x00000001 /* PIC access is privileged */
16#define PCR_STRACE 0x00000002 /* Trace supervisor events */
17#define PCR_UTRACE 0x00000004 /* Trace user events */
18#define PCR_N2_HTRACE 0x00000008 /* Trace hypervisor events */
19#define PCR_N2_TOE_OV0 0x00000010 /* Trap if PIC 0 overflows */
20#define PCR_N2_TOE_OV1 0x00000020 /* Trap if PIC 1 overflows */
21#define PCR_N2_MASK0 0x00003fc0
22#define PCR_N2_MASK0_SHIFT 6
23#define PCR_N2_SL0 0x0003c000
24#define PCR_N2_SL0_SHIFT 14
25#define PCR_N2_OV0 0x00040000
26#define PCR_N2_MASK1 0x07f80000
27#define PCR_N2_MASK1_SHIFT 19
28#define PCR_N2_SL1 0x78000000
29#define PCR_N2_SL1_SHIFT 27
30#define PCR_N2_OV1 0x80000000
31
David S. Millere5553a62009-01-29 21:22:47 -080032extern unsigned int picl_shift;
33
34/* In order to commonize as much of the implementation as
35 * possible, we use PICH as our counter. Mostly this is
Lucas De Marchi25985ed2011-03-30 22:57:33 -030036 * to accommodate Niagara-1 which can only count insn cycles
David S. Millere5553a62009-01-29 21:22:47 -080037 * in PICH.
38 */
39static inline u64 picl_value(unsigned int nmi_hz)
40{
41 u32 delta = local_cpu_data().clock_tick / (nmi_hz << picl_shift);
42
43 return ((u64)((0 - delta) & 0xffffffff)) << 32;
44}
45
46extern u64 pcr_enable;
47
David S. Millerb62818e2011-02-15 15:04:07 -080048extern int pcr_arch_init(void);
49
David S. Miller3eb80572009-01-21 21:30:23 -080050#endif /* __PCR_H */