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Guenter Roeck3ce88592012-08-18 09:06:27 -07001/*
2 * NXP SC18IS602/603 SPI driver
3 *
4 * Copyright (C) Guenter Roeck <linux@roeck-us.net>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/kernel.h>
22#include <linux/err.h>
23#include <linux/module.h>
24#include <linux/spi/spi.h>
25#include <linux/i2c.h>
26#include <linux/delay.h>
27#include <linux/pm_runtime.h>
28#include <linux/of.h>
29#include <linux/platform_data/sc18is602.h>
30
31enum chips { sc18is602, sc18is602b, sc18is603 };
32
33#define SC18IS602_BUFSIZ 200
34#define SC18IS602_CLOCK 7372000
35
36#define SC18IS602_MODE_CPHA BIT(2)
37#define SC18IS602_MODE_CPOL BIT(3)
38#define SC18IS602_MODE_LSB_FIRST BIT(5)
39#define SC18IS602_MODE_CLOCK_DIV_4 0x0
40#define SC18IS602_MODE_CLOCK_DIV_16 0x1
41#define SC18IS602_MODE_CLOCK_DIV_64 0x2
42#define SC18IS602_MODE_CLOCK_DIV_128 0x3
43
44struct sc18is602 {
45 struct spi_master *master;
46 struct device *dev;
47 u8 ctrl;
48 u32 freq;
49 u32 speed;
50
51 /* I2C data */
52 struct i2c_client *client;
53 enum chips id;
54 u8 buffer[SC18IS602_BUFSIZ + 1];
55 int tlen; /* Data queued for tx in buffer */
56 int rindex; /* Receive data index in buffer */
57};
58
59static int sc18is602_wait_ready(struct sc18is602 *hw, int len)
60{
61 int i, err;
62 int usecs = 1000000 * len / hw->speed + 1;
63 u8 dummy[1];
64
65 for (i = 0; i < 10; i++) {
66 err = i2c_master_recv(hw->client, dummy, 1);
67 if (err >= 0)
68 return 0;
69 usleep_range(usecs, usecs * 2);
70 }
71 return -ETIMEDOUT;
72}
73
74static int sc18is602_txrx(struct sc18is602 *hw, struct spi_message *msg,
75 struct spi_transfer *t, bool do_transfer)
76{
77 unsigned int len = t->len;
78 int ret;
79
80 if (hw->tlen == 0) {
81 /* First byte (I2C command) is chip select */
82 hw->buffer[0] = 1 << msg->spi->chip_select;
83 hw->tlen = 1;
84 hw->rindex = 0;
85 }
86 /*
87 * We can not immediately send data to the chip, since each I2C message
88 * resembles a full SPI message (from CS active to CS inactive).
89 * Enqueue messages up to the first read or until do_transfer is true.
90 */
91 if (t->tx_buf) {
92 memcpy(&hw->buffer[hw->tlen], t->tx_buf, len);
93 hw->tlen += len;
94 if (t->rx_buf)
95 do_transfer = true;
96 else
97 hw->rindex = hw->tlen - 1;
98 } else if (t->rx_buf) {
99 /*
100 * For receive-only transfers we still need to perform a dummy
101 * write to receive data from the SPI chip.
102 * Read data starts at the end of transmit data (minus 1 to
103 * account for CS).
104 */
105 hw->rindex = hw->tlen - 1;
106 memset(&hw->buffer[hw->tlen], 0, len);
107 hw->tlen += len;
108 do_transfer = true;
109 }
110
111 if (do_transfer && hw->tlen > 1) {
112 ret = sc18is602_wait_ready(hw, SC18IS602_BUFSIZ);
113 if (ret < 0)
114 return ret;
115 ret = i2c_master_send(hw->client, hw->buffer, hw->tlen);
116 if (ret < 0)
117 return ret;
118 if (ret != hw->tlen)
119 return -EIO;
120
121 if (t->rx_buf) {
122 int rlen = hw->rindex + len;
123
124 ret = sc18is602_wait_ready(hw, hw->tlen);
125 if (ret < 0)
126 return ret;
127 ret = i2c_master_recv(hw->client, hw->buffer, rlen);
128 if (ret < 0)
129 return ret;
130 if (ret != rlen)
131 return -EIO;
132 memcpy(t->rx_buf, &hw->buffer[hw->rindex], len);
133 }
134 hw->tlen = 0;
135 }
136 return len;
137}
138
139static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode)
140{
141 u8 ctrl = 0;
142 int ret;
143
144 if (mode & SPI_CPHA)
145 ctrl |= SC18IS602_MODE_CPHA;
146 if (mode & SPI_CPOL)
147 ctrl |= SC18IS602_MODE_CPOL;
148 if (mode & SPI_LSB_FIRST)
149 ctrl |= SC18IS602_MODE_LSB_FIRST;
150
151 /* Find the closest clock speed */
152 if (hz >= hw->freq / 4) {
153 ctrl |= SC18IS602_MODE_CLOCK_DIV_4;
154 hw->speed = hw->freq / 4;
155 } else if (hz >= hw->freq / 16) {
156 ctrl |= SC18IS602_MODE_CLOCK_DIV_16;
157 hw->speed = hw->freq / 16;
158 } else if (hz >= hw->freq / 64) {
159 ctrl |= SC18IS602_MODE_CLOCK_DIV_64;
160 hw->speed = hw->freq / 64;
161 } else {
162 ctrl |= SC18IS602_MODE_CLOCK_DIV_128;
163 hw->speed = hw->freq / 128;
164 }
165
166 /*
167 * Don't do anything if the control value did not change. The initial
168 * value of 0xff for hw->ctrl ensures that the correct mode will be set
169 * with the first call to this function.
170 */
171 if (ctrl == hw->ctrl)
172 return 0;
173
174 ret = i2c_smbus_write_byte_data(hw->client, 0xf0, ctrl);
175 if (ret < 0)
176 return ret;
177
178 hw->ctrl = ctrl;
179
180 return 0;
181}
182
183static int sc18is602_check_transfer(struct spi_device *spi,
184 struct spi_transfer *t, int tlen)
185{
Guenter Roeck3ce88592012-08-18 09:06:27 -0700186 if (t && t->len + tlen > SC18IS602_BUFSIZ)
187 return -EINVAL;
188
Guenter Roeck3ce88592012-08-18 09:06:27 -0700189 return 0;
190}
191
192static int sc18is602_transfer_one(struct spi_master *master,
193 struct spi_message *m)
194{
195 struct sc18is602 *hw = spi_master_get_devdata(master);
196 struct spi_device *spi = m->spi;
197 struct spi_transfer *t;
198 int status = 0;
199
Guenter Roeck3ce88592012-08-18 09:06:27 -0700200 hw->tlen = 0;
201 list_for_each_entry(t, &m->transfers, transfer_list) {
Guenter Roeck3ce88592012-08-18 09:06:27 -0700202 bool do_transfer;
203
204 status = sc18is602_check_transfer(spi, t, hw->tlen);
205 if (status < 0)
206 break;
207
Axel Lin09e99bc2014-02-28 18:39:33 +0800208 status = sc18is602_setup_transfer(hw, t->speed_hz, spi->mode);
Guenter Roeck3ce88592012-08-18 09:06:27 -0700209 if (status < 0)
210 break;
211
212 do_transfer = t->cs_change || list_is_last(&t->transfer_list,
213 &m->transfers);
214
215 if (t->len) {
216 status = sc18is602_txrx(hw, m, t, do_transfer);
217 if (status < 0)
218 break;
219 m->actual_length += status;
220 }
221 status = 0;
222
223 if (t->delay_usecs)
224 udelay(t->delay_usecs);
225 }
Guenter Roeck3ce88592012-08-18 09:06:27 -0700226 m->status = status;
227 spi_finalize_current_message(master);
228
229 return status;
230}
231
Axel Linc5c67e32014-02-11 20:54:17 +0800232static int sc18is602_setup(struct spi_device *spi)
233{
234 struct sc18is602 *hw = spi_master_get_devdata(spi->master);
235
236 /* SC18IS602 does not support CS2 */
237 if (hw->id == sc18is602 && spi->chip_select == 2)
238 return -ENXIO;
239
240 return 0;
241}
242
Guenter Roeck3ce88592012-08-18 09:06:27 -0700243static int sc18is602_probe(struct i2c_client *client,
244 const struct i2c_device_id *id)
245{
246 struct device *dev = &client->dev;
247 struct device_node *np = dev->of_node;
248 struct sc18is602_platform_data *pdata = dev_get_platdata(dev);
249 struct sc18is602 *hw;
250 struct spi_master *master;
251 int error;
252
253 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
254 I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
Guenter Roeck58ed90d2012-08-22 17:28:55 -0700255 return -EINVAL;
Guenter Roeck3ce88592012-08-18 09:06:27 -0700256
257 master = spi_alloc_master(dev, sizeof(struct sc18is602));
258 if (!master)
259 return -ENOMEM;
260
261 hw = spi_master_get_devdata(master);
262 i2c_set_clientdata(client, hw);
263
264 hw->master = master;
265 hw->client = client;
266 hw->dev = dev;
267 hw->ctrl = 0xff;
268
269 hw->id = id->driver_data;
270
271 switch (hw->id) {
272 case sc18is602:
273 case sc18is602b:
274 master->num_chipselect = 4;
275 hw->freq = SC18IS602_CLOCK;
276 break;
277 case sc18is603:
278 master->num_chipselect = 2;
279 if (pdata) {
280 hw->freq = pdata->clock_frequency;
281 } else {
282 const __be32 *val;
283 int len;
284
285 val = of_get_property(np, "clock-frequency", &len);
286 if (val && len >= sizeof(__be32))
287 hw->freq = be32_to_cpup(val);
288 }
289 if (!hw->freq)
290 hw->freq = SC18IS602_CLOCK;
291 break;
292 }
293 master->bus_num = client->adapter->nr;
294 master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST;
Axel Lin463654c2014-01-17 18:00:42 +0800295 master->bits_per_word_mask = SPI_BPW_MASK(8);
Axel Linc5c67e32014-02-11 20:54:17 +0800296 master->setup = sc18is602_setup;
Guenter Roeck3ce88592012-08-18 09:06:27 -0700297 master->transfer_one_message = sc18is602_transfer_one;
298 master->dev.of_node = np;
Axel Lin09e99bc2014-02-28 18:39:33 +0800299 master->min_speed_hz = hw->freq / 128;
300 master->max_speed_hz = hw->freq / 4;
Guenter Roeck3ce88592012-08-18 09:06:27 -0700301
Jingoo Han15e09642013-12-04 14:14:30 +0900302 error = devm_spi_register_master(dev, master);
Guenter Roeck3ce88592012-08-18 09:06:27 -0700303 if (error)
304 goto error_reg;
305
306 return 0;
307
308error_reg:
309 spi_master_put(master);
310 return error;
311}
312
Guenter Roeck3ce88592012-08-18 09:06:27 -0700313static const struct i2c_device_id sc18is602_id[] = {
314 { "sc18is602", sc18is602 },
315 { "sc18is602b", sc18is602b },
316 { "sc18is603", sc18is603 },
317 { }
318};
319MODULE_DEVICE_TABLE(i2c, sc18is602_id);
320
321static struct i2c_driver sc18is602_driver = {
322 .driver = {
323 .name = "sc18is602",
324 },
325 .probe = sc18is602_probe,
Guenter Roeck3ce88592012-08-18 09:06:27 -0700326 .id_table = sc18is602_id,
327};
328
329module_i2c_driver(sc18is602_driver);
330
331MODULE_DESCRIPTION("SC18IC602/603 SPI Master Driver");
332MODULE_AUTHOR("Guenter Roeck");
333MODULE_LICENSE("GPL");