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Catalin Marinas8ad68bb2005-10-31 14:25:02 +00001/*
2 * linux/arch/arm/mach-realview/realview_eb.c
3 *
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000022#include <linux/init.h>
Russell King1be72282005-10-31 16:57:06 +000023#include <linux/platform_device.h>
Kay Sieversedbaa602011-12-21 16:26:03 -080024#include <linux/device.h>
Russell Kinga62c80e2006-01-07 13:52:45 +000025#include <linux/amba/bus.h>
Russell Kingeb7fffa2009-07-05 22:41:31 +010026#include <linux/amba/pl061.h>
Linus Walleij6ef297f2009-09-22 14:29:36 +010027#include <linux/amba/mmci.h>
Linus Walleijd6ada862010-07-14 23:58:38 +010028#include <linux/amba/pl022.h>
Russell Kingfced80c2008-09-06 12:10:45 +010029#include <linux/io.h>
Rob Herring520f7bd2012-12-27 13:10:24 -060030#include <linux/irqchip/arm-gic.h>
Linus Walleijf9a6aa42012-08-06 18:32:08 +020031#include <linux/platform_data/clk-realview.h>
Robin Holt7b6d8642013-07-08 16:01:40 -070032#include <linux/reboot.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000033
Arnd Bergmann6d407a62015-11-25 17:32:22 +010034#include "hardware.h"
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000035#include <asm/irq.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000036#include <asm/mach-types.h>
Catalin Marinascc9897d2010-06-21 15:12:40 +010037#include <asm/pgtable.h>
Catalin Marinas7770bdd2007-02-05 14:48:24 +010038#include <asm/hardware/cache-l2x0.h>
Marc Zyngier7c380f22011-08-04 11:57:04 +010039#include <asm/smp_twd.h>
Mark Rutlandcbed8382014-05-23 12:12:04 +010040#include <asm/system_info.h>
Arnd Bergmann2b749cb2015-11-25 17:32:18 +010041#include <asm/outercache.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000042
43#include <asm/mach/arch.h>
44#include <asm/mach/map.h>
Catalin Marinas8cc4c542008-02-04 17:43:02 +010045#include <asm/mach/time.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000046
Arnd Bergmann6d407a62015-11-25 17:32:22 +010047#include "board-eb.h"
Arnd Bergmann38d2cfc2015-11-25 17:32:23 +010048#include "irqs-eb.h"
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000049
50#include "core.h"
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000051
52static struct map_desc realview_eb_io_desc[] __initdata = {
Russell King1ffedce2005-11-02 14:14:37 +000053 {
54 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
55 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
56 .length = SZ_4K,
57 .type = MT_DEVICE,
58 }, {
Catalin Marinas073b6ff2008-04-18 22:43:09 +010059 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
60 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000061 .length = SZ_4K,
62 .type = MT_DEVICE,
63 }, {
Catalin Marinas073b6ff2008-04-18 22:43:09 +010064 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
65 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000066 .length = SZ_4K,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
70 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
71 .length = SZ_4K,
72 .type = MT_DEVICE,
73 }, {
Catalin Marinas80192732008-04-18 22:43:11 +010074 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
75 .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000076 .length = SZ_4K,
77 .type = MT_DEVICE,
78 }, {
Catalin Marinas80192732008-04-18 22:43:11 +010079 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
80 .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000081 .length = SZ_4K,
82 .type = MT_DEVICE,
83 },
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000084#ifdef CONFIG_DEBUG_LL
Russell King1ffedce2005-11-02 14:14:37 +000085 {
Catalin Marinas9a386f02008-04-18 22:43:11 +010086 .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
87 .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000088 .length = SZ_4K,
89 .type = MT_DEVICE,
90 }
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000091#endif
92};
93
Catalin Marinas7dd19e72008-02-04 17:39:00 +010094static struct map_desc realview_eb11mp_io_desc[] __initdata = {
95 {
Marc Zyngier34ae6c92012-01-24 11:56:02 +010096 .virtual = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE),
97 .pfn = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE),
98 .length = REALVIEW_EB11MP_PRIV_MEM_SIZE,
Catalin Marinas7dd19e72008-02-04 17:39:00 +010099 .type = MT_DEVICE,
100 }, {
101 .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
102 .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
103 .length = SZ_8K,
104 .type = MT_DEVICE,
105 }
106};
107
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000108static void __init realview_eb_map_io(void)
109{
110 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
Jon Callan4c3ea372008-12-01 14:54:56 +0000111 if (core_tile_eb11mp() || core_tile_a9mp())
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100112 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000113}
114
Russell Kingeb7fffa2009-07-05 22:41:31 +0100115static struct pl061_platform_data gpio0_plat_data = {
116 .gpio_base = 0,
Russell Kingeb7fffa2009-07-05 22:41:31 +0100117};
118
119static struct pl061_platform_data gpio1_plat_data = {
120 .gpio_base = 8,
Russell Kingeb7fffa2009-07-05 22:41:31 +0100121};
122
123static struct pl061_platform_data gpio2_plat_data = {
124 .gpio_base = 16,
Russell Kingeb7fffa2009-07-05 22:41:31 +0100125};
126
Linus Walleijd6ada862010-07-14 23:58:38 +0100127static struct pl022_ssp_controller ssp0_plat_data = {
128 .bus_id = 0,
129 .enable_dma = 0,
130 .num_chipselect = 1,
131};
132
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100133/*
134 * RealView EB AMBA devices
135 */
136
137/*
138 * These devices are connected via the core APB bridge
139 */
Russell King0dada612011-12-18 11:40:46 +0000140#define GPIO2_IRQ { IRQ_EB_GPIO2 }
141#define GPIO3_IRQ { IRQ_EB_GPIO3 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100142
Russell King0dada612011-12-18 11:40:46 +0000143#define AACI_IRQ { IRQ_EB_AACI }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100144#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
Russell King0dada612011-12-18 11:40:46 +0000145#define KMI0_IRQ { IRQ_EB_KMI0 }
146#define KMI1_IRQ { IRQ_EB_KMI1 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100147
148/*
149 * These devices are connected directly to the multi-layer AHB switch
150 */
Russell King0dada612011-12-18 11:40:46 +0000151#define EB_SMC_IRQ { }
152#define MPMC_IRQ { }
153#define EB_CLCD_IRQ { IRQ_EB_CLCD }
154#define DMAC_IRQ { IRQ_EB_DMA }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100155
156/*
157 * These devices are connected via the core APB bridge
158 */
Russell King0dada612011-12-18 11:40:46 +0000159#define SCTL_IRQ { }
160#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
161#define EB_GPIO0_IRQ { IRQ_EB_GPIO0 }
162#define GPIO1_IRQ { IRQ_EB_GPIO1 }
163#define EB_RTC_IRQ { IRQ_EB_RTC }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100164
165/*
166 * These devices are connected via the DMA APB bridge
167 */
Russell King0dada612011-12-18 11:40:46 +0000168#define SCI_IRQ { IRQ_EB_SCI }
169#define EB_UART0_IRQ { IRQ_EB_UART0 }
170#define EB_UART1_IRQ { IRQ_EB_UART1 }
171#define EB_UART2_IRQ { IRQ_EB_UART2 }
172#define EB_UART3_IRQ { IRQ_EB_UART3 }
173#define EB_SSP_IRQ { IRQ_EB_SSP }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100174
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000175/* FPGA Primecells */
Russell King9199340b2011-12-18 13:38:49 +0000176APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
177APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
178APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
179APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
180APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000181
182/* DevChip Primecells */
Russell King9199340b2011-12-18 13:38:49 +0000183AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL);
184AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
185AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL);
186AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
187APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
188APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
189APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
190APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
191APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
192APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
193APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
194APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
195APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
196APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data);
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000197
198static struct amba_device *amba_devs[] __initdata = {
199 &dmac_device,
200 &uart0_device,
201 &uart1_device,
202 &uart2_device,
203 &uart3_device,
204 &smc_device,
205 &clcd_device,
206 &sctl_device,
207 &wdog_device,
208 &gpio0_device,
209 &gpio1_device,
210 &gpio2_device,
211 &rtc_device,
212 &sci0_device,
213 &ssp0_device,
214 &aaci_device,
215 &mmc0_device,
216 &kmi0_device,
217 &kmi1_device,
218};
219
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100220/*
221 * RealView EB platform devices
222 */
Catalin Marinasa44ddfd2008-04-18 22:43:10 +0100223static struct resource realview_eb_flash_resource = {
224 .start = REALVIEW_EB_FLASH_BASE,
225 .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
226 .flags = IORESOURCE_MEM,
227};
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100228
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100229static struct resource realview_eb_eth_resources[] = {
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100230 [0] = {
Catalin Marinas393538e2008-04-18 22:43:11 +0100231 .start = REALVIEW_EB_ETH_BASE,
232 .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100233 .flags = IORESOURCE_MEM,
234 },
235 [1] = {
236 .start = IRQ_EB_ETH,
237 .end = IRQ_EB_ETH,
Arnd Bergmannb70661c2015-02-25 16:31:57 +0100238 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100239 },
240};
241
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100242/*
243 * Detect and register the correct Ethernet device. RealView/EB rev D
244 * platforms use the newer SMSC LAN9118 Ethernet chip
245 */
246static int eth_device_register(void)
247{
Catalin Marinas393538e2008-04-18 22:43:11 +0100248 void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
Catalin Marinas0a381332008-12-01 14:54:58 +0000249 const char *name = NULL;
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100250 u32 idrev;
251
252 if (!eth_addr)
253 return -ENOMEM;
254
255 idrev = readl(eth_addr + 0x50);
Catalin Marinas0a381332008-12-01 14:54:58 +0000256 if ((idrev & 0xFFFF0000) != 0x01180000)
257 /* SMSC LAN9118 not present, use LAN91C111 instead */
258 name = "smc91x";
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100259
260 iounmap(eth_addr);
Catalin Marinas0a381332008-12-01 14:54:58 +0000261 return realview_eth_register(name, realview_eb_eth_resources);
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100262}
263
Catalin Marinas7db21712009-02-12 16:00:21 +0100264static struct resource realview_eb_isp1761_resources[] = {
265 [0] = {
266 .start = REALVIEW_EB_USB_BASE,
267 .end = REALVIEW_EB_USB_BASE + SZ_128K - 1,
268 .flags = IORESOURCE_MEM,
269 },
270 [1] = {
271 .start = IRQ_EB_USB,
272 .end = IRQ_EB_USB,
273 .flags = IORESOURCE_IRQ,
274 },
275};
276
Will Deaconf417cba2010-04-15 10:16:26 +0100277static struct resource pmu_resources[] = {
278 [0] = {
279 .start = IRQ_EB11MP_PMU_CPU0,
280 .end = IRQ_EB11MP_PMU_CPU0,
281 .flags = IORESOURCE_IRQ,
282 },
283 [1] = {
284 .start = IRQ_EB11MP_PMU_CPU1,
285 .end = IRQ_EB11MP_PMU_CPU1,
286 .flags = IORESOURCE_IRQ,
287 },
288 [2] = {
289 .start = IRQ_EB11MP_PMU_CPU2,
290 .end = IRQ_EB11MP_PMU_CPU2,
291 .flags = IORESOURCE_IRQ,
292 },
293 [3] = {
294 .start = IRQ_EB11MP_PMU_CPU3,
295 .end = IRQ_EB11MP_PMU_CPU3,
296 .flags = IORESOURCE_IRQ,
297 },
298};
299
300static struct platform_device pmu_device = {
Sudeep KarkadaNageshadf3d17e2012-07-19 09:50:21 +0100301 .id = -1,
Will Deaconf417cba2010-04-15 10:16:26 +0100302 .num_resources = ARRAY_SIZE(pmu_resources),
303 .resource = pmu_resources,
304};
305
Linus Walleijd161edf2010-07-17 12:34:25 +0100306static struct resource char_lcd_resources[] = {
307 {
308 .start = REALVIEW_CHAR_LCD_BASE,
309 .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
310 .flags = IORESOURCE_MEM,
311 },
312 {
313 .start = IRQ_EB_CHARLCD,
314 .end = IRQ_EB_CHARLCD,
315 .flags = IORESOURCE_IRQ,
316 },
317};
318
319static struct platform_device char_lcd_device = {
320 .name = "arm-charlcd",
321 .id = -1,
322 .num_resources = ARRAY_SIZE(char_lcd_resources),
323 .resource = char_lcd_resources,
324};
325
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000326static void __init gic_init_irq(void)
327{
Jon Callan4c3ea372008-12-01 14:54:56 +0000328 if (core_tile_eb11mp() || core_tile_a9mp()) {
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100329 unsigned int pldctrl;
330
331 /* new irq mode */
332 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
333 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
334 pldctrl |= 0x00800000;
335 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
336 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
337
338 /* core tile GIC, primary */
Russell Kingb580b892010-12-04 15:55:14 +0000339 gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE),
Russell Kingff2e27a2010-12-04 16:13:29 +0000340 __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100341
Catalin Marinas41579f42008-02-04 17:47:04 +0100342#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100343 /* board GIC, secondary */
Pawel Moll0efc48e2011-03-17 13:10:22 +0100344 gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
Russell Kingb580b892010-12-04 15:55:14 +0000345 __io_address(REALVIEW_EB_GIC_CPU_BASE));
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100346 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
Russell King9b1283b2005-11-07 21:01:06 +0000347#endif
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100348 } else {
349 /* board GIC, primary */
Russell Kingb580b892010-12-04 15:55:14 +0000350 gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE),
Russell Kingff2e27a2010-12-04 16:13:29 +0000351 __io_address(REALVIEW_EB_GIC_CPU_BASE));
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100352 }
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000353}
354
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100355/*
356 * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
357 */
358static void realview_eb11mp_fixup(void)
359{
360 /* AMBA devices */
361 dmac_device.irq[0] = IRQ_EB11MP_DMA;
362 uart0_device.irq[0] = IRQ_EB11MP_UART0;
363 uart1_device.irq[0] = IRQ_EB11MP_UART1;
364 uart2_device.irq[0] = IRQ_EB11MP_UART2;
365 uart3_device.irq[0] = IRQ_EB11MP_UART3;
366 clcd_device.irq[0] = IRQ_EB11MP_CLCD;
367 wdog_device.irq[0] = IRQ_EB11MP_WDOG;
368 gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
369 gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
370 gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
371 rtc_device.irq[0] = IRQ_EB11MP_RTC;
372 sci0_device.irq[0] = IRQ_EB11MP_SCI;
373 ssp0_device.irq[0] = IRQ_EB11MP_SSP;
374 aaci_device.irq[0] = IRQ_EB11MP_AACI;
375 mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
376 mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
377 kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
378 kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
379
380 /* platform devices */
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100381 realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
382 realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
Catalin Marinas7db21712009-02-12 16:00:21 +0100383 realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB;
384 realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB;
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100385}
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100386
Marc Zyngier7c380f22011-08-04 11:57:04 +0100387#ifdef CONFIG_HAVE_ARM_TWD
388static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
389 REALVIEW_EB11MP_TWD_BASE,
390 IRQ_LOCALTIMER);
391
392static void __init realview_eb_twd_init(void)
393{
394 if (core_tile_eb11mp() || core_tile_a9mp()) {
395 int err = twd_local_timer_register(&twd_local_timer);
396 if (err)
397 pr_err("twd_local_timer_register failed %d\n", err);
398 }
399}
400#else
401#define realview_eb_twd_init() do { } while(0)
402#endif
403
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100404static void __init realview_eb_timer_init(void)
405{
406 unsigned int timer_irq;
407
Catalin Marinas80192732008-04-18 22:43:11 +0100408 timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
409 timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
410 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
411 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
412
Marc Zyngier7c380f22011-08-04 11:57:04 +0100413 if (core_tile_eb11mp() || core_tile_a9mp())
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100414 timer_irq = IRQ_EB11MP_TIMER0_1;
Marc Zyngier7c380f22011-08-04 11:57:04 +0100415 else
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100416 timer_irq = IRQ_EB_TIMER0_1;
417
Linus Walleijf9a6aa42012-08-06 18:32:08 +0200418 realview_clk_init(__io_address(REALVIEW_SYS_BASE), false);
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100419 realview_timer_init(timer_irq);
Marc Zyngier7c380f22011-08-04 11:57:04 +0100420 realview_eb_twd_init();
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100421}
422
Robin Holt7b6d8642013-07-08 16:01:40 -0700423static void realview_eb_restart(enum reboot_mode mode, const char *cmd)
Colin Tuckley4c9f8be2010-01-11 11:09:15 +0100424{
425 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
426 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
427
428 /*
429 * To reset, we hit the on-board reset register
430 * in the system FPGA
431 */
432 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
433 if (core_tile_eb11mp())
434 __raw_writel(0x0008, reset_ctrl);
Russell King47cacdd42011-11-03 14:00:13 +0000435 dsb();
Colin Tuckley4c9f8be2010-01-11 11:09:15 +0100436}
437
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000438static void __init realview_eb_init(void)
439{
440 int i;
441
Jon Callan4c3ea372008-12-01 14:54:56 +0000442 if (core_tile_eb11mp() || core_tile_a9mp()) {
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100443 realview_eb11mp_fixup();
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100444
Catalin Marinasba927952008-04-18 22:43:17 +0100445#ifdef CONFIG_CACHE_L2X0
Russell King39b53452014-03-19 14:53:54 +0000446 /*
447 * The PL220 needs to be manually configured as the hardware
448 * doesn't report the correct sizes.
449 * 1MB (128KB/way), 8-way associativity, event monitor and
450 * parity enabled, ignore share bit, no force write allocate
451 * Bits: .... ...0 0111 1001 0000 .... .... ....
452 */
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100453 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
Arnd Bergmann2b749cb2015-11-25 17:32:18 +0100454
455 /*
456 * due to a bug in the l220 cache controller, we must not call
457 * the sync function. stub it out here instead!
458 */
459 outer_cache.sync = NULL;
Catalin Marinasba927952008-04-18 22:43:17 +0100460#endif
Mark Rutlandcbed8382014-05-23 12:12:04 +0100461 pmu_device.name = core_tile_a9mp() ? "armv7-pmu" : "armv6-pmu";
Will Deaconf417cba2010-04-15 10:16:26 +0100462 platform_device_register(&pmu_device);
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100463 }
464
Catalin Marinasa44ddfd2008-04-18 22:43:10 +0100465 realview_flash_register(&realview_eb_flash_resource, 1);
Russell King6b65cd72006-12-10 21:21:32 +0100466 platform_device_register(&realview_i2c_device);
Linus Walleijd161edf2010-07-17 12:34:25 +0100467 platform_device_register(&char_lcd_device);
Linus Walleije4ecf2b2014-02-27 14:29:22 +0100468 platform_device_register(&realview_leds_device);
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100469 eth_device_register();
Catalin Marinas7db21712009-02-12 16:00:21 +0100470 realview_usb_register(realview_eb_isp1761_resources);
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000471
472 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
473 struct amba_device *d = amba_devs[i];
474 amba_device_register(d, &iomem_resource);
475 }
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000476}
477
478MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
479 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
Nicolas Pitre9ddea572011-07-05 22:38:16 -0400480 .atag_offset = 0x100,
Steve Capper810883f2012-12-06 11:44:59 +0100481 .smp = smp_ops(realview_smp_ops),
Catalin Marinas5b39d152009-11-04 12:19:04 +0000482 .fixup = realview_fixup,
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000483 .map_io = realview_eb_map_io,
Russell King631e55f2011-01-11 13:05:01 +0000484 .init_early = realview_init_early,
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000485 .init_irq = gic_init_irq,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700486 .init_time = realview_eb_timer_init,
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000487 .init_machine = realview_eb_init,
Nicolas Pitre00e91252011-07-05 22:28:09 -0400488#ifdef CONFIG_ZONE_DMA
489 .dma_zone_size = SZ_256M,
490#endif
Russell King47cacdd42011-11-03 14:00:13 +0000491 .restart = realview_eb_restart,
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000492MACHINE_END