blob: ff0b75813daa21cff6f8baccfbf453a06ebf383b [file] [log] [blame]
Haibo Chen9a436d52015-09-05 11:31:21 -07001/*
2 * Freescale i.MX6UL touchscreen controller driver
3 *
4 * Copyright (C) 2015 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/errno.h>
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/gpio/consumer.h>
15#include <linux/input.h>
16#include <linux/slab.h>
17#include <linux/completion.h>
18#include <linux/delay.h>
19#include <linux/of.h>
20#include <linux/interrupt.h>
21#include <linux/platform_device.h>
22#include <linux/clk.h>
23#include <linux/io.h>
24
25/* ADC configuration registers field define */
26#define ADC_AIEN (0x1 << 7)
27#define ADC_CONV_DISABLE 0x1F
28#define ADC_CAL (0x1 << 7)
29#define ADC_CALF 0x2
30#define ADC_12BIT_MODE (0x2 << 2)
31#define ADC_IPG_CLK 0x00
32#define ADC_CLK_DIV_8 (0x03 << 5)
33#define ADC_SHORT_SAMPLE_MODE (0x0 << 4)
34#define ADC_HARDWARE_TRIGGER (0x1 << 13)
35#define SELECT_CHANNEL_4 0x04
36#define SELECT_CHANNEL_1 0x01
37#define DISABLE_CONVERSION_INT (0x0 << 7)
38
39/* ADC registers */
40#define REG_ADC_HC0 0x00
41#define REG_ADC_HC1 0x04
42#define REG_ADC_HC2 0x08
43#define REG_ADC_HC3 0x0C
44#define REG_ADC_HC4 0x10
45#define REG_ADC_HS 0x14
46#define REG_ADC_R0 0x18
47#define REG_ADC_CFG 0x2C
48#define REG_ADC_GC 0x30
49#define REG_ADC_GS 0x34
50
51#define ADC_TIMEOUT msecs_to_jiffies(100)
52
53/* TSC registers */
54#define REG_TSC_BASIC_SETING 0x00
55#define REG_TSC_PRE_CHARGE_TIME 0x10
56#define REG_TSC_FLOW_CONTROL 0x20
57#define REG_TSC_MEASURE_VALUE 0x30
58#define REG_TSC_INT_EN 0x40
59#define REG_TSC_INT_SIG_EN 0x50
60#define REG_TSC_INT_STATUS 0x60
61#define REG_TSC_DEBUG_MODE 0x70
62#define REG_TSC_DEBUG_MODE2 0x80
63
64/* TSC configuration registers field define */
65#define DETECT_4_WIRE_MODE (0x0 << 4)
66#define AUTO_MEASURE 0x1
67#define MEASURE_SIGNAL 0x1
68#define DETECT_SIGNAL (0x1 << 4)
69#define VALID_SIGNAL (0x1 << 8)
70#define MEASURE_INT_EN 0x1
71#define MEASURE_SIG_EN 0x1
72#define VALID_SIG_EN (0x1 << 8)
73#define DE_GLITCH_2 (0x2 << 29)
74#define START_SENSE (0x1 << 12)
75#define TSC_DISABLE (0x1 << 16)
76#define DETECT_MODE 0x2
77
78struct imx6ul_tsc {
79 struct device *dev;
80 struct input_dev *input;
81 void __iomem *tsc_regs;
82 void __iomem *adc_regs;
83 struct clk *tsc_clk;
84 struct clk *adc_clk;
85 struct gpio_desc *xnur_gpio;
86
87 int measure_delay_time;
88 int pre_charge_time;
89
90 struct completion completion;
91};
92
93/*
94 * TSC module need ADC to get the measure value. So
95 * before config TSC, we should initialize ADC module.
96 */
97static void imx6ul_adc_init(struct imx6ul_tsc *tsc)
98{
99 int adc_hc = 0;
100 int adc_gc;
101 int adc_gs;
102 int adc_cfg;
103 int timeout;
104
105 reinit_completion(&tsc->completion);
106
107 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
108 adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK;
109 adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE;
110 adc_cfg &= ~ADC_HARDWARE_TRIGGER;
111 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
112
113 /* enable calibration interrupt */
114 adc_hc |= ADC_AIEN;
115 adc_hc |= ADC_CONV_DISABLE;
116 writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
117
118 /* start ADC calibration */
119 adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
120 adc_gc |= ADC_CAL;
121 writel(adc_gc, tsc->adc_regs + REG_ADC_GC);
122
123 timeout = wait_for_completion_timeout
124 (&tsc->completion, ADC_TIMEOUT);
125 if (timeout == 0)
126 dev_err(tsc->dev, "Timeout for adc calibration\n");
127
128 adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
129 if (adc_gs & ADC_CALF)
130 dev_err(tsc->dev, "ADC calibration failed\n");
131
132 /* TSC need the ADC work in hardware trigger */
133 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
134 adc_cfg |= ADC_HARDWARE_TRIGGER;
135 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
136}
137
138/*
139 * This is a TSC workaround. Currently TSC misconnect two
140 * ADC channels, this function remap channel configure for
141 * hardware trigger.
142 */
143static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
144{
145 int adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4;
146
147 adc_hc0 = DISABLE_CONVERSION_INT;
148 writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
149
150 adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4;
151 writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
152
153 adc_hc2 = DISABLE_CONVERSION_INT;
154 writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
155
156 adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1;
157 writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
158
159 adc_hc4 = DISABLE_CONVERSION_INT;
160 writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
161}
162
163/*
164 * TSC setting, confige the pre-charge time and measure delay time.
165 * different touch screen may need different pre-charge time and
166 * measure delay time.
167 */
168static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
169{
170 int basic_setting = 0;
171 int start;
172
173 basic_setting |= tsc->measure_delay_time << 8;
174 basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
175 writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING);
176
177 writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
178
179 writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME);
180 writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN);
181 writel(MEASURE_SIG_EN | VALID_SIG_EN,
182 tsc->tsc_regs + REG_TSC_INT_SIG_EN);
183
184 /* start sense detection */
185 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
186 start |= START_SENSE;
187 start &= ~TSC_DISABLE;
188 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
189}
190
191static void imx6ul_tsc_init(struct imx6ul_tsc *tsc)
192{
193 imx6ul_adc_init(tsc);
194 imx6ul_tsc_channel_config(tsc);
195 imx6ul_tsc_set(tsc);
196}
197
198static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc)
199{
200 int tsc_flow;
201 int adc_cfg;
202
203 /* TSC controller enters to idle status */
204 tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
205 tsc_flow |= TSC_DISABLE;
206 writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
207
208 /* ADC controller enters to stop mode */
209 adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0);
210 adc_cfg |= ADC_CONV_DISABLE;
211 writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0);
212}
213
214/* Delay some time (max 2ms), wait the pre-charge done. */
215static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc)
216{
217 unsigned long timeout = jiffies + msecs_to_jiffies(2);
218 int state_machine;
219 int debug_mode2;
220
221 do {
222 if (time_after(jiffies, timeout))
223 return false;
224
225 usleep_range(200, 400);
226 debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
227 state_machine = (debug_mode2 >> 20) & 0x7;
228 } while (state_machine != DETECT_MODE);
229
230 usleep_range(200, 400);
231 return true;
232}
233
234static irqreturn_t tsc_irq_fn(int irq, void *dev_id)
235{
236 struct imx6ul_tsc *tsc = dev_id;
237 int status;
238 int value;
239 int x, y;
240 int start;
241
242 status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS);
243
244 /* write 1 to clear the bit measure-signal */
245 writel(MEASURE_SIGNAL | DETECT_SIGNAL,
246 tsc->tsc_regs + REG_TSC_INT_STATUS);
247
248 /* It's a HW self-clean bit. Set this bit and start sense detection */
249 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
250 start |= START_SENSE;
251 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
252
253 if (status & MEASURE_SIGNAL) {
254 value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
255 x = (value >> 16) & 0x0fff;
256 y = value & 0x0fff;
257
258 /*
259 * In detect mode, we can get the xnur gpio value,
260 * otherwise assume contact is stiull active.
261 */
262 if (!tsc_wait_detect_mode(tsc) ||
263 gpiod_get_value_cansleep(tsc->xnur_gpio)) {
264 input_report_key(tsc->input, BTN_TOUCH, 1);
265 input_report_abs(tsc->input, ABS_X, x);
266 input_report_abs(tsc->input, ABS_Y, y);
267 } else {
268 input_report_key(tsc->input, BTN_TOUCH, 0);
269 }
270
271 input_sync(tsc->input);
272 }
273
274 return IRQ_HANDLED;
275}
276
277static irqreturn_t adc_irq_fn(int irq, void *dev_id)
278{
279 struct imx6ul_tsc *tsc = dev_id;
280 int coco;
281 int value;
282
283 coco = readl(tsc->adc_regs + REG_ADC_HS);
284 if (coco & 0x01) {
285 value = readl(tsc->adc_regs + REG_ADC_R0);
286 complete(&tsc->completion);
287 }
288
289 return IRQ_HANDLED;
290}
291
292static int imx6ul_tsc_open(struct input_dev *input_dev)
293{
294 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
295 int err;
296
297 err = clk_prepare_enable(tsc->adc_clk);
298 if (err) {
299 dev_err(tsc->dev,
300 "Could not prepare or enable the adc clock: %d\n",
301 err);
302 return err;
303 }
304
305 err = clk_prepare_enable(tsc->tsc_clk);
306 if (err) {
307 dev_err(tsc->dev,
308 "Could not prepare or enable the tsc clock: %d\n",
309 err);
310 clk_disable_unprepare(tsc->adc_clk);
311 return err;
312 }
313
314 imx6ul_tsc_init(tsc);
315
316 return 0;
317}
318
319static void imx6ul_tsc_close(struct input_dev *input_dev)
320{
321 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
322
323 imx6ul_tsc_disable(tsc);
324
325 clk_disable_unprepare(tsc->tsc_clk);
326 clk_disable_unprepare(tsc->adc_clk);
327}
328
329static int imx6ul_tsc_probe(struct platform_device *pdev)
330{
331 struct device_node *np = pdev->dev.of_node;
332 struct imx6ul_tsc *tsc;
333 struct input_dev *input_dev;
334 struct resource *tsc_mem;
335 struct resource *adc_mem;
336 int err;
337 int tsc_irq;
338 int adc_irq;
339
340 tsc = devm_kzalloc(&pdev->dev, sizeof(struct imx6ul_tsc), GFP_KERNEL);
341 if (!tsc)
342 return -ENOMEM;
343
344 input_dev = devm_input_allocate_device(&pdev->dev);
345 if (!input_dev)
346 return -ENOMEM;
347
348 input_dev->name = "iMX6UL TouchScreen Controller";
349 input_dev->id.bustype = BUS_HOST;
350
351 input_dev->open = imx6ul_tsc_open;
352 input_dev->close = imx6ul_tsc_close;
353
354 input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
355 input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0);
356 input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0);
357
358 input_set_drvdata(input_dev, tsc);
359
360 tsc->dev = &pdev->dev;
361 tsc->input = input_dev;
362 init_completion(&tsc->completion);
363
364 tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN);
365 if (IS_ERR(tsc->xnur_gpio)) {
366 err = PTR_ERR(tsc->xnur_gpio);
367 dev_err(&pdev->dev,
368 "failed to request GPIO tsc_X- (xnur): %d\n", err);
369 return err;
370 }
371
372 tsc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
373 tsc->tsc_regs = devm_ioremap_resource(&pdev->dev, tsc_mem);
374 if (IS_ERR(tsc->tsc_regs)) {
375 err = PTR_ERR(tsc->tsc_regs);
376 dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err);
377 return err;
378 }
379
380 adc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
381 tsc->adc_regs = devm_ioremap_resource(&pdev->dev, adc_mem);
382 if (IS_ERR(tsc->adc_regs)) {
383 err = PTR_ERR(tsc->adc_regs);
384 dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err);
385 return err;
386 }
387
388 tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc");
389 if (IS_ERR(tsc->tsc_clk)) {
390 err = PTR_ERR(tsc->tsc_clk);
391 dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err);
392 return err;
393 }
394
395 tsc->adc_clk = devm_clk_get(&pdev->dev, "adc");
396 if (IS_ERR(tsc->adc_clk)) {
397 err = PTR_ERR(tsc->adc_clk);
398 dev_err(&pdev->dev, "failed getting adc clock: %d\n", err);
399 return err;
400 }
401
402 tsc_irq = platform_get_irq(pdev, 0);
403 if (tsc_irq < 0) {
404 dev_err(&pdev->dev, "no tsc irq resource?\n");
405 return tsc_irq;
406 }
407
408 adc_irq = platform_get_irq(pdev, 1);
409 if (adc_irq <= 0) {
410 dev_err(&pdev->dev, "no adc irq resource?\n");
411 return adc_irq;
412 }
413
414 err = devm_request_threaded_irq(tsc->dev, tsc_irq,
415 NULL, tsc_irq_fn, IRQF_ONESHOT,
416 dev_name(&pdev->dev), tsc);
417 if (err) {
418 dev_err(&pdev->dev,
419 "failed requesting tsc irq %d: %d\n",
420 tsc_irq, err);
421 return err;
422 }
423
424 err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0,
425 dev_name(&pdev->dev), tsc);
426 if (err) {
427 dev_err(&pdev->dev,
428 "failed requesting adc irq %d: %d\n",
429 adc_irq, err);
430 return err;
431 }
432
433 err = of_property_read_u32(np, "measure-delay-time",
434 &tsc->measure_delay_time);
435 if (err)
436 tsc->measure_delay_time = 0xffff;
437
438 err = of_property_read_u32(np, "pre-charge-time",
439 &tsc->pre_charge_time);
440 if (err)
441 tsc->pre_charge_time = 0xfff;
442
443 err = input_register_device(tsc->input);
444 if (err) {
445 dev_err(&pdev->dev,
446 "failed to register input device: %d\n", err);
447 return err;
448 }
449
450 platform_set_drvdata(pdev, tsc);
451 return 0;
452}
453
454static int __maybe_unused imx6ul_tsc_suspend(struct device *dev)
455{
456 struct platform_device *pdev = to_platform_device(dev);
457 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
458 struct input_dev *input_dev = tsc->input;
459
460 mutex_lock(&input_dev->mutex);
461
462 if (input_dev->users) {
463 imx6ul_tsc_disable(tsc);
464
465 clk_disable_unprepare(tsc->tsc_clk);
466 clk_disable_unprepare(tsc->adc_clk);
467 }
468
469 mutex_unlock(&input_dev->mutex);
470
471 return 0;
472}
473
474static int __maybe_unused imx6ul_tsc_resume(struct device *dev)
475{
476 struct platform_device *pdev = to_platform_device(dev);
477 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
478 struct input_dev *input_dev = tsc->input;
479 int retval = 0;
480
481 mutex_lock(&input_dev->mutex);
482
483 if (input_dev->users) {
484 retval = clk_prepare_enable(tsc->adc_clk);
485 if (retval)
486 goto out;
487
488 retval = clk_prepare_enable(tsc->tsc_clk);
489 if (retval) {
490 clk_disable_unprepare(tsc->adc_clk);
491 goto out;
492 }
493
494 imx6ul_tsc_init(tsc);
495 }
496
497out:
498 mutex_unlock(&input_dev->mutex);
499 return retval;
500}
501
502static SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops,
503 imx6ul_tsc_suspend, imx6ul_tsc_resume);
504
505static const struct of_device_id imx6ul_tsc_match[] = {
506 { .compatible = "fsl,imx6ul-tsc", },
507 { /* sentinel */ }
508};
509MODULE_DEVICE_TABLE(of, imx6ul_tsc_match);
510
511static struct platform_driver imx6ul_tsc_driver = {
512 .driver = {
513 .name = "imx6ul-tsc",
514 .of_match_table = imx6ul_tsc_match,
515 .pm = &imx6ul_tsc_pm_ops,
516 },
517 .probe = imx6ul_tsc_probe,
518};
519module_platform_driver(imx6ul_tsc_driver);
520
521MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>");
522MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver");
523MODULE_LICENSE("GPL v2");