Benjamin Herrenschmidt | 0b05ac6 | 2011-04-04 13:46:58 +1000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright 2011 IBM Corporation. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License |
| 6 | * as published by the Free Software Foundation; either version |
| 7 | * 2 of the License, or (at your option) any later version. |
| 8 | * |
| 9 | */ |
| 10 | #include <linux/types.h> |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/irq.h> |
| 13 | #include <linux/smp.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/cpu.h> |
| 17 | #include <linux/of.h> |
| 18 | #include <linux/spinlock.h> |
| 19 | |
| 20 | #include <asm/prom.h> |
| 21 | #include <asm/io.h> |
| 22 | #include <asm/smp.h> |
| 23 | #include <asm/irq.h> |
| 24 | #include <asm/errno.h> |
| 25 | #include <asm/xics.h> |
| 26 | |
| 27 | struct icp_ipl { |
| 28 | union { |
| 29 | u32 word; |
| 30 | u8 bytes[4]; |
| 31 | } xirr_poll; |
| 32 | union { |
| 33 | u32 word; |
| 34 | u8 bytes[4]; |
| 35 | } xirr; |
| 36 | u32 dummy; |
| 37 | union { |
| 38 | u32 word; |
| 39 | u8 bytes[4]; |
| 40 | } qirr; |
| 41 | u32 link_a; |
| 42 | u32 link_b; |
| 43 | u32 link_c; |
| 44 | }; |
| 45 | |
| 46 | static struct icp_ipl __iomem *icp_native_regs[NR_CPUS]; |
| 47 | |
| 48 | static inline unsigned int icp_native_get_xirr(void) |
| 49 | { |
| 50 | int cpu = smp_processor_id(); |
| 51 | |
| 52 | return in_be32(&icp_native_regs[cpu]->xirr.word); |
| 53 | } |
| 54 | |
| 55 | static inline void icp_native_set_xirr(unsigned int value) |
| 56 | { |
| 57 | int cpu = smp_processor_id(); |
| 58 | |
| 59 | out_be32(&icp_native_regs[cpu]->xirr.word, value); |
| 60 | } |
| 61 | |
| 62 | static inline void icp_native_set_cppr(u8 value) |
| 63 | { |
| 64 | int cpu = smp_processor_id(); |
| 65 | |
| 66 | out_8(&icp_native_regs[cpu]->xirr.bytes[0], value); |
| 67 | } |
| 68 | |
| 69 | static inline void icp_native_set_qirr(int n_cpu, u8 value) |
| 70 | { |
| 71 | out_8(&icp_native_regs[n_cpu]->qirr.bytes[0], value); |
| 72 | } |
| 73 | |
| 74 | static void icp_native_set_cpu_priority(unsigned char cppr) |
| 75 | { |
| 76 | xics_set_base_cppr(cppr); |
| 77 | icp_native_set_cppr(cppr); |
| 78 | iosync(); |
| 79 | } |
| 80 | |
| 81 | static void icp_native_eoi(struct irq_data *d) |
| 82 | { |
| 83 | unsigned int hw_irq = (unsigned int)irq_data_to_hw(d); |
| 84 | |
| 85 | iosync(); |
| 86 | icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq); |
| 87 | } |
| 88 | |
| 89 | static void icp_native_teardown_cpu(void) |
| 90 | { |
| 91 | int cpu = smp_processor_id(); |
| 92 | |
| 93 | /* Clear any pending IPI */ |
| 94 | icp_native_set_qirr(cpu, 0xff); |
| 95 | } |
| 96 | |
| 97 | static void icp_native_flush_ipi(void) |
| 98 | { |
| 99 | /* We take the ipi irq but and never return so we |
| 100 | * need to EOI the IPI, but want to leave our priority 0 |
| 101 | * |
| 102 | * should we check all the other interrupts too? |
| 103 | * should we be flagging idle loop instead? |
| 104 | * or creating some task to be scheduled? |
| 105 | */ |
| 106 | |
| 107 | icp_native_set_xirr((0x00 << 24) | XICS_IPI); |
| 108 | } |
| 109 | |
| 110 | static unsigned int icp_native_get_irq(void) |
| 111 | { |
| 112 | unsigned int xirr = icp_native_get_xirr(); |
| 113 | unsigned int vec = xirr & 0x00ffffff; |
| 114 | unsigned int irq; |
| 115 | |
| 116 | if (vec == XICS_IRQ_SPURIOUS) |
| 117 | return NO_IRQ; |
| 118 | |
| 119 | irq = irq_radix_revmap_lookup(xics_host, vec); |
| 120 | if (likely(irq != NO_IRQ)) { |
| 121 | xics_push_cppr(vec); |
| 122 | return irq; |
| 123 | } |
| 124 | |
| 125 | /* We don't have a linux mapping, so have rtas mask it. */ |
| 126 | xics_mask_unknown_vec(vec); |
| 127 | |
| 128 | /* We might learn about it later, so EOI it */ |
| 129 | icp_native_set_xirr(xirr); |
| 130 | |
| 131 | return NO_IRQ; |
| 132 | } |
| 133 | |
| 134 | #ifdef CONFIG_SMP |
| 135 | |
| 136 | static inline void icp_native_do_message(int cpu, int msg) |
| 137 | { |
| 138 | unsigned long *tgt = &per_cpu(xics_ipi_message, cpu); |
| 139 | |
| 140 | set_bit(msg, tgt); |
| 141 | mb(); |
| 142 | icp_native_set_qirr(cpu, IPI_PRIORITY); |
| 143 | } |
| 144 | |
| 145 | static void icp_native_message_pass(int target, int msg) |
| 146 | { |
| 147 | unsigned int i; |
| 148 | |
| 149 | if (target < NR_CPUS) { |
| 150 | icp_native_do_message(target, msg); |
| 151 | } else { |
| 152 | for_each_online_cpu(i) { |
| 153 | if (target == MSG_ALL_BUT_SELF |
| 154 | && i == smp_processor_id()) |
| 155 | continue; |
| 156 | icp_native_do_message(i, msg); |
| 157 | } |
| 158 | } |
| 159 | } |
| 160 | |
| 161 | static irqreturn_t icp_native_ipi_action(int irq, void *dev_id) |
| 162 | { |
| 163 | int cpu = smp_processor_id(); |
| 164 | |
| 165 | icp_native_set_qirr(cpu, 0xff); |
| 166 | |
| 167 | return xics_ipi_dispatch(cpu); |
| 168 | } |
| 169 | |
| 170 | #endif /* CONFIG_SMP */ |
| 171 | |
| 172 | static int __init icp_native_map_one_cpu(int hw_id, unsigned long addr, |
| 173 | unsigned long size) |
| 174 | { |
| 175 | char *rname; |
| 176 | int i, cpu = -1; |
| 177 | |
| 178 | /* This may look gross but it's good enough for now, we don't quite |
| 179 | * have a hard -> linux processor id matching. |
| 180 | */ |
| 181 | for_each_possible_cpu(i) { |
| 182 | if (!cpu_present(i)) |
| 183 | continue; |
| 184 | if (hw_id == get_hard_smp_processor_id(i)) { |
| 185 | cpu = i; |
| 186 | break; |
| 187 | } |
| 188 | } |
| 189 | |
| 190 | /* Fail, skip that CPU. Don't print, it's normal, some XICS come up |
| 191 | * with way more entries in there than you have CPUs |
| 192 | */ |
| 193 | if (cpu == -1) |
| 194 | return 0; |
| 195 | |
| 196 | rname = kasprintf(GFP_KERNEL, "CPU %d [0x%x] Interrupt Presentation", |
| 197 | cpu, hw_id); |
| 198 | |
| 199 | if (!request_mem_region(addr, size, rname)) { |
| 200 | pr_warning("icp_native: Could not reserve ICP MMIO" |
| 201 | " for CPU %d, interrupt server #0x%x\n", |
| 202 | cpu, hw_id); |
| 203 | return -EBUSY; |
| 204 | } |
| 205 | |
| 206 | icp_native_regs[cpu] = ioremap(addr, size); |
| 207 | if (!icp_native_regs[cpu]) { |
| 208 | pr_warning("icp_native: Failed ioremap for CPU %d, " |
| 209 | "interrupt server #0x%x, addr %#lx\n", |
| 210 | cpu, hw_id, addr); |
| 211 | release_mem_region(addr, size); |
| 212 | return -ENOMEM; |
| 213 | } |
| 214 | return 0; |
| 215 | } |
| 216 | |
| 217 | static int __init icp_native_init_one_node(struct device_node *np, |
| 218 | unsigned int *indx) |
| 219 | { |
| 220 | unsigned int ilen; |
| 221 | const u32 *ireg; |
| 222 | int i; |
| 223 | int reg_tuple_size; |
| 224 | int num_servers = 0; |
| 225 | |
| 226 | /* This code does the theorically broken assumption that the interrupt |
| 227 | * server numbers are the same as the hard CPU numbers. |
| 228 | * This happens to be the case so far but we are playing with fire... |
| 229 | * should be fixed one of these days. -BenH. |
| 230 | */ |
| 231 | ireg = of_get_property(np, "ibm,interrupt-server-ranges", &ilen); |
| 232 | |
| 233 | /* Do that ever happen ? we'll know soon enough... but even good'old |
| 234 | * f80 does have that property .. |
| 235 | */ |
| 236 | WARN_ON((ireg == NULL) || (ilen != 2*sizeof(u32))); |
| 237 | |
| 238 | if (ireg) { |
| 239 | *indx = of_read_number(ireg, 1); |
| 240 | if (ilen >= 2*sizeof(u32)) |
| 241 | num_servers = of_read_number(ireg + 1, 1); |
| 242 | } |
| 243 | |
| 244 | ireg = of_get_property(np, "reg", &ilen); |
| 245 | if (!ireg) { |
| 246 | pr_err("icp_native: Can't find interrupt reg property"); |
| 247 | return -1; |
| 248 | } |
| 249 | |
| 250 | reg_tuple_size = (of_n_addr_cells(np) + of_n_size_cells(np)) * 4; |
| 251 | if (((ilen % reg_tuple_size) != 0) |
| 252 | || (num_servers && (num_servers != (ilen / reg_tuple_size)))) { |
| 253 | pr_err("icp_native: ICP reg len (%d) != num servers (%d)", |
| 254 | ilen / reg_tuple_size, num_servers); |
| 255 | return -1; |
| 256 | } |
| 257 | |
| 258 | for (i = 0; i < (ilen / reg_tuple_size); i++) { |
| 259 | struct resource r; |
| 260 | int err; |
| 261 | |
| 262 | err = of_address_to_resource(np, i, &r); |
| 263 | if (err) { |
| 264 | pr_err("icp_native: Could not translate ICP MMIO" |
| 265 | " for interrupt server 0x%x (%d)\n", *indx, err); |
| 266 | return -1; |
| 267 | } |
| 268 | |
| 269 | if (icp_native_map_one_cpu(*indx, r.start, r.end - r.start)) |
| 270 | return -1; |
| 271 | |
| 272 | (*indx)++; |
| 273 | } |
| 274 | return 0; |
| 275 | } |
| 276 | |
| 277 | static const struct icp_ops icp_native_ops = { |
| 278 | .get_irq = icp_native_get_irq, |
| 279 | .eoi = icp_native_eoi, |
| 280 | .set_priority = icp_native_set_cpu_priority, |
| 281 | .teardown_cpu = icp_native_teardown_cpu, |
| 282 | .flush_ipi = icp_native_flush_ipi, |
| 283 | #ifdef CONFIG_SMP |
| 284 | .ipi_action = icp_native_ipi_action, |
| 285 | .message_pass = icp_native_message_pass, |
| 286 | #endif |
| 287 | }; |
| 288 | |
| 289 | int icp_native_init(void) |
| 290 | { |
| 291 | struct device_node *np; |
| 292 | u32 indx = 0; |
| 293 | int found = 0; |
| 294 | |
| 295 | for_each_compatible_node(np, NULL, "ibm,ppc-xicp") |
| 296 | if (icp_native_init_one_node(np, &indx) == 0) |
| 297 | found = 1; |
| 298 | if (!found) { |
| 299 | for_each_node_by_type(np, |
| 300 | "PowerPC-External-Interrupt-Presentation") { |
| 301 | if (icp_native_init_one_node(np, &indx) == 0) |
| 302 | found = 1; |
| 303 | } |
| 304 | } |
| 305 | |
| 306 | if (found == 0) |
| 307 | return -ENODEV; |
| 308 | |
| 309 | icp_ops = &icp_native_ops; |
| 310 | |
| 311 | return 0; |
| 312 | } |