Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | */ |
| 6 | #ifndef _ASM_PCI_H |
| 7 | #define _ASM_PCI_H |
| 8 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | #include <linux/mm.h> |
| 10 | |
| 11 | #ifdef __KERNEL__ |
| 12 | |
| 13 | /* |
| 14 | * This file essentially defines the interface between board |
| 15 | * specific PCI code and MIPS common PCI code. Should potentially put |
| 16 | * into include/asm/pci.h file. |
| 17 | */ |
| 18 | |
| 19 | #include <linux/ioport.h> |
| 20 | |
| 21 | /* |
| 22 | * Each pci channel is a top-level PCI bus seem by CPU. A machine with |
| 23 | * multiple PCI channels may have multiple PCI host controllers or a |
| 24 | * single controller supporting multiple channels. |
| 25 | */ |
| 26 | struct pci_controller { |
| 27 | struct pci_controller *next; |
| 28 | struct pci_bus *bus; |
| 29 | |
| 30 | struct pci_ops *pci_ops; |
| 31 | struct resource *mem_resource; |
| 32 | unsigned long mem_offset; |
| 33 | struct resource *io_resource; |
| 34 | unsigned long io_offset; |
Ralf Baechle | 140c172 | 2006-12-07 15:35:43 +0100 | [diff] [blame] | 35 | unsigned long io_map_base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
| 37 | unsigned int index; |
| 38 | /* For compatibility with current (as of July 2003) pciutils |
| 39 | and XFree86. Eventually will be removed. */ |
| 40 | unsigned int need_domain_info; |
| 41 | |
| 42 | int iommu; |
Andrew Isaacson | 8a1417d | 2005-10-19 23:59:11 -0700 | [diff] [blame] | 43 | |
| 44 | /* Optional access methods for reading/writing the bus number |
| 45 | of the PCI controller */ |
| 46 | int (*get_busno)(void); |
| 47 | void (*set_busno)(int busno); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | }; |
| 49 | |
| 50 | /* |
| 51 | * Used by boards to register their PCI busses before the actual scanning. |
| 52 | */ |
| 53 | extern struct pci_controller * alloc_pci_controller(void); |
| 54 | extern void register_pci_controller(struct pci_controller *hose); |
| 55 | |
| 56 | /* |
| 57 | * board supplied pci irq fixup routine |
| 58 | */ |
Ralf Baechle | 19df0d1 | 2007-07-10 17:33:00 +0100 | [diff] [blame] | 59 | extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | |
| 61 | |
| 62 | /* Can be used to override the logic in pci_scan_bus for skipping |
| 63 | already-configured bus numbers - to be used for buggy BIOSes |
| 64 | or architectures with incomplete PCI setup by the loader */ |
| 65 | |
| 66 | extern unsigned int pcibios_assign_all_busses(void); |
| 67 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 68 | extern unsigned long PCIBIOS_MIN_IO; |
| 69 | extern unsigned long PCIBIOS_MIN_MEM; |
| 70 | |
| 71 | #define PCIBIOS_MIN_CARDBUS_IO 0x4000 |
| 72 | |
| 73 | extern void pcibios_set_master(struct pci_dev *dev); |
| 74 | |
David Shaohua Li | c9c3e45 | 2005-04-01 00:07:31 -0500 | [diff] [blame] | 75 | static inline void pcibios_penalize_isa_irq(int irq, int active) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | { |
| 77 | /* We don't do dynamic PCI IRQ allocation */ |
| 78 | } |
| 79 | |
Ralf Baechle | 98873f5 | 2008-12-09 17:58:46 +0000 | [diff] [blame] | 80 | #define HAVE_PCI_MMAP |
| 81 | |
| 82 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, |
| 83 | enum pci_mmap_state mmap_state, int write_combine); |
| 84 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | /* |
| 86 | * Dynamic DMA mapping stuff. |
| 87 | * MIPS has everything mapped statically. |
| 88 | */ |
| 89 | |
| 90 | #include <linux/types.h> |
| 91 | #include <linux/slab.h> |
| 92 | #include <asm/scatterlist.h> |
| 93 | #include <linux/string.h> |
| 94 | #include <asm/io.h> |
| 95 | |
| 96 | struct pci_dev; |
| 97 | |
| 98 | /* |
| 99 | * The PCI address space does equal the physical memory address space. The |
| 100 | * networking and block device layers use this boolean for bounce buffer |
| 101 | * decisions. This is set if any hose does not have an IOMMU. |
| 102 | */ |
| 103 | extern unsigned int PCI_DMA_BUS_IS_PHYS; |
| 104 | |
Andrew Morton | bb4a61b | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 105 | #ifdef CONFIG_PCI |
David S. Miller | e24c2d9 | 2005-06-02 12:55:50 -0700 | [diff] [blame] | 106 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, |
| 107 | enum pci_dma_burst_strategy *strat, |
| 108 | unsigned long *strategy_parameter) |
| 109 | { |
| 110 | *strat = PCI_DMA_BURST_INFINITY; |
| 111 | *strategy_parameter = ~0UL; |
| 112 | } |
Andrew Morton | bb4a61b | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 113 | #endif |
David S. Miller | e24c2d9 | 2005-06-02 12:55:50 -0700 | [diff] [blame] | 114 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | extern void pcibios_resource_to_bus(struct pci_dev *dev, |
| 116 | struct pci_bus_region *region, struct resource *res); |
Ralf Baechle | 870d3d9 | 2005-09-15 08:52:34 +0000 | [diff] [blame] | 117 | |
| 118 | extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, |
| 119 | struct pci_bus_region *region); |
| 120 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index |
| 122 | |
| 123 | static inline int pci_proc_domain(struct pci_bus *bus) |
| 124 | { |
| 125 | struct pci_controller *hose = bus->sysdata; |
| 126 | return hose->need_domain_info; |
| 127 | } |
| 128 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 129 | #endif /* __KERNEL__ */ |
| 130 | |
| 131 | /* implement the pci_ DMA API in terms of the generic device dma_ one */ |
| 132 | #include <asm-generic/pci-dma-compat.h> |
| 133 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | /* Do platform specific device initialization at pci_enable_device() time */ |
| 135 | extern int pcibios_plat_dev_init(struct pci_dev *dev); |
| 136 | |
Ralf Baechle | 5b1d221 | 2006-12-09 16:12:18 +0000 | [diff] [blame] | 137 | /* Chances are this interrupt is wired PC-style ... */ |
| 138 | static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) |
| 139 | { |
| 140 | return channel ? 15 : 14; |
| 141 | } |
| 142 | |
Chandrakala Chavva | 52a0f00 | 2010-07-26 18:14:16 -0700 | [diff] [blame] | 143 | #ifdef CONFIG_CPU_CAVIUM_OCTEON |
| 144 | /* MSI arch hook for OCTEON */ |
| 145 | #define arch_setup_msi_irqs arch_setup_msi_irqs |
| 146 | #endif |
| 147 | |
Atsushi Nemoto | af3e69c | 2008-07-04 00:59:40 +0900 | [diff] [blame] | 148 | extern int pci_probe_only; |
Atsushi Nemoto | af3e69c | 2008-07-04 00:59:40 +0900 | [diff] [blame] | 149 | |
Atsushi Nemoto | 47a5c97 | 2008-07-24 00:25:14 +0900 | [diff] [blame] | 150 | extern char * (*pcibios_plat_setup)(char *str); |
| 151 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | #endif /* _ASM_PCI_H */ |