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Tomi Valkeinen559d6702009-11-03 11:23:50 +02001/*
2 * linux/include/asm-arm/arch-omap/display.h
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef __ASM_ARCH_OMAP_DISPLAY_H
21#define __ASM_ARCH_OMAP_DISPLAY_H
22
23#include <linux/list.h>
24#include <linux/kobject.h>
25#include <linux/device.h>
26#include <asm/atomic.h>
27
28#define DISPC_IRQ_FRAMEDONE (1 << 0)
29#define DISPC_IRQ_VSYNC (1 << 1)
30#define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
31#define DISPC_IRQ_EVSYNC_ODD (1 << 3)
32#define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
33#define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
34#define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
35#define DISPC_IRQ_GFX_END_WIN (1 << 7)
36#define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
37#define DISPC_IRQ_OCP_ERR (1 << 9)
38#define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
39#define DISPC_IRQ_VID1_END_WIN (1 << 11)
40#define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
41#define DISPC_IRQ_VID2_END_WIN (1 << 13)
42#define DISPC_IRQ_SYNC_LOST (1 << 14)
43#define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
44#define DISPC_IRQ_WAKEUP (1 << 16)
45
46struct omap_dss_device;
47struct omap_overlay_manager;
48
49enum omap_display_type {
50 OMAP_DISPLAY_TYPE_NONE = 0,
51 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
52 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
53 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
54 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
55 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
56};
57
58enum omap_plane {
59 OMAP_DSS_GFX = 0,
60 OMAP_DSS_VIDEO1 = 1,
61 OMAP_DSS_VIDEO2 = 2
62};
63
64enum omap_channel {
65 OMAP_DSS_CHANNEL_LCD = 0,
66 OMAP_DSS_CHANNEL_DIGIT = 1,
67};
68
69enum omap_color_mode {
70 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
71 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
72 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
73 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
74 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
75 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
76 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
77 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
78 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
79 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
80 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
81 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
82 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
83 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
84
85 OMAP_DSS_COLOR_GFX_OMAP2 =
86 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
87 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
88 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
89 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
90
91 OMAP_DSS_COLOR_VID_OMAP2 =
92 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
93 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
94 OMAP_DSS_COLOR_UYVY,
95
96 OMAP_DSS_COLOR_GFX_OMAP3 =
97 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
98 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
99 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
100 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
101 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
102 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
103
104 OMAP_DSS_COLOR_VID1_OMAP3 =
105 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
106 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
107 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
108
109 OMAP_DSS_COLOR_VID2_OMAP3 =
110 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
111 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
112 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
113 OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
114 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
115};
116
117enum omap_lcd_display_type {
118 OMAP_DSS_LCD_DISPLAY_STN,
119 OMAP_DSS_LCD_DISPLAY_TFT,
120};
121
122enum omap_dss_load_mode {
123 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
124 OMAP_DSS_LOAD_CLUT_ONLY = 1,
125 OMAP_DSS_LOAD_FRAME_ONLY = 2,
126 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
127};
128
129enum omap_dss_trans_key_type {
130 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
131 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
132};
133
134enum omap_rfbi_te_mode {
135 OMAP_DSS_RFBI_TE_MODE_1 = 1,
136 OMAP_DSS_RFBI_TE_MODE_2 = 2,
137};
138
139enum omap_panel_config {
140 OMAP_DSS_LCD_IVS = 1<<0,
141 OMAP_DSS_LCD_IHS = 1<<1,
142 OMAP_DSS_LCD_IPC = 1<<2,
143 OMAP_DSS_LCD_IEO = 1<<3,
144 OMAP_DSS_LCD_RF = 1<<4,
145 OMAP_DSS_LCD_ONOFF = 1<<5,
146
147 OMAP_DSS_LCD_TFT = 1<<20,
148};
149
150enum omap_dss_venc_type {
151 OMAP_DSS_VENC_TYPE_COMPOSITE,
152 OMAP_DSS_VENC_TYPE_SVIDEO,
153};
154
155enum omap_display_caps {
156 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
157 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
158};
159
160enum omap_dss_update_mode {
161 OMAP_DSS_UPDATE_DISABLED = 0,
162 OMAP_DSS_UPDATE_AUTO,
163 OMAP_DSS_UPDATE_MANUAL,
164};
165
166enum omap_dss_display_state {
167 OMAP_DSS_DISPLAY_DISABLED = 0,
168 OMAP_DSS_DISPLAY_ACTIVE,
169 OMAP_DSS_DISPLAY_SUSPENDED,
170};
171
172/* XXX perhaps this should be removed */
173enum omap_dss_overlay_managers {
174 OMAP_DSS_OVL_MGR_LCD,
175 OMAP_DSS_OVL_MGR_TV,
176};
177
178enum omap_dss_rotation_type {
179 OMAP_DSS_ROT_DMA = 0,
180 OMAP_DSS_ROT_VRFB = 1,
181};
182
183/* clockwise rotation angle */
184enum omap_dss_rotation_angle {
185 OMAP_DSS_ROT_0 = 0,
186 OMAP_DSS_ROT_90 = 1,
187 OMAP_DSS_ROT_180 = 2,
188 OMAP_DSS_ROT_270 = 3,
189};
190
191enum omap_overlay_caps {
192 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
193 OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
194};
195
196enum omap_overlay_manager_caps {
197 OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
198};
199
200/* RFBI */
201
202struct rfbi_timings {
203 int cs_on_time;
204 int cs_off_time;
205 int we_on_time;
206 int we_off_time;
207 int re_on_time;
208 int re_off_time;
209 int we_cycle_time;
210 int re_cycle_time;
211 int cs_pulse_width;
212 int access_time;
213
214 int clk_div;
215
216 u32 tim[5]; /* set by rfbi_convert_timings() */
217
218 int converted;
219};
220
221void omap_rfbi_write_command(const void *buf, u32 len);
222void omap_rfbi_read_data(void *buf, u32 len);
223void omap_rfbi_write_data(const void *buf, u32 len);
224void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
225 u16 x, u16 y,
226 u16 w, u16 h);
227int omap_rfbi_enable_te(bool enable, unsigned line);
228int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
229 unsigned hs_pulse_time, unsigned vs_pulse_time,
230 int hs_pol_inv, int vs_pol_inv, int extif_div);
231
232/* DSI */
233void dsi_bus_lock(void);
234void dsi_bus_unlock(void);
235int dsi_vc_dcs_write(int channel, u8 *data, int len);
Tomi Valkeinen828c48f2009-12-16 14:53:15 +0200236int dsi_vc_dcs_write_0(int channel, u8 dcs_cmd);
237int dsi_vc_dcs_write_1(int channel, u8 dcs_cmd, u8 param);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200238int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
239int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
Tomi Valkeinen828c48f2009-12-16 14:53:15 +0200240int dsi_vc_dcs_read_1(int channel, u8 dcs_cmd, u8 *data);
Tomi Valkeinen0c244f72010-06-09 15:19:29 +0300241int dsi_vc_dcs_read_2(int channel, u8 dcs_cmd, u8 *data1, u8 *data2);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200242int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
243int dsi_vc_send_null(int channel);
244int dsi_vc_send_bta_sync(int channel);
245
246/* Board specific data */
247struct omap_dss_board_info {
248 int (*get_last_off_on_transaction_id)(struct device *dev);
249 int num_devices;
250 struct omap_dss_device **devices;
251 struct omap_dss_device *default_device;
252};
253
254struct omap_video_timings {
255 /* Unit: pixels */
256 u16 x_res;
257 /* Unit: pixels */
258 u16 y_res;
259 /* Unit: KHz */
260 u32 pixel_clock;
261 /* Unit: pixel clocks */
262 u16 hsw; /* Horizontal synchronization pulse width */
263 /* Unit: pixel clocks */
264 u16 hfp; /* Horizontal front porch */
265 /* Unit: pixel clocks */
266 u16 hbp; /* Horizontal back porch */
267 /* Unit: line clocks */
268 u16 vsw; /* Vertical synchronization pulse width */
269 /* Unit: line clocks */
270 u16 vfp; /* Vertical front porch */
271 /* Unit: line clocks */
272 u16 vbp; /* Vertical back porch */
273};
274
275#ifdef CONFIG_OMAP2_DSS_VENC
276/* Hardcoded timings for tv modes. Venc only uses these to
277 * identify the mode, and does not actually use the configs
278 * itself. However, the configs should be something that
279 * a normal monitor can also show */
Tobias Klauser5a1819e2010-05-20 17:12:52 +0200280extern const struct omap_video_timings omap_dss_pal_timings;
281extern const struct omap_video_timings omap_dss_ntsc_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200282#endif
283
284struct omap_overlay_info {
285 bool enabled;
286
287 u32 paddr;
288 void __iomem *vaddr;
289 u16 screen_width;
290 u16 width;
291 u16 height;
292 enum omap_color_mode color_mode;
293 u8 rotation;
294 enum omap_dss_rotation_type rotation_type;
295 bool mirror;
296
297 u16 pos_x;
298 u16 pos_y;
299 u16 out_width; /* if 0, out_width == width */
300 u16 out_height; /* if 0, out_height == height */
301 u8 global_alpha;
302};
303
304struct omap_overlay {
305 struct kobject kobj;
306 struct list_head list;
307
308 /* static fields */
309 const char *name;
310 int id;
311 enum omap_color_mode supported_modes;
312 enum omap_overlay_caps caps;
313
314 /* dynamic fields */
315 struct omap_overlay_manager *manager;
316 struct omap_overlay_info info;
317
318 /* if true, info has been changed, but not applied() yet */
319 bool info_dirty;
320
321 int (*set_manager)(struct omap_overlay *ovl,
322 struct omap_overlay_manager *mgr);
323 int (*unset_manager)(struct omap_overlay *ovl);
324
325 int (*set_overlay_info)(struct omap_overlay *ovl,
326 struct omap_overlay_info *info);
327 void (*get_overlay_info)(struct omap_overlay *ovl,
328 struct omap_overlay_info *info);
329
330 int (*wait_for_go)(struct omap_overlay *ovl);
331};
332
333struct omap_overlay_manager_info {
334 u32 default_color;
335
336 enum omap_dss_trans_key_type trans_key_type;
337 u32 trans_key;
338 bool trans_enabled;
339
340 bool alpha_enabled;
341};
342
343struct omap_overlay_manager {
344 struct kobject kobj;
345 struct list_head list;
346
347 /* static fields */
348 const char *name;
349 int id;
350 enum omap_overlay_manager_caps caps;
351 int num_overlays;
352 struct omap_overlay **overlays;
353 enum omap_display_type supported_displays;
354
355 /* dynamic fields */
356 struct omap_dss_device *device;
357 struct omap_overlay_manager_info info;
358
359 bool device_changed;
360 /* if true, info has been changed but not applied() yet */
361 bool info_dirty;
362
363 int (*set_device)(struct omap_overlay_manager *mgr,
364 struct omap_dss_device *dssdev);
365 int (*unset_device)(struct omap_overlay_manager *mgr);
366
367 int (*set_manager_info)(struct omap_overlay_manager *mgr,
368 struct omap_overlay_manager_info *info);
369 void (*get_manager_info)(struct omap_overlay_manager *mgr,
370 struct omap_overlay_manager_info *info);
371
372 int (*apply)(struct omap_overlay_manager *mgr);
373 int (*wait_for_go)(struct omap_overlay_manager *mgr);
Tomi Valkeinen3f71cbe2010-01-08 17:06:04 +0200374 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
Tomi Valkeinena2faee82010-01-08 17:14:53 +0200375
376 int (*enable)(struct omap_overlay_manager *mgr);
377 int (*disable)(struct omap_overlay_manager *mgr);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200378};
379
380struct omap_dss_device {
381 struct device dev;
382
383 enum omap_display_type type;
384
385 union {
386 struct {
387 u8 data_lines;
388 } dpi;
389
390 struct {
391 u8 channel;
392 u8 data_lines;
393 } rfbi;
394
395 struct {
396 u8 datapairs;
397 } sdi;
398
399 struct {
400 u8 clk_lane;
401 u8 clk_pol;
402 u8 data1_lane;
403 u8 data1_pol;
404 u8 data2_lane;
405 u8 data2_pol;
406
407 struct {
408 u16 regn;
409 u16 regm;
410 u16 regm3;
411 u16 regm4;
412
413 u16 lp_clk_div;
414
415 u16 lck_div;
416 u16 pck_div;
417 } div;
418
419 bool ext_te;
420 u8 ext_te_gpio;
421 } dsi;
422
423 struct {
424 enum omap_dss_venc_type type;
425 bool invert_polarity;
426 } venc;
427 } phy;
428
429 struct {
430 struct omap_video_timings timings;
431
432 int acbi; /* ac-bias pin transitions per interrupt */
433 /* Unit: line clocks */
434 int acb; /* ac-bias pin frequency */
435
436 enum omap_panel_config config;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200437 } panel;
438
439 struct {
440 u8 pixel_size;
441 struct rfbi_timings rfbi_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200442 } ctrl;
443
444 int reset_gpio;
445
446 int max_backlight_level;
447
448 const char *name;
449
450 /* used to match device to driver */
451 const char *driver_name;
452
453 void *data;
454
455 struct omap_dss_driver *driver;
456
457 /* helper variable for driver suspend/resume */
458 bool activate_after_resume;
459
460 enum omap_display_caps caps;
461
462 struct omap_overlay_manager *manager;
463
464 enum omap_dss_display_state state;
465
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200466 /* platform specific */
467 int (*platform_enable)(struct omap_dss_device *dssdev);
468 void (*platform_disable)(struct omap_dss_device *dssdev);
469 int (*set_backlight)(struct omap_dss_device *dssdev, int level);
470 int (*get_backlight)(struct omap_dss_device *dssdev);
471};
472
473struct omap_dss_driver {
474 struct device_driver driver;
475
476 int (*probe)(struct omap_dss_device *);
477 void (*remove)(struct omap_dss_device *);
478
479 int (*enable)(struct omap_dss_device *display);
480 void (*disable)(struct omap_dss_device *display);
481 int (*suspend)(struct omap_dss_device *display);
482 int (*resume)(struct omap_dss_device *display);
483 int (*run_test)(struct omap_dss_device *display, int test);
484
Tomi Valkeinen446f7bf2010-01-11 16:12:31 +0200485 int (*set_update_mode)(struct omap_dss_device *dssdev,
486 enum omap_dss_update_mode);
487 enum omap_dss_update_mode (*get_update_mode)(
488 struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200489
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200490 int (*update)(struct omap_dss_device *dssdev,
491 u16 x, u16 y, u16 w, u16 h);
492 int (*sync)(struct omap_dss_device *dssdev);
493
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200494 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
Tomi Valkeinen225b6502010-01-11 15:11:01 +0200495 int (*get_te)(struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200496
497 u8 (*get_rotate)(struct omap_dss_device *dssdev);
498 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
499
500 bool (*get_mirror)(struct omap_dss_device *dssdev);
501 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
502
503 int (*memory_read)(struct omap_dss_device *dssdev,
504 void *buf, size_t size,
505 u16 x, u16 y, u16 w, u16 h);
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200506
507 void (*get_resolution)(struct omap_dss_device *dssdev,
508 u16 *xres, u16 *yres);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200509 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
Tomi Valkeinen36511312010-01-19 15:53:16 +0200510
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200511 int (*check_timings)(struct omap_dss_device *dssdev,
512 struct omap_video_timings *timings);
513 void (*set_timings)(struct omap_dss_device *dssdev,
514 struct omap_video_timings *timings);
515 void (*get_timings)(struct omap_dss_device *dssdev,
516 struct omap_video_timings *timings);
517
Tomi Valkeinen36511312010-01-19 15:53:16 +0200518 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
519 u32 (*get_wss)(struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200520};
521
522int omap_dss_register_driver(struct omap_dss_driver *);
523void omap_dss_unregister_driver(struct omap_dss_driver *);
524
525int omap_dss_register_device(struct omap_dss_device *);
526void omap_dss_unregister_device(struct omap_dss_device *);
527
528void omap_dss_get_device(struct omap_dss_device *dssdev);
529void omap_dss_put_device(struct omap_dss_device *dssdev);
530#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
531struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
532struct omap_dss_device *omap_dss_find_device(void *data,
533 int (*match)(struct omap_dss_device *dssdev, void *data));
534
535int omap_dss_start_device(struct omap_dss_device *dssdev);
536void omap_dss_stop_device(struct omap_dss_device *dssdev);
537
538int omap_dss_get_num_overlay_managers(void);
539struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
540
541int omap_dss_get_num_overlays(void);
542struct omap_overlay *omap_dss_get_overlay(int num);
543
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200544void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
545 u16 *xres, u16 *yres);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200546int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
547
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200548typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
549int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
550int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
551
552int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
553int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
554 unsigned long timeout);
555
556#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
557#define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
558
Tomi Valkeinen61140c92010-01-12 16:00:30 +0200559void omapdss_dsi_vc_enable_hs(int channel, bool enable);
Tomi Valkeinen225b6502010-01-11 15:11:01 +0200560int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
Tomi Valkeinen61140c92010-01-12 16:00:30 +0200561
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200562int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
563 u16 *x, u16 *y, u16 *w, u16 *h);
564int omap_dsi_update(struct omap_dss_device *dssdev,
565 int channel,
566 u16 x, u16 y, u16 w, u16 h,
567 void (*callback)(int, void *), void *data);
568
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200569int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
570void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
571
572int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
573void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200574void dpi_set_timings(struct omap_dss_device *dssdev,
575 struct omap_video_timings *timings);
576int dpi_check_timings(struct omap_dss_device *dssdev,
577 struct omap_video_timings *timings);
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200578
579int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
580void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
581
582int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
583void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200584int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
585 u16 *x, u16 *y, u16 *w, u16 *h);
586int omap_rfbi_update(struct omap_dss_device *dssdev,
587 u16 x, u16 y, u16 w, u16 h,
588 void (*callback)(void *), void *data);
589
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200590#endif