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Kukjin Kim7d30e8b2011-02-14 16:33:10 +09001/* linux arch/arm/mach-exynos4/hotplug.c
Changhwan Youn11adcc22010-08-20 18:17:51 +09002 *
3 * Cloned from linux/arch/arm/mach-realview/hotplug.c
4 *
5 * Copyright (C) 2002 ARM Ltd.
6 * All Rights Reserved
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/errno.h>
15#include <linux/smp.h>
JungHi Min911c29b2011-07-16 13:39:09 +090016#include <linux/io.h>
Changhwan Youn11adcc22010-08-20 18:17:51 +090017
18#include <asm/cacheflush.h>
Russell King15d07dc2012-03-28 18:30:01 +010019#include <asm/cp15.h>
Will Deaconeb504392012-01-20 12:01:12 +010020#include <asm/smp_plat.h>
Changhwan Youn11adcc22010-08-20 18:17:51 +090021
JungHi Min911c29b2011-07-16 13:39:09 +090022#include <mach/regs-pmu.h>
Abhilash Kesavan756e46d2012-11-22 14:46:17 +090023#include <plat/cpu.h>
JungHi Min911c29b2011-07-16 13:39:09 +090024
Marc Zyngier06853ae2011-09-08 13:15:22 +010025#include "common.h"
26
Abhilash Kesavan756e46d2012-11-22 14:46:17 +090027static inline void cpu_enter_lowpower_a9(void)
Changhwan Youn11adcc22010-08-20 18:17:51 +090028{
29 unsigned int v;
30
Changhwan Youn11adcc22010-08-20 18:17:51 +090031 asm volatile(
32 " mcr p15, 0, %1, c7, c5, 0\n"
33 " mcr p15, 0, %1, c7, c10, 4\n"
34 /*
35 * Turn off coherency
36 */
37 " mrc p15, 0, %0, c1, c0, 1\n"
Kukjin Kimad849a22011-02-28 20:35:33 +090038 " bic %0, %0, %3\n"
Changhwan Youn11adcc22010-08-20 18:17:51 +090039 " mcr p15, 0, %0, c1, c0, 1\n"
40 " mrc p15, 0, %0, c1, c0, 0\n"
Russell King30b99d02011-01-14 12:06:26 +000041 " bic %0, %0, %2\n"
Changhwan Youn11adcc22010-08-20 18:17:51 +090042 " mcr p15, 0, %0, c1, c0, 0\n"
43 : "=&r" (v)
Kukjin Kimad849a22011-02-28 20:35:33 +090044 : "r" (0), "Ir" (CR_C), "Ir" (0x40)
Changhwan Youn11adcc22010-08-20 18:17:51 +090045 : "cc");
46}
47
Abhilash Kesavan756e46d2012-11-22 14:46:17 +090048static inline void cpu_enter_lowpower_a15(void)
49{
50 unsigned int v;
51
52 asm volatile(
53 " mrc p15, 0, %0, c1, c0, 0\n"
54 " bic %0, %0, %1\n"
55 " mcr p15, 0, %0, c1, c0, 0\n"
56 : "=&r" (v)
57 : "Ir" (CR_C)
58 : "cc");
59
60 flush_cache_louis();
61
62 asm volatile(
63 /*
64 * Turn off coherency
65 */
66 " mrc p15, 0, %0, c1, c0, 1\n"
67 " bic %0, %0, %1\n"
68 " mcr p15, 0, %0, c1, c0, 1\n"
69 : "=&r" (v)
70 : "Ir" (0x40)
71 : "cc");
72
73 isb();
74 dsb();
75}
76
Changhwan Youn11adcc22010-08-20 18:17:51 +090077static inline void cpu_leave_lowpower(void)
78{
79 unsigned int v;
80
81 asm volatile(
82 "mrc p15, 0, %0, c1, c0, 0\n"
Russell Kinge3d9c622010-12-19 11:36:33 +000083 " orr %0, %0, %1\n"
Changhwan Youn11adcc22010-08-20 18:17:51 +090084 " mcr p15, 0, %0, c1, c0, 0\n"
85 " mrc p15, 0, %0, c1, c0, 1\n"
Kukjin Kimad849a22011-02-28 20:35:33 +090086 " orr %0, %0, %2\n"
Changhwan Youn11adcc22010-08-20 18:17:51 +090087 " mcr p15, 0, %0, c1, c0, 1\n"
88 : "=&r" (v)
Kukjin Kimad849a22011-02-28 20:35:33 +090089 : "Ir" (CR_C), "Ir" (0x40)
Changhwan Youn11adcc22010-08-20 18:17:51 +090090 : "cc");
91}
92
Russell Kingd4450262010-12-19 11:30:43 +000093static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
Changhwan Youn11adcc22010-08-20 18:17:51 +090094{
Changhwan Youn11adcc22010-08-20 18:17:51 +090095 for (;;) {
JungHi Min911c29b2011-07-16 13:39:09 +090096
97 /* make cpu1 to be turned off at next WFI command */
98 if (cpu == 1)
99 __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
100
Changhwan Youn11adcc22010-08-20 18:17:51 +0900101 /*
102 * here's the WFI
103 */
104 asm(".word 0xe320f003\n"
105 :
106 :
107 : "memory", "cc");
108
Will Deacon2f41c362011-08-09 11:29:19 +0100109 if (pen_release == cpu_logical_map(cpu)) {
Changhwan Youn11adcc22010-08-20 18:17:51 +0900110 /*
111 * OK, proper wakeup, we're done
112 */
113 break;
114 }
115
116 /*
Russell Kingd4450262010-12-19 11:30:43 +0000117 * Getting here, means that we have come out of WFI without
Changhwan Youn11adcc22010-08-20 18:17:51 +0900118 * having been woken up - this shouldn't happen
119 *
Russell Kingd4450262010-12-19 11:30:43 +0000120 * Just note it happening - when we're woken, we can report
121 * its occurrence.
Changhwan Youn11adcc22010-08-20 18:17:51 +0900122 */
Russell Kingd4450262010-12-19 11:30:43 +0000123 (*spurious)++;
Changhwan Youn11adcc22010-08-20 18:17:51 +0900124 }
125}
126
Changhwan Youn11adcc22010-08-20 18:17:51 +0900127/*
128 * platform-specific code to shutdown a CPU
129 *
130 * Called with IRQs disabled
131 */
Marc Zyngier06853ae2011-09-08 13:15:22 +0100132void __ref exynos_cpu_die(unsigned int cpu)
Changhwan Youn11adcc22010-08-20 18:17:51 +0900133{
Russell Kingd4450262010-12-19 11:30:43 +0000134 int spurious = 0;
Abhilash Kesavan756e46d2012-11-22 14:46:17 +0900135 int primary_part = 0;
Russell Kingd4450262010-12-19 11:30:43 +0000136
Changhwan Youn11adcc22010-08-20 18:17:51 +0900137 /*
Abhilash Kesavan756e46d2012-11-22 14:46:17 +0900138 * we're ready for shutdown now, so do it.
139 * Exynos4 is A9 based while Exynos5 is A15; check the CPU part
140 * number by reading the Main ID register and then perform the
141 * appropriate sequence for entering low power.
Changhwan Youn11adcc22010-08-20 18:17:51 +0900142 */
Abhilash Kesavan756e46d2012-11-22 14:46:17 +0900143 asm("mrc p15, 0, %0, c0, c0, 0" : "=r"(primary_part) : : "cc");
144 if ((primary_part & 0xfff0) == 0xc0f0)
145 cpu_enter_lowpower_a15();
146 else
147 cpu_enter_lowpower_a9();
148
Russell Kingd4450262010-12-19 11:30:43 +0000149 platform_do_lowpower(cpu, &spurious);
Changhwan Youn11adcc22010-08-20 18:17:51 +0900150
151 /*
152 * bring this CPU back into the world of cache
153 * coherency, and then restore interrupts
154 */
155 cpu_leave_lowpower();
Russell Kingd4450262010-12-19 11:30:43 +0000156
157 if (spurious)
158 pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
Changhwan Youn11adcc22010-08-20 18:17:51 +0900159}