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Ben Dooksa21765a2007-02-11 18:31:01 +01001/* linux/arch/arm/mach-s3c2440/dma.c
Ben Dooks98c418a2006-09-15 23:45:17 +01002 *
Ben Dooksc16f7bd2006-12-17 20:05:21 +01003 * Copyright (c) 2006 Simtec Electronics
Ben Dooks98c418a2006-09-15 23:45:17 +01004 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2440 DMA selection
7 *
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/init.h>
Kay Sievers4a858cf2011-12-21 16:01:38 -080017#include <linux/device.h>
Ben Dooksb6d1f542006-12-17 23:22:26 +010018#include <linux/serial_core.h>
Ben Dooks98c418a2006-09-15 23:45:17 +010019
Ben Dooks44dc9402009-03-19 15:02:35 +000020#include <mach/map.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010021#include <mach/dma.h>
Ben Dooks98c418a2006-09-15 23:45:17 +010022
Ben Dooks992426b2010-02-20 23:01:33 +000023#include <plat/dma-s3c24xx.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010024#include <plat/cpu.h>
Ben Dooks98c418a2006-09-15 23:45:17 +010025
Ben Dooksa2b7ba92008-10-07 22:26:09 +010026#include <plat/regs-serial.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010027#include <mach/regs-gpio.h>
Ben Dooks44dc9402009-03-19 15:02:35 +000028#include <plat/regs-dma.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010029#include <mach/regs-lcd.h>
Ben Dooks13622702008-10-30 10:14:38 +000030#include <plat/regs-spi.h>
Ben Dooks98c418a2006-09-15 23:45:17 +010031
32static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
33 [DMACH_XD0] = {
34 .name = "xdreq0",
35 .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
36 },
37 [DMACH_XD1] = {
38 .name = "xdreq1",
39 .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
40 },
41 [DMACH_SDI] = {
42 .name = "sdi",
43 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
44 .channels[1] = S3C2440_DCON_CH1_SDI | DMA_CH_VALID,
45 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
46 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
Ben Dooks98c418a2006-09-15 23:45:17 +010047 },
48 [DMACH_SPI0] = {
49 .name = "spi0",
50 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
Ben Dooks98c418a2006-09-15 23:45:17 +010051 },
52 [DMACH_SPI1] = {
53 .name = "spi1",
54 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
Ben Dooks98c418a2006-09-15 23:45:17 +010055 },
56 [DMACH_UART0] = {
57 .name = "uart0",
58 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
Ben Dooks98c418a2006-09-15 23:45:17 +010059 },
60 [DMACH_UART1] = {
61 .name = "uart1",
62 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
Ben Dooks98c418a2006-09-15 23:45:17 +010063 },
64 [DMACH_UART2] = {
65 .name = "uart2",
66 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
Ben Dooks98c418a2006-09-15 23:45:17 +010067 },
68 [DMACH_TIMER] = {
69 .name = "timer",
70 .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
71 .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
72 .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
73 },
74 [DMACH_I2S_IN] = {
75 .name = "i2s-sdi",
76 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
77 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
Ben Dooks98c418a2006-09-15 23:45:17 +010078 },
79 [DMACH_I2S_OUT] = {
80 .name = "i2s-sdo",
81 .channels[0] = S3C2440_DCON_CH0_I2SSDO | DMA_CH_VALID,
82 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
Ben Dooks98c418a2006-09-15 23:45:17 +010083 },
84 [DMACH_PCM_IN] = {
85 .name = "pcm-in",
86 .channels[0] = S3C2440_DCON_CH0_PCMIN | DMA_CH_VALID,
87 .channels[2] = S3C2440_DCON_CH2_PCMIN | DMA_CH_VALID,
Ben Dooks98c418a2006-09-15 23:45:17 +010088 },
89 [DMACH_PCM_OUT] = {
90 .name = "pcm-out",
91 .channels[1] = S3C2440_DCON_CH1_PCMOUT | DMA_CH_VALID,
92 .channels[3] = S3C2440_DCON_CH3_PCMOUT | DMA_CH_VALID,
Ben Dooks98c418a2006-09-15 23:45:17 +010093 },
94 [DMACH_MIC_IN] = {
95 .name = "mic-in",
96 .channels[2] = S3C2440_DCON_CH2_MICIN | DMA_CH_VALID,
97 .channels[3] = S3C2440_DCON_CH3_MICIN | DMA_CH_VALID,
Ben Dooks98c418a2006-09-15 23:45:17 +010098 },
99 [DMACH_USB_EP1] = {
100 .name = "usb-ep1",
101 .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
102 },
103 [DMACH_USB_EP2] = {
104 .name = "usb-ep2",
105 .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
106 },
107 [DMACH_USB_EP3] = {
108 .name = "usb-ep3",
109 .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
110 },
111 [DMACH_USB_EP4] = {
112 .name = "usb-ep4",
113 .channels[3] = S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
114 },
115};
116
117static void s3c2440_dma_select(struct s3c2410_dma_chan *chan,
118 struct s3c24xx_dma_map *map)
119{
120 chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
121}
122
123static struct s3c24xx_dma_selection __initdata s3c2440_dma_sel = {
124 .select = s3c2440_dma_select,
125 .dcon_mask = 7 << 24,
126 .map = s3c2440_dma_mappings,
127 .map_size = ARRAY_SIZE(s3c2440_dma_mappings),
128};
129
Ben Dooksbd65c822007-02-13 13:14:12 +0100130static struct s3c24xx_dma_order __initdata s3c2440_dma_order = {
131 .channels = {
132 [DMACH_SDI] = {
133 .list = {
134 [0] = 3 | DMA_CH_VALID,
135 [1] = 2 | DMA_CH_VALID,
136 [2] = 1 | DMA_CH_VALID,
137 [3] = 0 | DMA_CH_VALID,
138 },
139 },
140 [DMACH_I2S_IN] = {
141 .list = {
142 [0] = 1 | DMA_CH_VALID,
143 [1] = 2 | DMA_CH_VALID,
144 },
145 },
146 [DMACH_I2S_OUT] = {
147 .list = {
148 [0] = 2 | DMA_CH_VALID,
149 [1] = 1 | DMA_CH_VALID,
150 },
151 },
152 [DMACH_PCM_IN] = {
153 .list = {
154 [0] = 2 | DMA_CH_VALID,
155 [1] = 1 | DMA_CH_VALID,
156 },
157 },
158 [DMACH_PCM_OUT] = {
159 .list = {
160 [0] = 1 | DMA_CH_VALID,
161 [1] = 3 | DMA_CH_VALID,
162 },
163 },
164 [DMACH_MIC_IN] = {
165 .list = {
166 [0] = 3 | DMA_CH_VALID,
167 [1] = 2 | DMA_CH_VALID,
168 },
169 },
170 },
171};
172
Heiko Stuebner04511a62012-01-27 15:35:25 +0900173static int __init s3c2440_dma_add(struct device *dev,
174 struct subsys_interface *sif)
Ben Dooks98c418a2006-09-15 23:45:17 +0100175{
Ben Dooks48adbcf2007-02-17 15:37:14 +0100176 s3c2410_dma_init();
Ben Dooksbd65c822007-02-13 13:14:12 +0100177 s3c24xx_dma_order_set(&s3c2440_dma_order);
Ben Dooks98c418a2006-09-15 23:45:17 +0100178 return s3c24xx_dma_init_map(&s3c2440_dma_sel);
179}
180
Kay Sievers4a858cf2011-12-21 16:01:38 -0800181static struct subsys_interface s3c2440_dma_interface = {
182 .name = "s3c2440_dma",
183 .subsys = &s3c2440_subsys,
184 .add_dev = s3c2440_dma_add,
Ben Dooks98c418a2006-09-15 23:45:17 +0100185};
186
187static int __init s3c2440_dma_init(void)
188{
Kay Sievers4a858cf2011-12-21 16:01:38 -0800189 return subsys_interface_register(&s3c2440_dma_interface);
Ben Dooks98c418a2006-09-15 23:45:17 +0100190}
191
192arch_initcall(s3c2440_dma_init);
193