Ben Dooks | 74b265d | 2008-10-21 14:06:31 +0100 | [diff] [blame] | 1 | /* linux/arch/arm/plat-s3c/init.c |
| 2 | * |
| 3 | * Copyright (c) 2008 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * http://armlinux.simtec.co.uk/ |
| 6 | * |
| 7 | * S3C series CPU initialisation |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/ioport.h> |
| 18 | #include <linux/serial_core.h> |
| 19 | #include <linux/platform_device.h> |
Ben Dooks | 74b265d | 2008-10-21 14:06:31 +0100 | [diff] [blame] | 20 | |
| 21 | #include <mach/hardware.h> |
| 22 | |
| 23 | #include <asm/mach/arch.h> |
| 24 | #include <asm/mach/map.h> |
| 25 | |
| 26 | #include <plat/cpu.h> |
| 27 | #include <plat/devs.h> |
| 28 | #include <plat/clock.h> |
| 29 | |
| 30 | #include <plat/regs-serial.h> |
| 31 | |
| 32 | static struct cpu_table *cpu; |
| 33 | |
| 34 | static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode, |
| 35 | struct cpu_table *tab, |
| 36 | unsigned int count) |
| 37 | { |
| 38 | for (; count != 0; count--, tab++) { |
Kukjin Kim | 9d5fda6 | 2011-03-23 14:45:29 +0900 | [diff] [blame] | 39 | if ((idcode & tab->idmask) == (tab->idcode & tab->idmask)) |
Ben Dooks | 74b265d | 2008-10-21 14:06:31 +0100 | [diff] [blame] | 40 | return tab; |
| 41 | } |
| 42 | |
| 43 | return NULL; |
| 44 | } |
| 45 | |
| 46 | void __init s3c_init_cpu(unsigned long idcode, |
| 47 | struct cpu_table *cputab, unsigned int cputab_size) |
| 48 | { |
| 49 | cpu = s3c_lookup_cpu(idcode, cputab, cputab_size); |
| 50 | |
| 51 | if (cpu == NULL) { |
| 52 | printk(KERN_ERR "Unknown CPU type 0x%08lx\n", idcode); |
| 53 | panic("Unknown S3C24XX CPU"); |
| 54 | } |
| 55 | |
| 56 | printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode); |
| 57 | |
| 58 | if (cpu->map_io == NULL || cpu->init == NULL) { |
| 59 | printk(KERN_ERR "CPU %s support not enabled\n", cpu->name); |
| 60 | panic("Unsupported Samsung CPU"); |
| 61 | } |
| 62 | |
| 63 | cpu->map_io(); |
| 64 | } |
| 65 | |
| 66 | /* s3c24xx_init_clocks |
| 67 | * |
| 68 | * Initialise the clock subsystem and associated information from the |
| 69 | * given master crystal value. |
| 70 | * |
| 71 | * xtal = 0 -> use default PLL crystal value (normally 12MHz) |
| 72 | * != 0 -> PLL crystal value in Hz |
| 73 | */ |
| 74 | |
| 75 | void __init s3c24xx_init_clocks(int xtal) |
| 76 | { |
| 77 | if (xtal == 0) |
| 78 | xtal = 12*1000*1000; |
| 79 | |
| 80 | if (cpu == NULL) |
| 81 | panic("s3c24xx_init_clocks: no cpu setup?\n"); |
| 82 | |
| 83 | if (cpu->init_clocks == NULL) |
| 84 | panic("s3c24xx_init_clocks: cpu has no clock init\n"); |
| 85 | else |
| 86 | (cpu->init_clocks)(xtal); |
| 87 | } |
| 88 | |
| 89 | /* uart management */ |
| 90 | |
| 91 | static int nr_uarts __initdata = 0; |
| 92 | |
Ben Dooks | bdd4915 | 2008-11-03 19:51:42 +0000 | [diff] [blame] | 93 | static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS]; |
Ben Dooks | 74b265d | 2008-10-21 14:06:31 +0100 | [diff] [blame] | 94 | |
| 95 | /* s3c24xx_init_uartdevs |
| 96 | * |
| 97 | * copy the specified platform data and configuration into our central |
| 98 | * set of devices, before the data is thrown away after the init process. |
| 99 | * |
| 100 | * This also fills in the array passed to the serial driver for the |
| 101 | * early initialisation of the console. |
| 102 | */ |
| 103 | |
| 104 | void __init s3c24xx_init_uartdevs(char *name, |
| 105 | struct s3c24xx_uart_resources *res, |
| 106 | struct s3c2410_uartcfg *cfg, int no) |
| 107 | { |
| 108 | struct platform_device *platdev; |
| 109 | struct s3c2410_uartcfg *cfgptr = uart_cfgs; |
| 110 | struct s3c24xx_uart_resources *resp; |
| 111 | int uart; |
| 112 | |
| 113 | memcpy(cfgptr, cfg, sizeof(struct s3c2410_uartcfg) * no); |
| 114 | |
| 115 | for (uart = 0; uart < no; uart++, cfg++, cfgptr++) { |
| 116 | platdev = s3c24xx_uart_src[cfgptr->hwport]; |
| 117 | |
| 118 | resp = res + cfgptr->hwport; |
| 119 | |
| 120 | s3c24xx_uart_devs[uart] = platdev; |
| 121 | |
| 122 | platdev->name = name; |
| 123 | platdev->resource = resp->resources; |
| 124 | platdev->num_resources = resp->nr_resources; |
| 125 | |
| 126 | platdev->dev.platform_data = cfgptr; |
| 127 | } |
| 128 | |
| 129 | nr_uarts = no; |
| 130 | } |
| 131 | |
| 132 | void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) |
| 133 | { |
| 134 | if (cpu == NULL) |
| 135 | return; |
| 136 | |
| 137 | if (cpu->init_uarts == NULL) { |
| 138 | printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n"); |
| 139 | } else |
| 140 | (cpu->init_uarts)(cfg, no); |
| 141 | } |
| 142 | |
| 143 | static int __init s3c_arch_init(void) |
| 144 | { |
| 145 | int ret; |
| 146 | |
| 147 | // do the correct init for cpu |
| 148 | |
| 149 | if (cpu == NULL) |
| 150 | panic("s3c_arch_init: NULL cpu\n"); |
| 151 | |
| 152 | ret = (cpu->init)(); |
| 153 | if (ret != 0) |
| 154 | return ret; |
| 155 | |
| 156 | ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts); |
| 157 | return ret; |
| 158 | } |
| 159 | |
| 160 | arch_initcall(s3c_arch_init); |