blob: 3a626099811661132209c56de1e398a0f499fce0 [file] [log] [blame]
Soren Brinkmann4bda2672013-06-13 09:37:17 -07001/*
Michal Simekaeb29452014-08-21 11:19:46 +02002 * Copyright (C) 2011 - 2014 Xilinx
Soren Brinkmann4bda2672013-06-13 09:37:17 -07003 * Copyright (C) 2012 National Instruments Corp.
Soren Brinkmann4bda2672013-06-13 09:37:17 -07004 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14/dts-v1/;
15/include/ "zynq-7000.dtsi"
16
17/ {
18 model = "Zynq ZC706 Development Board";
19 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
20
21 memory {
22 device_type = "memory";
Michal Simekb65186d2014-08-21 11:21:09 +020023 reg = <0x0 0x40000000>;
Soren Brinkmann4bda2672013-06-13 09:37:17 -070024 };
25
26 chosen {
27 bootargs = "console=ttyPS0,115200 earlyprintk";
28 };
29
Soren Brinkmann1643b312014-12-02 08:07:11 -080030 usb_phy0: phy0 {
31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>;
33 };
Soren Brinkmann4bda2672013-06-13 09:37:17 -070034};
35
Peter Crosthwaite8c7634c2014-12-01 10:25:49 +100036&clkc {
37 ps-clk-frequency = <33333333>;
38};
39
Steffen Trumtrar982264c2013-12-11 09:29:49 -080040&gem0 {
41 status = "okay";
Soren Brinkmannda455812014-08-20 08:56:57 -070042 phy-mode = "rgmii-id";
Soren Brinkmannf62f4042014-08-20 08:56:59 -070043 phy-handle = <&ethernet_phy>;
Soren Brinkmannf52948e2015-01-09 07:43:50 -080044 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_gem0_default>;
Soren Brinkmannf62f4042014-08-20 08:56:59 -070046
47 ethernet_phy: ethernet-phy@7 {
48 reg = <7>;
49 };
Steffen Trumtrar982264c2013-12-11 09:29:49 -080050};
51
Soren Brinkmannf52948e2015-01-09 07:43:50 -080052&gpio0 {
53 pinctrl-names = "default";
54 pinctrl-0 = <&pinctrl_gpio0_default>;
55};
56
Soren Brinkmann0f6faa32014-04-04 14:27:56 -070057&i2c0 {
58 status = "okay";
59 clock-frequency = <400000>;
Soren Brinkmannf52948e2015-01-09 07:43:50 -080060 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_i2c0_default>;
Soren Brinkmann0f6faa32014-04-04 14:27:56 -070062
63 i2cswitch@74 {
64 compatible = "nxp,pca9548";
65 #address-cells = <1>;
66 #size-cells = <0>;
67 reg = <0x74>;
68
69 i2c@0 {
70 #address-cells = <1>;
71 #size-cells = <0>;
72 reg = <0>;
73 si570: clock-generator@5d {
74 #clock-cells = <0>;
75 compatible = "silabs,si570";
76 temperature-stability = <50>;
77 reg = <0x5d>;
78 factory-fout = <156250000>;
79 clock-frequency = <148500000>;
80 };
81 };
82
83 i2c@2 {
84 #address-cells = <1>;
85 #size-cells = <0>;
86 reg = <2>;
87 eeprom@54 {
88 compatible = "at,24c08";
89 reg = <0x54>;
90 };
91 };
92
93 i2c@3 {
94 #address-cells = <1>;
95 #size-cells = <0>;
96 reg = <3>;
97 gpio@21 {
98 compatible = "ti,tca6416";
99 reg = <0x21>;
100 gpio-controller;
101 #gpio-cells = <2>;
102 };
103 };
104
105 i2c@4 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 reg = <4>;
109 rtc@51 {
110 compatible = "nxp,pcf8563";
111 reg = <0x51>;
112 };
113 };
114
115 i2c@7 {
116 #address-cells = <1>;
117 #size-cells = <0>;
118 reg = <7>;
119 ucd90120@65 {
120 compatible = "ti,ucd90120";
121 reg = <0x65>;
122 };
123 };
124 };
125};
126
Soren Brinkmannf52948e2015-01-09 07:43:50 -0800127&pinctrl0 {
128 pinctrl_gem0_default: gem0-default {
129 mux {
130 function = "ethernet0";
131 groups = "ethernet0_0_grp";
132 };
133
134 conf {
135 groups = "ethernet0_0_grp";
136 slew-rate = <0>;
137 io-standard = <4>;
138 };
139
140 conf-rx {
141 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
142 bias-high-impedance;
143 low-power-disable;
144 };
145
146 conf-tx {
147 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
148 low-power-enable;
149 bias-disable;
150 };
151
152 mux-mdio {
153 function = "mdio0";
154 groups = "mdio0_0_grp";
155 };
156
157 conf-mdio {
158 groups = "mdio0_0_grp";
159 slew-rate = <0>;
160 io-standard = <1>;
161 bias-disable;
162 };
163 };
164
165 pinctrl_gpio0_default: gpio0-default {
166 mux {
167 function = "gpio0";
168 groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
169 };
170
171 conf {
172 groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
173 slew-rate = <0>;
174 io-standard = <1>;
175 };
176
177 conf-pull-up {
178 pins = "MIO46", "MIO47";
179 bias-pull-up;
180 };
181
182 conf-pull-none {
183 pins = "MIO7";
184 bias-disable;
185 };
186 };
187
188 pinctrl_i2c0_default: i2c0-default {
189 mux {
190 groups = "i2c0_10_grp";
191 function = "i2c0";
192 };
193
194 conf {
195 groups = "i2c0_10_grp";
196 bias-pull-up;
197 slew-rate = <0>;
198 io-standard = <1>;
199 };
200 };
201
202 pinctrl_sdhci0_default: sdhci0-default {
203 mux {
204 groups = "sdio0_2_grp";
205 function = "sdio0";
206 };
207
208 conf {
209 groups = "sdio0_2_grp";
210 slew-rate = <0>;
211 io-standard = <1>;
212 bias-disable;
213 };
214
215 mux-cd {
216 groups = "gpio0_14_grp";
217 function = "sdio0_cd";
218 };
219
220 conf-cd {
221 groups = "gpio0_14_grp";
222 bias-high-impedance;
223 bias-pull-up;
224 slew-rate = <0>;
225 io-standard = <1>;
226 };
227
228 mux-wp {
229 groups = "gpio0_15_grp";
230 function = "sdio0_wp";
231 };
232
233 conf-wp {
234 groups = "gpio0_15_grp";
235 bias-high-impedance;
236 bias-pull-up;
237 slew-rate = <0>;
238 io-standard = <1>;
239 };
240 };
241
242 pinctrl_uart1_default: uart1-default {
243 mux {
244 groups = "uart1_10_grp";
245 function = "uart1";
246 };
247
248 conf {
249 groups = "uart1_10_grp";
250 slew-rate = <0>;
251 io-standard = <1>;
252 };
253
254 conf-rx {
255 pins = "MIO49";
256 bias-high-impedance;
257 };
258
259 conf-tx {
260 pins = "MIO48";
261 bias-disable;
262 };
263 };
Soren Brinkmann0c79b9f2015-01-26 11:49:56 -0800264
265 pinctrl_usb0_default: usb0-default {
266 mux {
267 groups = "usb0_0_grp";
268 function = "usb0";
269 };
270
271 conf {
272 groups = "usb0_0_grp";
273 slew-rate = <0>;
274 io-standard = <1>;
275 };
276
277 conf-rx {
278 pins = "MIO29", "MIO31", "MIO36";
279 bias-high-impedance;
280 };
281
282 conf-tx {
283 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
284 "MIO35", "MIO37", "MIO38", "MIO39";
285 bias-disable;
286 };
287 };
Soren Brinkmannf52948e2015-01-09 07:43:50 -0800288};
289
Soren Brinkmann3f7c7302013-12-02 10:02:37 -0800290&sdhci0 {
291 status = "okay";
Soren Brinkmannf52948e2015-01-09 07:43:50 -0800292 pinctrl-names = "default";
293 pinctrl-0 = <&pinctrl_sdhci0_default>;
Soren Brinkmann3f7c7302013-12-02 10:02:37 -0800294};
295
Soren Brinkmann4bda2672013-06-13 09:37:17 -0700296&uart1 {
297 status = "okay";
Soren Brinkmannf52948e2015-01-09 07:43:50 -0800298 pinctrl-names = "default";
299 pinctrl-0 = <&pinctrl_uart1_default>;
Soren Brinkmann4bda2672013-06-13 09:37:17 -0700300};
Soren Brinkmann1643b312014-12-02 08:07:11 -0800301
302&usb0 {
303 status = "okay";
304 dr_mode = "host";
305 usb-phy = <&usb_phy0>;
Soren Brinkmann0c79b9f2015-01-26 11:49:56 -0800306 pinctrl-names = "default";
307 pinctrl-0 = <&pinctrl_usb0_default>;
Soren Brinkmann1643b312014-12-02 08:07:11 -0800308};