blob: eeff998e52efdea93534ffb680582503f9f2a56c [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090028#include <linux/slab.h>
David Howells760285e2012-10-02 18:01:07 +010029#include <drm/drmP.h>
30#include <drm/drm_crtc.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080031#include "intel_drv.h"
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/i915_drm.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080033#include "i915_drv.h"
34#include "dvo.h"
35
36#define SIL164_ADDR 0x38
37#define CH7xxx_ADDR 0x76
38#define TFP410_ADDR 0x38
Thomas Richter7434a252012-07-18 19:22:30 +020039#define NS2501_ADDR 0x38
Jesse Barnes79e53942008-11-07 14:24:08 -080040
Chris Wilsonea5b2132010-08-04 13:50:23 +010041static const struct intel_dvo_device intel_dvo_devices[] = {
Jesse Barnes79e53942008-11-07 14:24:08 -080042 {
43 .type = INTEL_DVO_CHIP_TMDS,
44 .name = "sil164",
45 .dvo_reg = DVOC,
46 .slave_addr = SIL164_ADDR,
47 .dev_ops = &sil164_ops,
48 },
49 {
50 .type = INTEL_DVO_CHIP_TMDS,
51 .name = "ch7xxx",
52 .dvo_reg = DVOC,
53 .slave_addr = CH7xxx_ADDR,
54 .dev_ops = &ch7xxx_ops,
55 },
56 {
braggle@free.fr98304ad2013-05-16 12:57:38 +020057 .type = INTEL_DVO_CHIP_TMDS,
58 .name = "ch7xxx",
59 .dvo_reg = DVOC,
60 .slave_addr = 0x75, /* For some ch7010 */
61 .dev_ops = &ch7xxx_ops,
62 },
63 {
Jesse Barnes79e53942008-11-07 14:24:08 -080064 .type = INTEL_DVO_CHIP_LVDS,
65 .name = "ivch",
66 .dvo_reg = DVOA,
67 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
68 .dev_ops = &ivch_ops,
69 },
70 {
71 .type = INTEL_DVO_CHIP_TMDS,
72 .name = "tfp410",
73 .dvo_reg = DVOC,
74 .slave_addr = TFP410_ADDR,
75 .dev_ops = &tfp410_ops,
76 },
77 {
78 .type = INTEL_DVO_CHIP_LVDS,
79 .name = "ch7017",
80 .dvo_reg = DVOC,
81 .slave_addr = 0x75,
Chris Wilsona6b17b42010-09-21 12:34:25 +010082 .gpio = GMBUS_PORT_DPB,
Jesse Barnes79e53942008-11-07 14:24:08 -080083 .dev_ops = &ch7017_ops,
Thomas Richter7434a252012-07-18 19:22:30 +020084 },
85 {
86 .type = INTEL_DVO_CHIP_TMDS,
87 .name = "ns2501",
88 .dvo_reg = DVOC,
89 .slave_addr = NS2501_ADDR,
90 .dev_ops = &ns2501_ops,
91 }
Jesse Barnes79e53942008-11-07 14:24:08 -080092};
93
Chris Wilsonea5b2132010-08-04 13:50:23 +010094struct intel_dvo {
95 struct intel_encoder base;
96
97 struct intel_dvo_device dev;
98
99 struct drm_display_mode *panel_fixed_mode;
100 bool panel_wants_dither;
101};
102
Daniel Vetter69438e62013-07-21 21:36:57 +0200103static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100104{
Daniel Vetter69438e62013-07-21 21:36:57 +0200105 return container_of(encoder, struct intel_dvo, base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100106}
107
Chris Wilsondf0e9242010-09-09 16:20:55 +0100108static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
109{
Daniel Vetter79fde302013-07-21 21:37:00 +0200110 return enc_to_dvo(intel_attached_encoder(connector));
Chris Wilsondf0e9242010-09-09 16:20:55 +0100111}
112
Daniel Vetter732ce742012-07-02 15:09:45 +0200113static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -0800114{
Daniel Vetter732ce742012-07-02 15:09:45 +0200115 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
116
117 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
118}
119
120static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
121 enum pipe *pipe)
122{
123 struct drm_device *dev = encoder->base.dev;
124 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter69438e62013-07-21 21:36:57 +0200125 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
Daniel Vetter732ce742012-07-02 15:09:45 +0200126 u32 tmp;
127
128 tmp = I915_READ(intel_dvo->dev.dvo_reg);
129
130 if (!(tmp & DVO_ENABLE))
131 return false;
132
133 *pipe = PORT_TO_PIPE(tmp);
134
135 return true;
136}
137
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700138static void intel_dvo_get_config(struct intel_encoder *encoder,
139 struct intel_crtc_config *pipe_config)
140{
141 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
Daniel Vetter69438e62013-07-21 21:36:57 +0200142 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700143 u32 tmp, flags = 0;
144
145 tmp = I915_READ(intel_dvo->dev.dvo_reg);
146 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
147 flags |= DRM_MODE_FLAG_PHSYNC;
148 else
149 flags |= DRM_MODE_FLAG_NHSYNC;
150 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
151 flags |= DRM_MODE_FLAG_PVSYNC;
152 else
153 flags |= DRM_MODE_FLAG_NVSYNC;
154
155 pipe_config->adjusted_mode.flags |= flags;
Ville Syrjälä18442d02013-09-13 16:00:08 +0300156
Damien Lespiau241bfc32013-09-25 16:45:37 +0100157 pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock;
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700158}
159
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200160static void intel_disable_dvo(struct intel_encoder *encoder)
161{
162 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
Daniel Vetter69438e62013-07-21 21:36:57 +0200163 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100164 u32 dvo_reg = intel_dvo->dev.dvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -0800165 u32 temp = I915_READ(dvo_reg);
166
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200167 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
168 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
169 I915_READ(dvo_reg);
170}
171
172static void intel_enable_dvo(struct intel_encoder *encoder)
173{
174 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
Daniel Vetter69438e62013-07-21 21:36:57 +0200175 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
Daniel Vetter48f34e12013-10-08 12:25:42 +0200176 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200177 u32 dvo_reg = intel_dvo->dev.dvo_reg;
178 u32 temp = I915_READ(dvo_reg);
179
180 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
181 I915_READ(dvo_reg);
Daniel Vetter48f34e12013-10-08 12:25:42 +0200182 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
183 &crtc->config.requested_mode,
184 &crtc->config.adjusted_mode);
185
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200186 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
187}
188
Jani Nikula6b1c087b2013-05-28 12:35:02 +0300189/* Special dpms function to support cloning between dvo/sdvo/crt. */
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200190static void intel_dvo_dpms(struct drm_connector *connector, int mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800191{
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200192 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
193 struct drm_crtc *crtc;
Daniel Vetter48f34e12013-10-08 12:25:42 +0200194 struct intel_crtc_config *config;
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200195
196 /* dvo supports only 2 dpms states. */
197 if (mode != DRM_MODE_DPMS_ON)
198 mode = DRM_MODE_DPMS_OFF;
199
200 if (mode == connector->dpms)
201 return;
202
203 connector->dpms = mode;
204
205 /* Only need to change hw state when actually enabled */
206 crtc = intel_dvo->base.base.crtc;
207 if (!crtc) {
208 intel_dvo->base.connectors_active = false;
209 return;
Jesse Barnes79e53942008-11-07 14:24:08 -0800210 }
Jesse Barnes79e53942008-11-07 14:24:08 -0800211
Jani Nikula6b1c087b2013-05-28 12:35:02 +0300212 /* We call connector dpms manually below in case pipe dpms doesn't
213 * change due to cloning. */
Jesse Barnes79e53942008-11-07 14:24:08 -0800214 if (mode == DRM_MODE_DPMS_ON) {
Daniel Vetter48f34e12013-10-08 12:25:42 +0200215 config = &to_intel_crtc(crtc)->config;
216
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200217 intel_dvo->base.connectors_active = true;
218
219 intel_crtc_update_dpms(crtc);
220
Daniel Vetter48f34e12013-10-08 12:25:42 +0200221 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
222 &config->requested_mode,
223 &config->adjusted_mode);
224
Daniel Vetterfac32742012-08-12 19:27:12 +0200225 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
Jesse Barnes79e53942008-11-07 14:24:08 -0800226 } else {
Daniel Vetterfac32742012-08-12 19:27:12 +0200227 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200228
229 intel_dvo->base.connectors_active = false;
230
231 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -0800232 }
Daniel Vetter0a91ca22012-07-02 21:54:27 +0200233
Daniel Vetterb9805142012-08-31 17:37:33 +0200234 intel_modeset_check_state(connector->dev);
Jesse Barnes79e53942008-11-07 14:24:08 -0800235}
236
Damien Lespiauc19de8e2013-11-28 15:29:18 +0000237static enum drm_mode_status
238intel_dvo_mode_valid(struct drm_connector *connector,
239 struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800240{
Chris Wilsondf0e9242010-09-09 16:20:55 +0100241 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800242
243 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
244 return MODE_NO_DBLESCAN;
245
246 /* XXX: Validate clock range */
247
Chris Wilsonea5b2132010-08-04 13:50:23 +0100248 if (intel_dvo->panel_fixed_mode) {
249 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
Jesse Barnes79e53942008-11-07 14:24:08 -0800250 return MODE_PANEL;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100251 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
Jesse Barnes79e53942008-11-07 14:24:08 -0800252 return MODE_PANEL;
253 }
254
Chris Wilsonea5b2132010-08-04 13:50:23 +0100255 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -0800256}
257
Daniel Vettera3470372013-07-21 21:36:58 +0200258static bool intel_dvo_compute_config(struct intel_encoder *encoder,
259 struct intel_crtc_config *pipe_config)
Jesse Barnes79e53942008-11-07 14:24:08 -0800260{
Daniel Vettera3470372013-07-21 21:36:58 +0200261 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
262 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
Jesse Barnes79e53942008-11-07 14:24:08 -0800263
264 /* If we have timings from the BIOS for the panel, put them in
265 * to the adjusted mode. The CRTC will be set up for this mode,
266 * with the panel scaling set up to source from the H/VDisplay
267 * of the original mode.
268 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100269 if (intel_dvo->panel_fixed_mode != NULL) {
270#define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
Jesse Barnes79e53942008-11-07 14:24:08 -0800271 C(hdisplay);
272 C(hsync_start);
273 C(hsync_end);
274 C(htotal);
275 C(vdisplay);
276 C(vsync_start);
277 C(vsync_end);
278 C(vtotal);
279 C(clock);
Jesse Barnes79e53942008-11-07 14:24:08 -0800280#undef C
Daniel Vetter0d971742013-09-11 09:58:50 +0200281
282 drm_mode_set_crtcinfo(adjusted_mode, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -0800283 }
284
Jesse Barnes79e53942008-11-07 14:24:08 -0800285 return true;
286}
287
Daniel Vetter79fde302013-07-21 21:37:00 +0200288static void intel_dvo_mode_set(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -0800289{
Daniel Vetter79fde302013-07-21 21:37:00 +0200290 struct drm_device *dev = encoder->base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800291 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter79fde302013-07-21 21:37:00 +0200292 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
293 struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
294 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
295 int pipe = crtc->pipe;
Jesse Barnes79e53942008-11-07 14:24:08 -0800296 u32 dvo_val;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100297 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -0800298
299 switch (dvo_reg) {
300 case DVOA:
301 default:
302 dvo_srcdim_reg = DVOA_SRCDIM;
303 break;
304 case DVOB:
305 dvo_srcdim_reg = DVOB_SRCDIM;
306 break;
307 case DVOC:
308 dvo_srcdim_reg = DVOC_SRCDIM;
309 break;
310 }
311
Jesse Barnes79e53942008-11-07 14:24:08 -0800312 /* Save the data order, since I don't know what it should be set to. */
313 dvo_val = I915_READ(dvo_reg) &
314 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
315 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
316 DVO_BLANK_ACTIVE_HIGH;
317
318 if (pipe == 1)
319 dvo_val |= DVO_PIPE_B_SELECT;
320 dvo_val |= DVO_PIPE_STALL;
321 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
322 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
323 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
324 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
325
Jesse Barnes79e53942008-11-07 14:24:08 -0800326 /*I915_WRITE(DVOB_SRCDIM,
327 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
328 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
329 I915_WRITE(dvo_srcdim_reg,
330 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
331 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
332 /*I915_WRITE(DVOB, dvo_val);*/
333 I915_WRITE(dvo_reg, dvo_val);
334}
335
336/**
337 * Detect the output connection on our DVO device.
338 *
339 * Unimplemented.
340 */
Chris Wilson7b334fc2010-09-09 23:51:02 +0100341static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +0100342intel_dvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -0800343{
Chris Wilsondf0e9242010-09-09 16:20:55 +0100344 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
Chris Wilson164c8592013-07-20 20:27:08 +0100345 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
346 connector->base.id, drm_get_connector_name(connector));
Chris Wilsonea5b2132010-08-04 13:50:23 +0100347 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
Jesse Barnes79e53942008-11-07 14:24:08 -0800348}
349
350static int intel_dvo_get_modes(struct drm_connector *connector)
351{
Chris Wilsondf0e9242010-09-09 16:20:55 +0100352 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
Chris Wilsonf899fc62010-07-20 15:44:45 -0700353 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800354
355 /* We should probably have an i2c driver get_modes function for those
356 * devices which will have a fixed set of modes determined by the chip
357 * (TV-out, for example), but for now with just TMDS and LVDS,
358 * that's not the case.
359 */
Chris Wilsonf899fc62010-07-20 15:44:45 -0700360 intel_ddc_get_modes(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +0800361 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
Jesse Barnes79e53942008-11-07 14:24:08 -0800362 if (!list_empty(&connector->probed_modes))
363 return 1;
364
Chris Wilsonea5b2132010-08-04 13:50:23 +0100365 if (intel_dvo->panel_fixed_mode != NULL) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800366 struct drm_display_mode *mode;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100367 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
Jesse Barnes79e53942008-11-07 14:24:08 -0800368 if (mode) {
369 drm_mode_probed_add(connector, mode);
370 return 1;
371 }
372 }
Chris Wilsonea5b2132010-08-04 13:50:23 +0100373
Jesse Barnes79e53942008-11-07 14:24:08 -0800374 return 0;
375}
376
Chris Wilsonea5b2132010-08-04 13:50:23 +0100377static void intel_dvo_destroy(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -0800378{
Jesse Barnes79e53942008-11-07 14:24:08 -0800379 drm_connector_cleanup(connector);
Zhenyu Wang599be162010-03-29 16:17:31 +0800380 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800381}
382
Jesse Barnes79e53942008-11-07 14:24:08 -0800383static const struct drm_connector_funcs intel_dvo_connector_funcs = {
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200384 .dpms = intel_dvo_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -0800385 .detect = intel_dvo_detect,
386 .destroy = intel_dvo_destroy,
387 .fill_modes = drm_helper_probe_single_connector_modes,
388};
389
390static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
391 .mode_valid = intel_dvo_mode_valid,
392 .get_modes = intel_dvo_get_modes,
Chris Wilsondf0e9242010-09-09 16:20:55 +0100393 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -0800394};
395
Hannes Ederb358d0a2008-12-18 21:18:47 +0100396static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -0800397{
Daniel Vetter69438e62013-07-21 21:36:57 +0200398 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
Zhenyu Wang599be162010-03-29 16:17:31 +0800399
Chris Wilsonea5b2132010-08-04 13:50:23 +0100400 if (intel_dvo->dev.dev_ops->destroy)
401 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
402
403 kfree(intel_dvo->panel_fixed_mode);
404
405 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -0800406}
407
408static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
409 .destroy = intel_dvo_enc_destroy,
410};
411
Jesse Barnes79e53942008-11-07 14:24:08 -0800412/**
413 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
414 *
415 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
416 * chip being on DVOB/C and having multiple pipes.
417 */
418static struct drm_display_mode *
Chris Wilsonea5b2132010-08-04 13:50:23 +0100419intel_dvo_get_current_mode(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -0800420{
421 struct drm_device *dev = connector->dev;
422 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsondf0e9242010-09-09 16:20:55 +0100423 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100424 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -0800425 struct drm_display_mode *mode = NULL;
426
427 /* If the DVO port is active, that'll be the LVDS, so we can pull out
428 * its timings to get how the BIOS set up the panel.
429 */
430 if (dvo_val & DVO_ENABLE) {
431 struct drm_crtc *crtc;
432 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
433
Chris Wilsonf875c152010-09-09 15:44:14 +0100434 crtc = intel_get_crtc_for_pipe(dev, pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -0800435 if (crtc) {
436 mode = intel_crtc_mode_get(dev, crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -0800437 if (mode) {
438 mode->type |= DRM_MODE_TYPE_PREFERRED;
439 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
440 mode->flags |= DRM_MODE_FLAG_PHSYNC;
441 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
442 mode->flags |= DRM_MODE_FLAG_PVSYNC;
443 }
444 }
445 }
Chris Wilsonea5b2132010-08-04 13:50:23 +0100446
Jesse Barnes79e53942008-11-07 14:24:08 -0800447 return mode;
448}
449
450void intel_dvo_init(struct drm_device *dev)
451{
Chris Wilsonf899fc62010-07-20 15:44:45 -0700452 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -0700453 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100454 struct intel_dvo *intel_dvo;
Zhenyu Wang599be162010-03-29 16:17:31 +0800455 struct intel_connector *intel_connector;
Jesse Barnes79e53942008-11-07 14:24:08 -0800456 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800457 int encoder_type = DRM_MODE_ENCODER_NONE;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100458
Daniel Vetterb14c5672013-09-19 12:18:32 +0200459 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100460 if (!intel_dvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800461 return;
462
Daniel Vetterb14c5672013-09-19 12:18:32 +0200463 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
Zhenyu Wang599be162010-03-29 16:17:31 +0800464 if (!intel_connector) {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100465 kfree(intel_dvo);
Zhenyu Wang599be162010-03-29 16:17:31 +0800466 return;
467 }
468
Chris Wilsonea5b2132010-08-04 13:50:23 +0100469 intel_encoder = &intel_dvo->base;
Chris Wilson373a3cf2010-09-15 12:03:59 +0100470 drm_encoder_init(dev, &intel_encoder->base,
471 &intel_dvo_enc_funcs, encoder_type);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100472
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200473 intel_encoder->disable = intel_disable_dvo;
474 intel_encoder->enable = intel_enable_dvo;
Daniel Vetter732ce742012-07-02 15:09:45 +0200475 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700476 intel_encoder->get_config = intel_dvo_get_config;
Daniel Vettera3470372013-07-21 21:36:58 +0200477 intel_encoder->compute_config = intel_dvo_compute_config;
Daniel Vetter79fde302013-07-21 21:37:00 +0200478 intel_encoder->mode_set = intel_dvo_mode_set;
Daniel Vetter732ce742012-07-02 15:09:45 +0200479 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200480
Jesse Barnes79e53942008-11-07 14:24:08 -0800481 /* Now, try to find a controller */
482 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
Zhenyu Wang599be162010-03-29 16:17:31 +0800483 struct drm_connector *connector = &intel_connector->base;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100484 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
Chris Wilsonf899fc62010-07-20 15:44:45 -0700485 struct i2c_adapter *i2c;
Jesse Barnes79e53942008-11-07 14:24:08 -0800486 int gpio;
David Müller (ELSOFT AG)e4bfff52013-04-19 10:41:50 +0200487 bool dvoinit;
Jesse Barnes79e53942008-11-07 14:24:08 -0800488
Jesse Barnes79e53942008-11-07 14:24:08 -0800489 /* Allow the I2C driver info to specify the GPIO to be used in
490 * special cases, but otherwise default to what's defined
491 * in the spec.
492 */
Daniel Kurtz3bd7d902012-03-28 02:36:14 +0800493 if (intel_gmbus_is_port_valid(dvo->gpio))
Jesse Barnes79e53942008-11-07 14:24:08 -0800494 gpio = dvo->gpio;
495 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
Chris Wilsonf573c662010-09-28 23:34:44 +0100496 gpio = GMBUS_PORT_SSC;
Jesse Barnes79e53942008-11-07 14:24:08 -0800497 else
Chris Wilsona6b17b42010-09-21 12:34:25 +0100498 gpio = GMBUS_PORT_DPB;
Jesse Barnes79e53942008-11-07 14:24:08 -0800499
500 /* Set up the I2C bus necessary for the chip we're probing.
501 * It appears that everything is on GPIOE except for panels
502 * on i830 laptops, which are on GPIOB (DVOA).
503 */
Daniel Kurtz3bd7d902012-03-28 02:36:14 +0800504 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
Jesse Barnes79e53942008-11-07 14:24:08 -0800505
Chris Wilsonea5b2132010-08-04 13:50:23 +0100506 intel_dvo->dev = *dvo;
David Müller (ELSOFT AG)e4bfff52013-04-19 10:41:50 +0200507
508 /* GMBUS NAK handling seems to be unstable, hence let the
509 * transmitter detection run in bit banging mode for now.
510 */
511 intel_gmbus_force_bit(i2c, true);
512
513 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
514
515 intel_gmbus_force_bit(i2c, false);
516
517 if (!dvoinit)
Jesse Barnes79e53942008-11-07 14:24:08 -0800518 continue;
519
Eric Anholt21d40d32010-03-25 11:11:14 -0700520 intel_encoder->type = INTEL_OUTPUT_DVO;
521 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800522 switch (dvo->type) {
523 case INTEL_DVO_CHIP_TMDS:
Daniel Vetter66a92782012-07-12 20:08:18 +0200524 intel_encoder->cloneable = true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800525 drm_connector_init(dev, connector,
526 &intel_dvo_connector_funcs,
527 DRM_MODE_CONNECTOR_DVII);
528 encoder_type = DRM_MODE_ENCODER_TMDS;
529 break;
530 case INTEL_DVO_CHIP_LVDS:
Daniel Vetter66a92782012-07-12 20:08:18 +0200531 intel_encoder->cloneable = false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800532 drm_connector_init(dev, connector,
533 &intel_dvo_connector_funcs,
534 DRM_MODE_CONNECTOR_LVDS);
535 encoder_type = DRM_MODE_ENCODER_LVDS;
536 break;
537 }
538
539 drm_connector_helper_add(connector,
540 &intel_dvo_connector_helper_funcs);
541 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
542 connector->interlace_allowed = false;
543 connector->doublescan_allowed = false;
544
Chris Wilsondf0e9242010-09-09 16:20:55 +0100545 intel_connector_attach_encoder(intel_connector, intel_encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -0800546 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
547 /* For our LVDS chipsets, we should hopefully be able
548 * to dig the fixed panel mode out of the BIOS data.
549 * However, it's in a different format from the BIOS
550 * data on chipsets with integrated LVDS (stored in AIM
551 * headers, likely), so for now, just get the current
552 * mode being output through DVO.
553 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100554 intel_dvo->panel_fixed_mode =
Jesse Barnes79e53942008-11-07 14:24:08 -0800555 intel_dvo_get_current_mode(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100556 intel_dvo->panel_wants_dither = true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800557 }
558
559 drm_sysfs_connector_add(connector);
560 return;
561 }
562
Chris Wilson373a3cf2010-09-15 12:03:59 +0100563 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100564 kfree(intel_dvo);
Zhenyu Wang599be162010-03-29 16:17:31 +0800565 kfree(intel_connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800566}