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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
7 default y
8 ---help---
9 Say Y here if you want to compile device drivers for IO Memory
10 Management Units into the kernel. These devices usually allow to
11 remap DMA requests and/or remap interrupts from other devices on the
12 system.
13
14if IOMMU_SUPPORT
15
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030016config OF_IOMMU
17 def_bool y
18 depends on OF
19
Varun Sethi695093e2013-07-15 10:20:57 +053020config FSL_PAMU
21 bool "Freescale IOMMU support"
22 depends on PPC_E500MC
23 select IOMMU_API
24 select GENERIC_ALLOCATOR
25 help
26 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
27 PAMU can authorize memory access, remap the memory address, and remap I/O
28 transaction types.
29
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030030# MSM IOMMU support
31config MSM_IOMMU
32 bool "MSM IOMMU Support"
33 depends on ARCH_MSM8X60 || ARCH_MSM8960
34 select IOMMU_API
35 help
36 Support for the IOMMUs found on certain Qualcomm SOCs.
37 These IOMMUs allow virtualization of the address space used by most
38 cores within the multimedia subsystem.
39
40 If unsure, say N here.
41
42config IOMMU_PGTABLES_L2
43 def_bool y
44 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030045
46# AMD IOMMU support
47config AMD_IOMMU
48 bool "AMD IOMMU support"
49 select SWIOTLB
50 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010051 select PCI_ATS
52 select PCI_PRI
53 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030054 select IOMMU_API
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +020055 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030056 ---help---
57 With this option you can enable support for AMD IOMMU hardware in
58 your system. An IOMMU is a hardware component which provides
59 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +090060 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030061 system from misbehaving device drivers or hardware.
62
63 You can find out if your system has an AMD IOMMU if you look into
64 your BIOS for an option to enable it or if you have an IVRS ACPI
65 table.
66
67config AMD_IOMMU_STATS
68 bool "Export AMD IOMMU statistics to debugfs"
69 depends on AMD_IOMMU
70 select DEBUG_FS
71 ---help---
72 This option enables code in the AMD IOMMU driver to collect various
73 statistics about whats happening in the driver and exports that
74 information to userspace via debugfs.
75 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030076
Joerg Roedele3c495c2011-11-09 12:31:15 +010077config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -080078 tristate "AMD IOMMU Version 2 driver"
79 depends on AMD_IOMMU && PROFILING
Joerg Roedel8736b2c2011-11-24 16:21:52 +010080 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +010081 ---help---
82 This option enables support for the AMD IOMMUv2 features of the IOMMU
83 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +090084 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +010085
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030086# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -070087config DMAR_TABLE
88 bool
89
90config INTEL_IOMMU
91 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030092 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
93 select IOMMU_API
Suresh Siddhad3f13812011-08-23 17:05:25 -070094 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030095 help
96 DMA remapping (DMAR) devices support enables independent address
97 translations for Direct Memory Access (DMA) from devices.
98 These DMA remapping devices are reported via ACPI tables
99 and include PCI device scope covered by these DMA
100 remapping devices.
101
Suresh Siddhad3f13812011-08-23 17:05:25 -0700102config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300103 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700104 prompt "Enable Intel DMA Remapping Devices by default"
105 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300106 help
107 Selecting this option will enable a DMAR device at boot time if
108 one is found. If this option is not selected, DMAR support can
109 be enabled by passing intel_iommu=on to the kernel.
110
Suresh Siddhad3f13812011-08-23 17:05:25 -0700111config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300112 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700113 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300114 ---help---
115 Current Graphics drivers tend to use physical address
116 for DMA and avoid using DMA APIs. Setting this config
117 option permits the IOMMU driver to set a unity map for
118 all the OS-visible memory. Hence the driver can continue
119 to use physical addresses for DMA, at least until this
120 option is removed in the 2.6.32 kernel.
121
Suresh Siddhad3f13812011-08-23 17:05:25 -0700122config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300123 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700124 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300125 ---help---
126 Floppy disk drivers are known to bypass DMA API calls
127 thereby failing to work when IOMMU is enabled. This
128 workaround will setup a 1:1 mapping for the first
129 16MiB to make floppy (an ISA device) work.
130
Suresh Siddhad3f13812011-08-23 17:05:25 -0700131config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800132 bool "Support for Interrupt Remapping"
133 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700134 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300135 ---help---
136 Supports Interrupt remapping for IO-APIC and MSI devices.
137 To use x2apic mode in the CPU's which support x2APIC enhancements or
138 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200139
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300140# OMAP IOMMU support
141config OMAP_IOMMU
142 bool "OMAP IOMMU Support"
Arnd Bergmannae191582013-03-05 23:16:48 +0100143 depends on ARCH_OMAP2PLUS
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300144 select IOMMU_API
145
146config OMAP_IOVMM
Joerg Roedel7b6d45f2011-09-14 16:03:45 +0200147 tristate "OMAP IO Virtual Memory Manager Support"
148 depends on OMAP_IOMMU
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300149
150config OMAP_IOMMU_DEBUG
151 tristate "Export OMAP IOMMU/IOVMM internals in DebugFS"
152 depends on OMAP_IOVMM && DEBUG_FS
153 help
154 Select this to see extensive information about
155 the internal state of OMAP IOMMU/IOVMM in debugfs.
156
157 Say N unless you know you need this.
158
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200159config TEGRA_IOMMU_GART
160 bool "Tegra GART IOMMU Support"
161 depends on ARCH_TEGRA_2x_SOC
162 select IOMMU_API
163 help
164 Enables support for remapping discontiguous physical memory
165 shared with the operating system into contiguous I/O virtual
166 space through the GART (Graphics Address Relocation Table)
167 hardware included on Tegra SoCs.
168
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200169config TEGRA_IOMMU_SMMU
170 bool "Tegra SMMU IOMMU Support"
Hiroshi Doyud3003562013-01-31 12:43:08 +0200171 depends on ARCH_TEGRA && TEGRA_AHB
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200172 select IOMMU_API
173 help
174 Enables support for remapping discontiguous physical memory
175 shared with the operating system into contiguous I/O virtual
176 space through the SMMU (System Memory Management Unit)
177 hardware included on Tegra SoCs.
178
KyongHo Cho2a965362012-05-12 05:56:09 +0900179config EXYNOS_IOMMU
180 bool "Exynos IOMMU Support"
181 depends on ARCH_EXYNOS && EXYNOS_DEV_SYSMMU
182 select IOMMU_API
183 help
184 Support for the IOMMU(System MMU) of Samsung Exynos application
185 processor family. This enables H/W multimedia accellerators to see
186 non-linear physical memory chunks as a linear memory in their
187 address spaces
188
189 If unsure, say N here.
190
191config EXYNOS_IOMMU_DEBUG
192 bool "Debugging log for Exynos IOMMU"
193 depends on EXYNOS_IOMMU
194 help
195 Select this to see the detailed log message that shows what
196 happens in the IOMMU driver
197
198 Say N unless you need kernel log message for IOMMU debugging
199
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900200config SHMOBILE_IPMMU
201 bool
202
203config SHMOBILE_IPMMU_TLB
204 bool
205
206config SHMOBILE_IOMMU
207 bool "IOMMU for Renesas IPMMU/IPMMUI"
208 default n
209 depends on (ARM && ARCH_SHMOBILE)
210 select IOMMU_API
211 select ARM_DMA_USE_IOMMU
212 select SHMOBILE_IPMMU
213 select SHMOBILE_IPMMU_TLB
214 help
215 Support for Renesas IPMMU/IPMMUI. This option enables
216 remapping of DMA memory accesses from all of the IP blocks
217 on the ICB.
218
219 Warning: Drivers (including userspace drivers of UIO
220 devices) of the IP blocks on the ICB *must* use addresses
221 allocated from the IPMMU (iova) for DMA with this option
222 enabled.
223
224 If unsure, say N.
225
226choice
227 prompt "IPMMU/IPMMUI address space size"
228 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
229 depends on SHMOBILE_IOMMU
230 help
231 This option sets IPMMU/IPMMUI address space size by
232 adjusting the 1st level page table size. The page table size
233 is calculated as follows:
234
235 page table size = number of page table entries * 4 bytes
236 number of page table entries = address space size / 1 MiB
237
238 For example, when the address space size is 2048 MiB, the
239 1st level page table size is 8192 bytes.
240
241 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
242 bool "2 GiB"
243
244 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
245 bool "1 GiB"
246
247 config SHMOBILE_IOMMU_ADDRSIZE_512MB
248 bool "512 MiB"
249
250 config SHMOBILE_IOMMU_ADDRSIZE_256MB
251 bool "256 MiB"
252
253 config SHMOBILE_IOMMU_ADDRSIZE_128MB
254 bool "128 MiB"
255
256 config SHMOBILE_IOMMU_ADDRSIZE_64MB
257 bool "64 MiB"
258
259 config SHMOBILE_IOMMU_ADDRSIZE_32MB
260 bool "32 MiB"
261
262endchoice
263
264config SHMOBILE_IOMMU_L1SIZE
265 int
266 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
267 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
268 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
269 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
270 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
271 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
272 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
273
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000274config SPAPR_TCE_IOMMU
275 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000276 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000277 select IOMMU_API
278 help
279 Enables bits of IOMMU API required by VFIO. The iommu_ops
280 is not implemented as it is not necessary for VFIO.
281
Will Deacon45ae7cf2013-06-24 18:31:25 +0100282config ARM_SMMU
283 bool "ARM Ltd. System MMU (SMMU) Support"
284 depends on ARM64 || (ARM_LPAE && OF)
285 select IOMMU_API
286 select ARM_DMA_USE_IOMMU if ARM
287 help
288 Support for implementations of the ARM System MMU architecture
289 versions 1 and 2. The driver supports both v7l and v8l table
290 formats with 4k and 64k page sizes.
291
292 Say Y here if your SoC includes an IOMMU device implementing
293 the ARM SMMU architecture.
294
Joerg Roedel68255b62011-06-14 15:51:54 +0200295endif # IOMMU_SUPPORT