| Aurelien Jacquiot | 784bdcd | 2011-10-04 11:11:35 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Port on Texas Instruments TMS320C6x architecture |
| 3 | * |
| 4 | * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated |
| 5 | * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #ifndef _ASM_C6X_CACHEFLUSH_H |
| 12 | #define _ASM_C6X_CACHEFLUSH_H |
| 13 | |
| 14 | #include <linux/spinlock.h> |
| 15 | |
| 16 | #include <asm/setup.h> |
| 17 | #include <asm/cache.h> |
| 18 | #include <asm/mman.h> |
| 19 | #include <asm/page.h> |
| 20 | #include <asm/string.h> |
| 21 | |
| 22 | /* |
| 23 | * virtually-indexed cache management (our cache is physically indexed) |
| 24 | */ |
| 25 | #define flush_cache_all() do {} while (0) |
| 26 | #define flush_cache_mm(mm) do {} while (0) |
| 27 | #define flush_cache_dup_mm(mm) do {} while (0) |
| 28 | #define flush_cache_range(mm, start, end) do {} while (0) |
| 29 | #define flush_cache_page(vma, vmaddr, pfn) do {} while (0) |
| 30 | #define flush_cache_vmap(start, end) do {} while (0) |
| 31 | #define flush_cache_vunmap(start, end) do {} while (0) |
| 32 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 |
| 33 | #define flush_dcache_page(page) do {} while (0) |
| 34 | #define flush_dcache_mmap_lock(mapping) do {} while (0) |
| 35 | #define flush_dcache_mmap_unlock(mapping) do {} while (0) |
| 36 | |
| 37 | /* |
| 38 | * physically-indexed cache management |
| 39 | */ |
| 40 | #define flush_icache_range(s, e) \ |
| 41 | do { \ |
| 42 | L1D_cache_block_writeback((s), (e)); \ |
| 43 | L1P_cache_block_invalidate((s), (e)); \ |
| 44 | } while (0) |
| 45 | |
| 46 | #define flush_icache_page(vma, page) \ |
| 47 | do { \ |
| 48 | if ((vma)->vm_flags & PROT_EXEC) \ |
| 49 | L1D_cache_block_writeback_invalidate(page_address(page), \ |
| 50 | (unsigned long) page_address(page) + PAGE_SIZE)); \ |
| 51 | L1P_cache_block_invalidate(page_address(page), \ |
| 52 | (unsigned long) page_address(page) + PAGE_SIZE)); \ |
| 53 | } while (0) |
| 54 | |
| 55 | |
| 56 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ |
| 57 | do { \ |
| 58 | memcpy(dst, src, len); \ |
| 59 | flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \ |
| 60 | } while (0) |
| 61 | |
| 62 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ |
| 63 | memcpy(dst, src, len) |
| 64 | |
| 65 | #endif /* _ASM_C6X_CACHEFLUSH_H */ |