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Christian Ruppert2eb95042013-04-11 15:19:40 +02001/*
2 * Abilis Systems TB10X SOC device tree
3 *
4 * Copyright (C) Abilis Systems 2013
5 *
6 * Author: Christian Ruppert <christian.ruppert@abilis.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22/* interrupt specifiers
23 * --------------------
24 * 0: rising, 1: low, 2: high, 3: falling,
25 */
26
27/ {
28 compatible = "abilis,arc-tb10x";
29 #address-cells = <1>;
30 #size-cells = <1>;
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35 cpu@0 {
36 device_type = "cpu";
37 compatible = "snps,arc770d";
38 reg = <0>;
39 };
40 };
41
42 soc100 {
43 #address-cells = <1>;
44 #size-cells = <1>;
45 device_type = "soc";
46 ranges = <0xfe000000 0xfe000000 0x02000000
47 0x000F0000 0x000F0000 0x00010000>;
48 compatible = "abilis,tb10x", "simple-bus";
49
50 pll0: oscillator {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-output-names = "pll0";
54 };
55 cpu_clk: clkdiv_cpu {
Christian Ruppert0dfad772013-04-12 12:36:29 +020056 compatible = "fixed-factor-clock";
Christian Ruppert2eb95042013-04-11 15:19:40 +020057 #clock-cells = <0>;
58 clocks = <&pll0>;
59 clock-output-names = "cpu_clk";
60 };
61 ahb_clk: clkdiv_ahb {
Christian Ruppert0dfad772013-04-12 12:36:29 +020062 compatible = "fixed-factor-clock";
Christian Ruppert2eb95042013-04-11 15:19:40 +020063 #clock-cells = <0>;
64 clocks = <&pll0>;
65 clock-output-names = "ahb_clk";
66 };
67
68 iomux: iomux@FF10601c {
69 #address-cells = <1>;
70 #size-cells = <1>;
71 compatible = "abilis,tb10x-iomux";
72 reg = <0xFF10601c 0x4>;
73 };
74
75 intc: interrupt-controller {
76 compatible = "snps,arc700-intc";
77 interrupt-controller;
78 #interrupt-cells = <1>;
79 };
80 tb10x_ictl: pic@fe002000 {
81 compatible = "abilis,tb10x_ictl";
82 reg = <0xFE002000 0x20>;
83 interrupt-controller;
84 #interrupt-cells = <2>;
85 interrupt-parent = <&intc>;
86 interrupts = <5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
87 20 21 22 23 24 25 26 27 28 29 30 31>;
88 };
89
90 uart@FF100000 {
91 compatible = "snps,dw-apb-uart",
92 "abilis,simple-pinctrl";
93 reg = <0xFF100000 0x100>;
94 clock-frequency = <166666666>;
95 interrupts = <25 1>;
96 reg-shift = <2>;
97 reg-io-width = <4>;
98 interrupt-parent = <&tb10x_ictl>;
99 };
100 ethernet@FE100000 {
101 compatible = "snps,dwmac-3.70a","snps,dwmac";
102 reg = <0xFE100000 0x1058>;
103 interrupt-parent = <&tb10x_ictl>;
104 interrupts = <6 1>;
105 interrupt-names = "macirq";
106 clocks = <&ahb_clk>;
107 clock-names = "stmmaceth";
108 };
109 dma@FE000000 {
110 compatible = "snps,dma-spear1340";
111 reg = <0xFE000000 0x400>;
112 interrupt-parent = <&tb10x_ictl>;
113 interrupts = <14 1>;
114 dma-channels = <6>;
115 dma-requests = <0>;
116 dma-masters = <1>;
117 #dma-cells = <3>;
118 chan_allocation_order = <0>;
119 chan_priority = <1>;
120 block_size = <0x7ff>;
121 data_width = <2 0 0 0>;
122 clocks = <&ahb_clk>;
123 clock-names = "hclk";
124 };
125
126 i2c0: i2c@FF120000 {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 compatible = "snps,designware-i2c";
130 reg = <0xFF120000 0x1000>;
131 interrupt-parent = <&tb10x_ictl>;
132 interrupts = <12 1>;
133 clocks = <&ahb_clk>;
134 };
135 i2c1: i2c@FF121000 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 compatible = "snps,designware-i2c";
139 reg = <0xFF121000 0x1000>;
140 interrupt-parent = <&tb10x_ictl>;
141 interrupts = <12 1>;
142 clocks = <&ahb_clk>;
143 };
144 i2c2: i2c@FF122000 {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "snps,designware-i2c";
148 reg = <0xFF122000 0x1000>;
149 interrupt-parent = <&tb10x_ictl>;
150 interrupts = <12 1>;
151 clocks = <&ahb_clk>;
152 };
153 i2c3: i2c@FF123000 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 compatible = "snps,designware-i2c";
157 reg = <0xFF123000 0x1000>;
158 interrupt-parent = <&tb10x_ictl>;
159 interrupts = <12 1>;
160 clocks = <&ahb_clk>;
161 };
162 i2c4: i2c@FF124000 {
163 #address-cells = <1>;
164 #size-cells = <0>;
165 compatible = "snps,designware-i2c";
166 reg = <0xFF124000 0x1000>;
167 interrupt-parent = <&tb10x_ictl>;
168 interrupts = <12 1>;
169 clocks = <&ahb_clk>;
170 };
171
172 spi0: spi@0xFE010000 {
173 #address-cells = <1>;
174 #size-cells = <0>;
175 cell-index = <0>;
176 compatible = "abilis,tb100-spi";
177 num-cs = <1>;
178 reg = <0xFE010000 0x20>;
179 interrupt-parent = <&tb10x_ictl>;
180 interrupts = <26 1>;
181 clocks = <&ahb_clk>;
182 };
183 spi1: spi@0xFE011000 {
184 #address-cells = <1>;
185 #size-cells = <0>;
186 cell-index = <1>;
187 compatible = "abilis,tb100-spi",
188 "abilis,simple-pinctrl";
189 num-cs = <2>;
190 reg = <0xFE011000 0x20>;
191 interrupt-parent = <&tb10x_ictl>;
192 interrupts = <10 1>;
193 clocks = <&ahb_clk>;
194 };
195
196 tb10x_tsm: tb10x-tsm@ff316000 {
197 compatible = "abilis,tb100-tsm";
198 reg = <0xff316000 0x400>;
199 interrupt-parent = <&tb10x_ictl>;
200 interrupts = <17 1>;
201 output-clkdiv = <4>;
202 global-packet-delay = <0x21>;
203 port-packet-delay = <0>;
204 };
205 tb10x_stream_proc: tb10x-stream-proc {
206 compatible = "abilis,tb100-streamproc";
207 reg = <0xfff00000 0x200>,
208 <0x000f0000 0x10000>,
209 <0xfff00200 0x105>,
210 <0xff10600c 0x1>,
211 <0xfe001018 0x1>;
212 reg-names = "mbox",
213 "sp_iccm",
214 "mbox_irq",
215 "cpuctrl",
216 "a6it_int_force";
217 interrupt-parent = <&tb10x_ictl>;
218 interrupts = <20 1>, <19 1>;
219 interrupt-names = "cmd_irq", "event_irq";
220 };
221 tb10x_mdsc0: tb10x-mdscr@FF300000 {
222 compatible = "abilis,tb100-mdscr";
223 reg = <0xFF300000 0x7000>;
224 tb100-mdscr-manage-tsin;
225 };
226 tb10x_mscr0: tb10x-mdscr@FF307000 {
227 compatible = "abilis,tb100-mdscr";
228 reg = <0xFF307000 0x7000>;
229 };
230 tb10x_scr0: tb10x-mdscr@ff30e000 {
231 compatible = "abilis,tb100-mdscr";
232 reg = <0xFF30e000 0x4000>;
233 tb100-mdscr-manage-tsin;
234 };
235 tb10x_scr1: tb10x-mdscr@ff312000 {
236 compatible = "abilis,tb100-mdscr";
237 reg = <0xFF312000 0x4000>;
238 tb100-mdscr-manage-tsin;
239 };
240 tb10x_wfb: tb10x-wfb@ff319000 {
241 compatible = "abilis,tb100-wfb";
242 reg = <0xff319000 0x1000>;
243 interrupt-parent = <&tb10x_ictl>;
244 interrupts = <16 1>;
245 };
246 };
247};