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Yuval Mintze712d522015-10-26 11:02:27 +02001/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
27#include <net/vxlan.h>
28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
42static const char version[] = "QLogic QL4xxx 40G/100G Ethernet Driver qede "
43 DRV_MODULE_VERSION "\n";
44
45MODULE_DESCRIPTION("QLogic 40G/100G Ethernet Driver");
46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
Yuval Mintz0e7441d2016-02-24 16:52:45 +020056#define CHIP_NUM_57980S_10 0x1666
Yuval Mintze712d522015-10-26 11:02:27 +020057#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
61
62#ifndef PCI_DEVICE_ID_NX2_57980E
63#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
64#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
65#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
66#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
67#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
68#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
69#endif
70
71static const struct pci_device_id qede_pci_tbl[] = {
72 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), 0 },
73 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), 0 },
74 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), 0 },
75 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), 0 },
76 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), 0 },
77 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), 0 },
78 { 0 }
79};
80
81MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
82
83static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
84
85#define TX_TIMEOUT (5 * HZ)
86
87static void qede_remove(struct pci_dev *pdev);
Yuval Mintz29502192015-10-26 11:02:29 +020088static int qede_alloc_rx_buffer(struct qede_dev *edev,
89 struct qede_rx_queue *rxq);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +020090static void qede_link_update(void *dev, struct qed_link_output *link);
Yuval Mintze712d522015-10-26 11:02:27 +020091
92static struct pci_driver qede_pci_driver = {
93 .name = "qede",
94 .id_table = qede_pci_tbl,
95 .probe = qede_probe,
96 .remove = qede_remove,
97};
98
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +020099static struct qed_eth_cb_ops qede_ll_ops = {
100 {
101 .link_update = qede_link_update,
102 },
103};
104
Yuval Mintz29502192015-10-26 11:02:29 +0200105static int qede_netdev_event(struct notifier_block *this, unsigned long event,
106 void *ptr)
107{
108 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
109 struct ethtool_drvinfo drvinfo;
110 struct qede_dev *edev;
111
112 /* Currently only support name change */
113 if (event != NETDEV_CHANGENAME)
114 goto done;
115
116 /* Check whether this is a qede device */
117 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
118 goto done;
119
120 memset(&drvinfo, 0, sizeof(drvinfo));
121 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
122 if (strcmp(drvinfo.driver, "qede"))
123 goto done;
124 edev = netdev_priv(ndev);
125
126 /* Notify qed of the name change */
127 if (!edev->ops || !edev->ops->common)
128 goto done;
129 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
130 "qede");
131
132done:
133 return NOTIFY_DONE;
134}
135
136static struct notifier_block qede_netdev_notifier = {
137 .notifier_call = qede_netdev_event,
138};
139
Yuval Mintze712d522015-10-26 11:02:27 +0200140static
141int __init qede_init(void)
142{
143 int ret;
144 u32 qed_ver;
145
146 pr_notice("qede_init: %s\n", version);
147
148 qed_ver = qed_get_protocol_version(QED_PROTOCOL_ETH);
149 if (qed_ver != QEDE_ETH_INTERFACE_VERSION) {
150 pr_notice("Version mismatch [%08x != %08x]\n",
151 qed_ver,
152 QEDE_ETH_INTERFACE_VERSION);
153 return -EINVAL;
154 }
155
156 qed_ops = qed_get_eth_ops(QEDE_ETH_INTERFACE_VERSION);
157 if (!qed_ops) {
158 pr_notice("Failed to get qed ethtool operations\n");
159 return -EINVAL;
160 }
161
Yuval Mintz29502192015-10-26 11:02:29 +0200162 /* Must register notifier before pci ops, since we might miss
163 * interface rename after pci probe and netdev registeration.
164 */
165 ret = register_netdevice_notifier(&qede_netdev_notifier);
166 if (ret) {
167 pr_notice("Failed to register netdevice_notifier\n");
168 qed_put_eth_ops();
169 return -EINVAL;
170 }
171
Yuval Mintze712d522015-10-26 11:02:27 +0200172 ret = pci_register_driver(&qede_pci_driver);
173 if (ret) {
174 pr_notice("Failed to register driver\n");
Yuval Mintz29502192015-10-26 11:02:29 +0200175 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200176 qed_put_eth_ops();
177 return -EINVAL;
178 }
179
180 return 0;
181}
182
183static void __exit qede_cleanup(void)
184{
185 pr_notice("qede_cleanup called\n");
186
Yuval Mintz29502192015-10-26 11:02:29 +0200187 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200188 pci_unregister_driver(&qede_pci_driver);
189 qed_put_eth_ops();
190}
191
192module_init(qede_init);
193module_exit(qede_cleanup);
194
195/* -------------------------------------------------------------------------
Yuval Mintz29502192015-10-26 11:02:29 +0200196 * START OF FAST-PATH
197 * -------------------------------------------------------------------------
198 */
199
200/* Unmap the data and free skb */
201static int qede_free_tx_pkt(struct qede_dev *edev,
202 struct qede_tx_queue *txq,
203 int *len)
204{
205 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
206 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
207 struct eth_tx_1st_bd *first_bd;
208 struct eth_tx_bd *tx_data_bd;
209 int bds_consumed = 0;
210 int nbds;
211 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
212 int i, split_bd_len = 0;
213
214 if (unlikely(!skb)) {
215 DP_ERR(edev,
216 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
217 idx, txq->sw_tx_cons, txq->sw_tx_prod);
218 return -1;
219 }
220
221 *len = skb->len;
222
223 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
224
225 bds_consumed++;
226
227 nbds = first_bd->data.nbds;
228
229 if (data_split) {
230 struct eth_tx_bd *split = (struct eth_tx_bd *)
231 qed_chain_consume(&txq->tx_pbl);
232 split_bd_len = BD_UNMAP_LEN(split);
233 bds_consumed++;
234 }
235 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
236 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
237
238 /* Unmap the data of the skb frags */
239 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
240 tx_data_bd = (struct eth_tx_bd *)
241 qed_chain_consume(&txq->tx_pbl);
242 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
243 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
244 }
245
246 while (bds_consumed++ < nbds)
247 qed_chain_consume(&txq->tx_pbl);
248
249 /* Free skb */
250 dev_kfree_skb_any(skb);
251 txq->sw_tx_ring[idx].skb = NULL;
252 txq->sw_tx_ring[idx].flags = 0;
253
254 return 0;
255}
256
257/* Unmap the data and free skb when mapping failed during start_xmit */
258static void qede_free_failed_tx_pkt(struct qede_dev *edev,
259 struct qede_tx_queue *txq,
260 struct eth_tx_1st_bd *first_bd,
261 int nbd,
262 bool data_split)
263{
264 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
265 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
266 struct eth_tx_bd *tx_data_bd;
267 int i, split_bd_len = 0;
268
269 /* Return prod to its position before this skb was handled */
270 qed_chain_set_prod(&txq->tx_pbl,
271 le16_to_cpu(txq->tx_db.data.bd_prod),
272 first_bd);
273
274 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
275
276 if (data_split) {
277 struct eth_tx_bd *split = (struct eth_tx_bd *)
278 qed_chain_produce(&txq->tx_pbl);
279 split_bd_len = BD_UNMAP_LEN(split);
280 nbd--;
281 }
282
283 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
284 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
285
286 /* Unmap the data of the skb frags */
287 for (i = 0; i < nbd; i++) {
288 tx_data_bd = (struct eth_tx_bd *)
289 qed_chain_produce(&txq->tx_pbl);
290 if (tx_data_bd->nbytes)
291 dma_unmap_page(&edev->pdev->dev,
292 BD_UNMAP_ADDR(tx_data_bd),
293 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
294 }
295
296 /* Return again prod to its position before this skb was handled */
297 qed_chain_set_prod(&txq->tx_pbl,
298 le16_to_cpu(txq->tx_db.data.bd_prod),
299 first_bd);
300
301 /* Free skb */
302 dev_kfree_skb_any(skb);
303 txq->sw_tx_ring[idx].skb = NULL;
304 txq->sw_tx_ring[idx].flags = 0;
305}
306
307static u32 qede_xmit_type(struct qede_dev *edev,
308 struct sk_buff *skb,
309 int *ipv6_ext)
310{
311 u32 rc = XMIT_L4_CSUM;
312 __be16 l3_proto;
313
314 if (skb->ip_summed != CHECKSUM_PARTIAL)
315 return XMIT_PLAIN;
316
317 l3_proto = vlan_get_protocol(skb);
318 if (l3_proto == htons(ETH_P_IPV6) &&
319 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
320 *ipv6_ext = 1;
321
322 if (skb_is_gso(skb))
323 rc |= XMIT_LSO;
324
325 return rc;
326}
327
328static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
329 struct eth_tx_2nd_bd *second_bd,
330 struct eth_tx_3rd_bd *third_bd)
331{
332 u8 l4_proto;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500333 u16 bd2_bits1 = 0, bd2_bits2 = 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200334
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500335 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200336
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500337 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
Yuval Mintz29502192015-10-26 11:02:29 +0200338 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
339 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
340
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500341 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
Yuval Mintz29502192015-10-26 11:02:29 +0200342 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
343
344 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
345 l4_proto = ipv6_hdr(skb)->nexthdr;
346 else
347 l4_proto = ip_hdr(skb)->protocol;
348
349 if (l4_proto == IPPROTO_UDP)
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500350 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200351
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500352 if (third_bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200353 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500354 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
355 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
356 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200357
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500358 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
Yuval Mintz29502192015-10-26 11:02:29 +0200359 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
360}
361
362static int map_frag_to_bd(struct qede_dev *edev,
363 skb_frag_t *frag,
364 struct eth_tx_bd *bd)
365{
366 dma_addr_t mapping;
367
368 /* Map skb non-linear frag data for DMA */
369 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
370 skb_frag_size(frag),
371 DMA_TO_DEVICE);
372 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
373 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
374 return -ENOMEM;
375 }
376
377 /* Setup the data pointer of the frag data */
378 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
379
380 return 0;
381}
382
383/* Main transmit function */
384static
385netdev_tx_t qede_start_xmit(struct sk_buff *skb,
386 struct net_device *ndev)
387{
388 struct qede_dev *edev = netdev_priv(ndev);
389 struct netdev_queue *netdev_txq;
390 struct qede_tx_queue *txq;
391 struct eth_tx_1st_bd *first_bd;
392 struct eth_tx_2nd_bd *second_bd = NULL;
393 struct eth_tx_3rd_bd *third_bd = NULL;
394 struct eth_tx_bd *tx_data_bd = NULL;
395 u16 txq_index;
396 u8 nbd = 0;
397 dma_addr_t mapping;
398 int rc, frag_idx = 0, ipv6_ext = 0;
399 u8 xmit_type;
400 u16 idx;
401 u16 hlen;
402 bool data_split;
403
404 /* Get tx-queue context and netdev index */
405 txq_index = skb_get_queue_mapping(skb);
406 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
407 txq = QEDE_TX_QUEUE(edev, txq_index);
408 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
409
410 /* Current code doesn't support SKB linearization, since the max number
411 * of skb frags can be passed in the FW HSI.
412 */
413 BUILD_BUG_ON(MAX_SKB_FRAGS > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET);
414
415 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
416 (MAX_SKB_FRAGS + 1));
417
418 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
419
420 /* Fill the entry in the SW ring and the BDs in the FW ring */
421 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
422 txq->sw_tx_ring[idx].skb = skb;
423 first_bd = (struct eth_tx_1st_bd *)
424 qed_chain_produce(&txq->tx_pbl);
425 memset(first_bd, 0, sizeof(*first_bd));
426 first_bd->data.bd_flags.bitfields =
427 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
428
429 /* Map skb linear data for DMA and set in the first BD */
430 mapping = dma_map_single(&edev->pdev->dev, skb->data,
431 skb_headlen(skb), DMA_TO_DEVICE);
432 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
433 DP_NOTICE(edev, "SKB mapping failed\n");
434 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
435 return NETDEV_TX_OK;
436 }
437 nbd++;
438 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
439
440 /* In case there is IPv6 with extension headers or LSO we need 2nd and
441 * 3rd BDs.
442 */
443 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
444 second_bd = (struct eth_tx_2nd_bd *)
445 qed_chain_produce(&txq->tx_pbl);
446 memset(second_bd, 0, sizeof(*second_bd));
447
448 nbd++;
449 third_bd = (struct eth_tx_3rd_bd *)
450 qed_chain_produce(&txq->tx_pbl);
451 memset(third_bd, 0, sizeof(*third_bd));
452
453 nbd++;
454 /* We need to fill in additional data in second_bd... */
455 tx_data_bd = (struct eth_tx_bd *)second_bd;
456 }
457
458 if (skb_vlan_tag_present(skb)) {
459 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
460 first_bd->data.bd_flags.bitfields |=
461 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
462 }
463
464 /* Fill the parsing flags & params according to the requested offload */
465 if (xmit_type & XMIT_L4_CSUM) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500466 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
467
Yuval Mintz29502192015-10-26 11:02:29 +0200468 /* We don't re-calculate IP checksum as it is already done by
469 * the upper stack
470 */
471 first_bd->data.bd_flags.bitfields |=
472 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
473
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500474 first_bd->data.bitfields |= cpu_to_le16(temp);
475
Yuval Mintz29502192015-10-26 11:02:29 +0200476 /* If the packet is IPv6 with extension header, indicate that
477 * to FW and pass few params, since the device cracker doesn't
478 * support parsing IPv6 with extension header/s.
479 */
480 if (unlikely(ipv6_ext))
481 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
482 }
483
484 if (xmit_type & XMIT_LSO) {
485 first_bd->data.bd_flags.bitfields |=
486 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
487 third_bd->data.lso_mss =
488 cpu_to_le16(skb_shinfo(skb)->gso_size);
489
490 first_bd->data.bd_flags.bitfields |=
491 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
492 hlen = skb_transport_header(skb) +
493 tcp_hdrlen(skb) - skb->data;
494
495 /* @@@TBD - if will not be removed need to check */
496 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500497 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
Yuval Mintz29502192015-10-26 11:02:29 +0200498
499 /* Make life easier for FW guys who can't deal with header and
500 * data on same BD. If we need to split, use the second bd...
501 */
502 if (unlikely(skb_headlen(skb) > hlen)) {
503 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
504 "TSO split header size is %d (%x:%x)\n",
505 first_bd->nbytes, first_bd->addr.hi,
506 first_bd->addr.lo);
507
508 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
509 le32_to_cpu(first_bd->addr.lo)) +
510 hlen;
511
512 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
513 le16_to_cpu(first_bd->nbytes) -
514 hlen);
515
516 /* this marks the BD as one that has no
517 * individual mapping
518 */
519 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
520
521 first_bd->nbytes = cpu_to_le16(hlen);
522
523 tx_data_bd = (struct eth_tx_bd *)third_bd;
524 data_split = true;
525 }
526 }
527
528 /* Handle fragmented skb */
529 /* special handle for frags inside 2nd and 3rd bds.. */
530 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
531 rc = map_frag_to_bd(edev,
532 &skb_shinfo(skb)->frags[frag_idx],
533 tx_data_bd);
534 if (rc) {
535 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
536 data_split);
537 return NETDEV_TX_OK;
538 }
539
540 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
541 tx_data_bd = (struct eth_tx_bd *)third_bd;
542 else
543 tx_data_bd = NULL;
544
545 frag_idx++;
546 }
547
548 /* map last frags into 4th, 5th .... */
549 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
550 tx_data_bd = (struct eth_tx_bd *)
551 qed_chain_produce(&txq->tx_pbl);
552
553 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
554
555 rc = map_frag_to_bd(edev,
556 &skb_shinfo(skb)->frags[frag_idx],
557 tx_data_bd);
558 if (rc) {
559 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
560 data_split);
561 return NETDEV_TX_OK;
562 }
563 }
564
565 /* update the first BD with the actual num BDs */
566 first_bd->data.nbds = nbd;
567
568 netdev_tx_sent_queue(netdev_txq, skb->len);
569
570 skb_tx_timestamp(skb);
571
572 /* Advance packet producer only before sending the packet since mapping
573 * of pages may fail.
574 */
575 txq->sw_tx_prod++;
576
577 /* 'next page' entries are counted in the producer value */
578 txq->tx_db.data.bd_prod =
579 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
580
581 /* wmb makes sure that the BDs data is updated before updating the
582 * producer, otherwise FW may read old data from the BDs.
583 */
584 wmb();
585 barrier();
586 writel(txq->tx_db.raw, txq->doorbell_addr);
587
588 /* mmiowb is needed to synchronize doorbell writes from more than one
589 * processor. It guarantees that the write arrives to the device before
590 * the queue lock is released and another start_xmit is called (possibly
591 * on another CPU). Without this barrier, the next doorbell can bypass
592 * this doorbell. This is applicable to IA64/Altix systems.
593 */
594 mmiowb();
595
596 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
597 < (MAX_SKB_FRAGS + 1))) {
598 netif_tx_stop_queue(netdev_txq);
599 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
600 "Stop queue was called\n");
601 /* paired memory barrier is in qede_tx_int(), we have to keep
602 * ordering of set_bit() in netif_tx_stop_queue() and read of
603 * fp->bd_tx_cons
604 */
605 smp_mb();
606
607 if (qed_chain_get_elem_left(&txq->tx_pbl)
608 >= (MAX_SKB_FRAGS + 1) &&
609 (edev->state == QEDE_STATE_OPEN)) {
610 netif_tx_wake_queue(netdev_txq);
611 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
612 "Wake queue was called\n");
613 }
614 }
615
616 return NETDEV_TX_OK;
617}
618
619static int qede_txq_has_work(struct qede_tx_queue *txq)
620{
621 u16 hw_bd_cons;
622
623 /* Tell compiler that consumer and producer can change */
624 barrier();
625 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
626 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
627 return 0;
628
629 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
630}
631
632static int qede_tx_int(struct qede_dev *edev,
633 struct qede_tx_queue *txq)
634{
635 struct netdev_queue *netdev_txq;
636 u16 hw_bd_cons;
637 unsigned int pkts_compl = 0, bytes_compl = 0;
638 int rc;
639
640 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
641
642 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
643 barrier();
644
645 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
646 int len = 0;
647
648 rc = qede_free_tx_pkt(edev, txq, &len);
649 if (rc) {
650 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
651 hw_bd_cons,
652 qed_chain_get_cons_idx(&txq->tx_pbl));
653 break;
654 }
655
656 bytes_compl += len;
657 pkts_compl++;
658 txq->sw_tx_cons++;
659 }
660
661 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
662
663 /* Need to make the tx_bd_cons update visible to start_xmit()
664 * before checking for netif_tx_queue_stopped(). Without the
665 * memory barrier, there is a small possibility that
666 * start_xmit() will miss it and cause the queue to be stopped
667 * forever.
668 * On the other hand we need an rmb() here to ensure the proper
669 * ordering of bit testing in the following
670 * netif_tx_queue_stopped(txq) call.
671 */
672 smp_mb();
673
674 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
675 /* Taking tx_lock is needed to prevent reenabling the queue
676 * while it's empty. This could have happen if rx_action() gets
677 * suspended in qede_tx_int() after the condition before
678 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
679 *
680 * stops the queue->sees fresh tx_bd_cons->releases the queue->
681 * sends some packets consuming the whole queue again->
682 * stops the queue
683 */
684
685 __netif_tx_lock(netdev_txq, smp_processor_id());
686
687 if ((netif_tx_queue_stopped(netdev_txq)) &&
688 (edev->state == QEDE_STATE_OPEN) &&
689 (qed_chain_get_elem_left(&txq->tx_pbl)
690 >= (MAX_SKB_FRAGS + 1))) {
691 netif_tx_wake_queue(netdev_txq);
692 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
693 "Wake queue was called\n");
694 }
695
696 __netif_tx_unlock(netdev_txq);
697 }
698
699 return 0;
700}
701
702static bool qede_has_rx_work(struct qede_rx_queue *rxq)
703{
704 u16 hw_comp_cons, sw_comp_cons;
705
706 /* Tell compiler that status block fields can change */
707 barrier();
708
709 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
710 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
711
712 return hw_comp_cons != sw_comp_cons;
713}
714
715static bool qede_has_tx_work(struct qede_fastpath *fp)
716{
717 u8 tc;
718
719 for (tc = 0; tc < fp->edev->num_tc; tc++)
720 if (qede_txq_has_work(&fp->txqs[tc]))
721 return true;
722 return false;
723}
724
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500725/* This function reuses the buffer(from an offset) from
726 * consumer index to producer index in the bd ring
Yuval Mintz29502192015-10-26 11:02:29 +0200727 */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500728static inline void qede_reuse_page(struct qede_dev *edev,
729 struct qede_rx_queue *rxq,
730 struct sw_rx_data *curr_cons)
Yuval Mintz29502192015-10-26 11:02:29 +0200731{
Yuval Mintz29502192015-10-26 11:02:29 +0200732 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500733 struct sw_rx_data *curr_prod;
734 dma_addr_t new_mapping;
Yuval Mintz29502192015-10-26 11:02:29 +0200735
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500736 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
737 *curr_prod = *curr_cons;
Yuval Mintz29502192015-10-26 11:02:29 +0200738
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500739 new_mapping = curr_prod->mapping + curr_prod->page_offset;
Yuval Mintz29502192015-10-26 11:02:29 +0200740
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500741 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
742 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
743
Yuval Mintz29502192015-10-26 11:02:29 +0200744 rxq->sw_rx_prod++;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500745 curr_cons->data = NULL;
746}
747
748static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
749 struct qede_rx_queue *rxq,
750 struct sw_rx_data *curr_cons)
751{
752 /* Move to the next segment in the page */
753 curr_cons->page_offset += rxq->rx_buf_seg_size;
754
755 if (curr_cons->page_offset == PAGE_SIZE) {
756 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
757 return -ENOMEM;
758
759 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
760 PAGE_SIZE, DMA_FROM_DEVICE);
761 } else {
762 /* Increment refcount of the page as we don't want
763 * network stack to take the ownership of the page
764 * which can be recycled multiple times by the driver.
765 */
766 atomic_inc(&curr_cons->data->_count);
767 qede_reuse_page(edev, rxq, curr_cons);
768 }
769
770 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200771}
772
773static inline void qede_update_rx_prod(struct qede_dev *edev,
774 struct qede_rx_queue *rxq)
775{
776 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
777 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
778 struct eth_rx_prod_data rx_prods = {0};
779
780 /* Update producers */
781 rx_prods.bd_prod = cpu_to_le16(bd_prod);
782 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
783
784 /* Make sure that the BD and SGE data is updated before updating the
785 * producers since FW might read the BD/SGE right after the producer
786 * is updated.
787 */
788 wmb();
789
790 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
791 (u32 *)&rx_prods);
792
793 /* mmiowb is needed to synchronize doorbell writes from more than one
794 * processor. It guarantees that the write arrives to the device before
795 * the napi lock is released and another qede_poll is called (possibly
796 * on another CPU). Without this barrier, the next doorbell can bypass
797 * this doorbell. This is applicable to IA64/Altix systems.
798 */
799 mmiowb();
800}
801
802static u32 qede_get_rxhash(struct qede_dev *edev,
803 u8 bitfields,
804 __le32 rss_hash,
805 enum pkt_hash_types *rxhash_type)
806{
807 enum rss_hash_type htype;
808
809 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
810
811 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
812 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
813 (htype == RSS_HASH_TYPE_IPV6)) ?
814 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
815 return le32_to_cpu(rss_hash);
816 }
817 *rxhash_type = PKT_HASH_TYPE_NONE;
818 return 0;
819}
820
821static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
822{
823 skb_checksum_none_assert(skb);
824
825 if (csum_flag & QEDE_CSUM_UNNECESSARY)
826 skb->ip_summed = CHECKSUM_UNNECESSARY;
827}
828
829static inline void qede_skb_receive(struct qede_dev *edev,
830 struct qede_fastpath *fp,
831 struct sk_buff *skb,
832 u16 vlan_tag)
833{
834 if (vlan_tag)
835 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
836 vlan_tag);
837
838 napi_gro_receive(&fp->napi, skb);
839}
840
841static u8 qede_check_csum(u16 flag)
842{
843 u16 csum_flag = 0;
844 u8 csum = 0;
845
846 if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
847 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
848 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
849 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
850 csum = QEDE_CSUM_UNNECESSARY;
851 }
852
853 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
854 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
855
856 if (csum_flag & flag)
857 return QEDE_CSUM_ERROR;
858
859 return csum;
860}
861
862static int qede_rx_int(struct qede_fastpath *fp, int budget)
863{
864 struct qede_dev *edev = fp->edev;
865 struct qede_rx_queue *rxq = fp->rxq;
866
867 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
868 int rx_pkt = 0;
869 u8 csum_flag;
870
871 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
872 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
873
874 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
875 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
876 * read before it is written by FW, then FW writes CQE and SB, and then
877 * the CPU reads the hw_comp_cons, it will use an old CQE.
878 */
879 rmb();
880
881 /* Loop to complete all indicated BDs */
882 while (sw_comp_cons != hw_comp_cons) {
883 struct eth_fast_path_rx_reg_cqe *fp_cqe;
884 enum pkt_hash_types rxhash_type;
885 enum eth_rx_cqe_type cqe_type;
886 struct sw_rx_data *sw_rx_data;
887 union eth_rx_cqe *cqe;
888 struct sk_buff *skb;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500889 struct page *data;
890 __le16 flags;
Yuval Mintz29502192015-10-26 11:02:29 +0200891 u16 len, pad;
892 u32 rx_hash;
Yuval Mintz29502192015-10-26 11:02:29 +0200893
894 /* Get the CQE from the completion ring */
895 cqe = (union eth_rx_cqe *)
896 qed_chain_consume(&rxq->rx_comp_ring);
897 cqe_type = cqe->fast_path_regular.type;
898
899 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
900 edev->ops->eth_cqe_completion(
901 edev->cdev, fp->rss_id,
902 (struct eth_slow_path_rx_cqe *)cqe);
903 goto next_cqe;
904 }
905
906 /* Get the data from the SW ring */
907 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
908 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
909 data = sw_rx_data->data;
910
911 fp_cqe = &cqe->fast_path_regular;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500912 len = le16_to_cpu(fp_cqe->len_on_first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +0200913 pad = fp_cqe->placement_offset;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500914 flags = cqe->fast_path_regular.pars_flags.flags;
Yuval Mintz29502192015-10-26 11:02:29 +0200915
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500916 /* If this is an error packet then drop it */
917 parse_flag = le16_to_cpu(flags);
Yuval Mintz29502192015-10-26 11:02:29 +0200918
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500919 csum_flag = qede_check_csum(parse_flag);
920 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
Yuval Mintz29502192015-10-26 11:02:29 +0200921 DP_NOTICE(edev,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500922 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
923 sw_comp_cons, parse_flag);
924 rxq->rx_hw_errors++;
925 qede_reuse_page(edev, rxq, sw_rx_data);
926 goto next_rx;
Yuval Mintz29502192015-10-26 11:02:29 +0200927 }
928
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500929 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
930 if (unlikely(!skb)) {
931 DP_NOTICE(edev,
932 "Build_skb failed, dropping incoming packet\n");
933 qede_reuse_page(edev, rxq, sw_rx_data);
934 rxq->rx_alloc_errors++;
935 goto next_rx;
936 }
Yuval Mintz29502192015-10-26 11:02:29 +0200937
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500938 /* Copy data into SKB */
939 if (len + pad <= QEDE_RX_HDR_SIZE) {
940 memcpy(skb_put(skb, len),
941 page_address(data) + pad +
942 sw_rx_data->page_offset, len);
943 qede_reuse_page(edev, rxq, sw_rx_data);
944 } else {
945 struct skb_frag_struct *frag;
946 unsigned int pull_len;
947 unsigned char *va;
948
949 frag = &skb_shinfo(skb)->frags[0];
950
951 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
952 pad + sw_rx_data->page_offset,
953 len, rxq->rx_buf_seg_size);
954
955 va = skb_frag_address(frag);
956 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
957
958 /* Align the pull_len to optimize memcpy */
959 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
960
961 skb_frag_size_sub(frag, pull_len);
962 frag->page_offset += pull_len;
963 skb->data_len -= pull_len;
964 skb->tail += pull_len;
965
966 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
967 sw_rx_data))) {
968 DP_ERR(edev, "Failed to allocate rx buffer\n");
969 rxq->rx_alloc_errors++;
970 goto next_cqe;
971 }
972 }
973
974 if (fp_cqe->bd_num != 1) {
975 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
976 u8 num_frags;
977
978 pkt_len -= len;
979
980 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
981 num_frags--) {
982 u16 cur_size = pkt_len > rxq->rx_buf_size ?
983 rxq->rx_buf_size : pkt_len;
984
985 WARN_ONCE(!cur_size,
986 "Still got %d BDs for mapping jumbo, but length became 0\n",
987 num_frags);
988
989 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
990 goto next_cqe;
991
992 rxq->sw_rx_cons++;
993 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
994 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
995 qed_chain_consume(&rxq->rx_bd_ring);
996 dma_unmap_page(&edev->pdev->dev,
997 sw_rx_data->mapping,
998 PAGE_SIZE, DMA_FROM_DEVICE);
999
1000 skb_fill_page_desc(skb,
1001 skb_shinfo(skb)->nr_frags++,
1002 sw_rx_data->data, 0,
1003 cur_size);
1004
1005 skb->truesize += PAGE_SIZE;
1006 skb->data_len += cur_size;
1007 skb->len += cur_size;
1008 pkt_len -= cur_size;
1009 }
1010
1011 if (pkt_len)
1012 DP_ERR(edev,
1013 "Mapped all BDs of jumbo, but still have %d bytes\n",
1014 pkt_len);
1015 }
Yuval Mintz29502192015-10-26 11:02:29 +02001016
1017 skb->protocol = eth_type_trans(skb, edev->ndev);
1018
1019 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1020 fp_cqe->rss_hash,
1021 &rxhash_type);
1022
1023 skb_set_hash(skb, rx_hash, rxhash_type);
1024
1025 qede_set_skb_csum(skb, csum_flag);
1026
1027 skb_record_rx_queue(skb, fp->rss_id);
1028
1029 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
1030
1031 qed_chain_consume(&rxq->rx_bd_ring);
1032
1033next_rx:
1034 rxq->sw_rx_cons++;
1035 rx_pkt++;
1036
1037next_cqe: /* don't consume bd rx buffer */
1038 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1039 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1040 /* CR TPA - revisit how to handle budget in TPA perhaps
1041 * increase on "end"
1042 */
1043 if (rx_pkt == budget)
1044 break;
1045 } /* repeat while sw_comp_cons != hw_comp_cons... */
1046
1047 /* Update producers */
1048 qede_update_rx_prod(edev, rxq);
1049
1050 return rx_pkt;
1051}
1052
1053static int qede_poll(struct napi_struct *napi, int budget)
1054{
1055 int work_done = 0;
1056 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1057 napi);
1058 struct qede_dev *edev = fp->edev;
1059
1060 while (1) {
1061 u8 tc;
1062
1063 for (tc = 0; tc < edev->num_tc; tc++)
1064 if (qede_txq_has_work(&fp->txqs[tc]))
1065 qede_tx_int(edev, &fp->txqs[tc]);
1066
1067 if (qede_has_rx_work(fp->rxq)) {
1068 work_done += qede_rx_int(fp, budget - work_done);
1069
1070 /* must not complete if we consumed full budget */
1071 if (work_done >= budget)
1072 break;
1073 }
1074
1075 /* Fall out from the NAPI loop if needed */
1076 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1077 qed_sb_update_sb_idx(fp->sb_info);
1078 /* *_has_*_work() reads the status block,
1079 * thus we need to ensure that status block indices
1080 * have been actually read (qed_sb_update_sb_idx)
1081 * prior to this check (*_has_*_work) so that
1082 * we won't write the "newer" value of the status block
1083 * to HW (if there was a DMA right after
1084 * qede_has_rx_work and if there is no rmb, the memory
1085 * reading (qed_sb_update_sb_idx) may be postponed
1086 * to right before *_ack_sb). In this case there
1087 * will never be another interrupt until there is
1088 * another update of the status block, while there
1089 * is still unhandled work.
1090 */
1091 rmb();
1092
1093 if (!(qede_has_rx_work(fp->rxq) ||
1094 qede_has_tx_work(fp))) {
1095 napi_complete(napi);
1096 /* Update and reenable interrupts */
1097 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1098 1 /*update*/);
1099 break;
1100 }
1101 }
1102 }
1103
1104 return work_done;
1105}
1106
1107static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1108{
1109 struct qede_fastpath *fp = fp_cookie;
1110
1111 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1112
1113 napi_schedule_irqoff(&fp->napi);
1114 return IRQ_HANDLED;
1115}
1116
1117/* -------------------------------------------------------------------------
1118 * END OF FAST-PATH
1119 * -------------------------------------------------------------------------
1120 */
1121
1122static int qede_open(struct net_device *ndev);
1123static int qede_close(struct net_device *ndev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001124static int qede_set_mac_addr(struct net_device *ndev, void *p);
1125static void qede_set_rx_mode(struct net_device *ndev);
1126static void qede_config_rx_mode(struct net_device *ndev);
1127
1128static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1129 enum qed_filter_xcast_params_type opcode,
1130 unsigned char mac[ETH_ALEN])
1131{
1132 struct qed_filter_params filter_cmd;
1133
1134 memset(&filter_cmd, 0, sizeof(filter_cmd));
1135 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1136 filter_cmd.filter.ucast.type = opcode;
1137 filter_cmd.filter.ucast.mac_valid = 1;
1138 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1139
1140 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1141}
1142
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001143static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1144 enum qed_filter_xcast_params_type opcode,
1145 u16 vid)
1146{
1147 struct qed_filter_params filter_cmd;
1148
1149 memset(&filter_cmd, 0, sizeof(filter_cmd));
1150 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1151 filter_cmd.filter.ucast.type = opcode;
1152 filter_cmd.filter.ucast.vlan_valid = 1;
1153 filter_cmd.filter.ucast.vlan = vid;
1154
1155 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1156}
1157
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001158void qede_fill_by_demand_stats(struct qede_dev *edev)
1159{
1160 struct qed_eth_stats stats;
1161
1162 edev->ops->get_vport_stats(edev->cdev, &stats);
1163 edev->stats.no_buff_discards = stats.no_buff_discards;
1164 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1165 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1166 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1167 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1168 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1169 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1170 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1171 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1172
1173 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1174 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1175 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1176 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1177 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1178 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1179 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1180 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1181 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1182 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1183 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1184 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1185
1186 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1187 edev->stats.rx_127_byte_packets = stats.rx_127_byte_packets;
1188 edev->stats.rx_255_byte_packets = stats.rx_255_byte_packets;
1189 edev->stats.rx_511_byte_packets = stats.rx_511_byte_packets;
1190 edev->stats.rx_1023_byte_packets = stats.rx_1023_byte_packets;
1191 edev->stats.rx_1518_byte_packets = stats.rx_1518_byte_packets;
1192 edev->stats.rx_1522_byte_packets = stats.rx_1522_byte_packets;
1193 edev->stats.rx_2047_byte_packets = stats.rx_2047_byte_packets;
1194 edev->stats.rx_4095_byte_packets = stats.rx_4095_byte_packets;
1195 edev->stats.rx_9216_byte_packets = stats.rx_9216_byte_packets;
1196 edev->stats.rx_16383_byte_packets = stats.rx_16383_byte_packets;
1197 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1198 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1199 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1200 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1201 edev->stats.rx_align_errors = stats.rx_align_errors;
1202 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1203 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1204 edev->stats.rx_jabbers = stats.rx_jabbers;
1205 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1206 edev->stats.rx_fragments = stats.rx_fragments;
1207 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1208 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1209 edev->stats.tx_128_to_255_byte_packets =
1210 stats.tx_128_to_255_byte_packets;
1211 edev->stats.tx_256_to_511_byte_packets =
1212 stats.tx_256_to_511_byte_packets;
1213 edev->stats.tx_512_to_1023_byte_packets =
1214 stats.tx_512_to_1023_byte_packets;
1215 edev->stats.tx_1024_to_1518_byte_packets =
1216 stats.tx_1024_to_1518_byte_packets;
1217 edev->stats.tx_1519_to_2047_byte_packets =
1218 stats.tx_1519_to_2047_byte_packets;
1219 edev->stats.tx_2048_to_4095_byte_packets =
1220 stats.tx_2048_to_4095_byte_packets;
1221 edev->stats.tx_4096_to_9216_byte_packets =
1222 stats.tx_4096_to_9216_byte_packets;
1223 edev->stats.tx_9217_to_16383_byte_packets =
1224 stats.tx_9217_to_16383_byte_packets;
1225 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1226 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1227 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1228 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1229 edev->stats.brb_truncates = stats.brb_truncates;
1230 edev->stats.brb_discards = stats.brb_discards;
1231 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1232}
1233
1234static struct rtnl_link_stats64 *qede_get_stats64(
1235 struct net_device *dev,
1236 struct rtnl_link_stats64 *stats)
1237{
1238 struct qede_dev *edev = netdev_priv(dev);
1239
1240 qede_fill_by_demand_stats(edev);
1241
1242 stats->rx_packets = edev->stats.rx_ucast_pkts +
1243 edev->stats.rx_mcast_pkts +
1244 edev->stats.rx_bcast_pkts;
1245 stats->tx_packets = edev->stats.tx_ucast_pkts +
1246 edev->stats.tx_mcast_pkts +
1247 edev->stats.tx_bcast_pkts;
1248
1249 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1250 edev->stats.rx_mcast_bytes +
1251 edev->stats.rx_bcast_bytes;
1252
1253 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1254 edev->stats.tx_mcast_bytes +
1255 edev->stats.tx_bcast_bytes;
1256
1257 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1258 stats->multicast = edev->stats.rx_mcast_pkts +
1259 edev->stats.rx_bcast_pkts;
1260
1261 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1262
1263 stats->collisions = edev->stats.tx_total_collisions;
1264 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1265 stats->rx_frame_errors = edev->stats.rx_align_errors;
1266
1267 return stats;
1268}
1269
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001270static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1271{
1272 struct qed_update_vport_params params;
1273 int rc;
1274
1275 /* Proceed only if action actually needs to be performed */
1276 if (edev->accept_any_vlan == action)
1277 return;
1278
1279 memset(&params, 0, sizeof(params));
1280
1281 params.vport_id = 0;
1282 params.accept_any_vlan = action;
1283 params.update_accept_any_vlan_flg = 1;
1284
1285 rc = edev->ops->vport_update(edev->cdev, &params);
1286 if (rc) {
1287 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1288 action ? "enable" : "disable");
1289 } else {
1290 DP_INFO(edev, "%s accept-any-vlan\n",
1291 action ? "enabled" : "disabled");
1292 edev->accept_any_vlan = action;
1293 }
1294}
1295
1296static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1297{
1298 struct qede_dev *edev = netdev_priv(dev);
1299 struct qede_vlan *vlan, *tmp;
1300 int rc;
1301
1302 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1303
1304 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1305 if (!vlan) {
1306 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1307 return -ENOMEM;
1308 }
1309 INIT_LIST_HEAD(&vlan->list);
1310 vlan->vid = vid;
1311 vlan->configured = false;
1312
1313 /* Verify vlan isn't already configured */
1314 list_for_each_entry(tmp, &edev->vlan_list, list) {
1315 if (tmp->vid == vlan->vid) {
1316 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1317 "vlan already configured\n");
1318 kfree(vlan);
1319 return -EEXIST;
1320 }
1321 }
1322
1323 /* If interface is down, cache this VLAN ID and return */
1324 if (edev->state != QEDE_STATE_OPEN) {
1325 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1326 "Interface is down, VLAN %d will be configured when interface is up\n",
1327 vid);
1328 if (vid != 0)
1329 edev->non_configured_vlans++;
1330 list_add(&vlan->list, &edev->vlan_list);
1331
1332 return 0;
1333 }
1334
1335 /* Check for the filter limit.
1336 * Note - vlan0 has a reserved filter and can be added without
1337 * worrying about quota
1338 */
1339 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1340 (vlan->vid == 0)) {
1341 rc = qede_set_ucast_rx_vlan(edev,
1342 QED_FILTER_XCAST_TYPE_ADD,
1343 vlan->vid);
1344 if (rc) {
1345 DP_ERR(edev, "Failed to configure VLAN %d\n",
1346 vlan->vid);
1347 kfree(vlan);
1348 return -EINVAL;
1349 }
1350 vlan->configured = true;
1351
1352 /* vlan0 filter isn't consuming out of our quota */
1353 if (vlan->vid != 0)
1354 edev->configured_vlans++;
1355 } else {
1356 /* Out of quota; Activate accept-any-VLAN mode */
1357 if (!edev->non_configured_vlans)
1358 qede_config_accept_any_vlan(edev, true);
1359
1360 edev->non_configured_vlans++;
1361 }
1362
1363 list_add(&vlan->list, &edev->vlan_list);
1364
1365 return 0;
1366}
1367
1368static void qede_del_vlan_from_list(struct qede_dev *edev,
1369 struct qede_vlan *vlan)
1370{
1371 /* vlan0 filter isn't consuming out of our quota */
1372 if (vlan->vid != 0) {
1373 if (vlan->configured)
1374 edev->configured_vlans--;
1375 else
1376 edev->non_configured_vlans--;
1377 }
1378
1379 list_del(&vlan->list);
1380 kfree(vlan);
1381}
1382
1383static int qede_configure_vlan_filters(struct qede_dev *edev)
1384{
1385 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1386 struct qed_dev_eth_info *dev_info;
1387 struct qede_vlan *vlan = NULL;
1388
1389 if (list_empty(&edev->vlan_list))
1390 return 0;
1391
1392 dev_info = &edev->dev_info;
1393
1394 /* Configure non-configured vlans */
1395 list_for_each_entry(vlan, &edev->vlan_list, list) {
1396 if (vlan->configured)
1397 continue;
1398
1399 /* We have used all our credits, now enable accept_any_vlan */
1400 if ((vlan->vid != 0) &&
1401 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1402 accept_any_vlan = 1;
1403 continue;
1404 }
1405
1406 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1407
1408 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1409 vlan->vid);
1410 if (rc) {
1411 DP_ERR(edev, "Failed to configure VLAN %u\n",
1412 vlan->vid);
1413 real_rc = rc;
1414 continue;
1415 }
1416
1417 vlan->configured = true;
1418 /* vlan0 filter doesn't consume our VLAN filter's quota */
1419 if (vlan->vid != 0) {
1420 edev->non_configured_vlans--;
1421 edev->configured_vlans++;
1422 }
1423 }
1424
1425 /* enable accept_any_vlan mode if we have more VLANs than credits,
1426 * or remove accept_any_vlan mode if we've actually removed
1427 * a non-configured vlan, and all remaining vlans are truly configured.
1428 */
1429
1430 if (accept_any_vlan)
1431 qede_config_accept_any_vlan(edev, true);
1432 else if (!edev->non_configured_vlans)
1433 qede_config_accept_any_vlan(edev, false);
1434
1435 return real_rc;
1436}
1437
1438static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
1439{
1440 struct qede_dev *edev = netdev_priv(dev);
1441 struct qede_vlan *vlan = NULL;
1442 int rc;
1443
1444 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
1445
1446 /* Find whether entry exists */
1447 list_for_each_entry(vlan, &edev->vlan_list, list)
1448 if (vlan->vid == vid)
1449 break;
1450
1451 if (!vlan || (vlan->vid != vid)) {
1452 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1453 "Vlan isn't configured\n");
1454 return 0;
1455 }
1456
1457 if (edev->state != QEDE_STATE_OPEN) {
1458 /* As interface is already down, we don't have a VPORT
1459 * instance to remove vlan filter. So just update vlan list
1460 */
1461 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1462 "Interface is down, removing VLAN from list only\n");
1463 qede_del_vlan_from_list(edev, vlan);
1464 return 0;
1465 }
1466
1467 /* Remove vlan */
1468 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
1469 if (rc) {
1470 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
1471 return -EINVAL;
1472 }
1473
1474 qede_del_vlan_from_list(edev, vlan);
1475
1476 /* We have removed a VLAN - try to see if we can
1477 * configure non-configured VLAN from the list.
1478 */
1479 rc = qede_configure_vlan_filters(edev);
1480
1481 return rc;
1482}
1483
1484static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
1485{
1486 struct qede_vlan *vlan = NULL;
1487
1488 if (list_empty(&edev->vlan_list))
1489 return;
1490
1491 list_for_each_entry(vlan, &edev->vlan_list, list) {
1492 if (!vlan->configured)
1493 continue;
1494
1495 vlan->configured = false;
1496
1497 /* vlan0 filter isn't consuming out of our quota */
1498 if (vlan->vid != 0) {
1499 edev->non_configured_vlans++;
1500 edev->configured_vlans--;
1501 }
1502
1503 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1504 "marked vlan %d as non-configured\n",
1505 vlan->vid);
1506 }
1507
1508 edev->accept_any_vlan = false;
1509}
1510
Yuval Mintz29502192015-10-26 11:02:29 +02001511static const struct net_device_ops qede_netdev_ops = {
1512 .ndo_open = qede_open,
1513 .ndo_stop = qede_close,
1514 .ndo_start_xmit = qede_start_xmit,
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001515 .ndo_set_rx_mode = qede_set_rx_mode,
1516 .ndo_set_mac_address = qede_set_mac_addr,
Yuval Mintz29502192015-10-26 11:02:29 +02001517 .ndo_validate_addr = eth_validate_addr,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001518 .ndo_change_mtu = qede_change_mtu,
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001519 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
1520 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001521 .ndo_get_stats64 = qede_get_stats64,
Yuval Mintz29502192015-10-26 11:02:29 +02001522};
1523
1524/* -------------------------------------------------------------------------
Yuval Mintze712d522015-10-26 11:02:27 +02001525 * START OF PROBE / REMOVE
1526 * -------------------------------------------------------------------------
1527 */
1528
1529static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
1530 struct pci_dev *pdev,
1531 struct qed_dev_eth_info *info,
1532 u32 dp_module,
1533 u8 dp_level)
1534{
1535 struct net_device *ndev;
1536 struct qede_dev *edev;
1537
1538 ndev = alloc_etherdev_mqs(sizeof(*edev),
1539 info->num_queues,
1540 info->num_queues);
1541 if (!ndev) {
1542 pr_err("etherdev allocation failed\n");
1543 return NULL;
1544 }
1545
1546 edev = netdev_priv(ndev);
1547 edev->ndev = ndev;
1548 edev->cdev = cdev;
1549 edev->pdev = pdev;
1550 edev->dp_module = dp_module;
1551 edev->dp_level = dp_level;
1552 edev->ops = qed_ops;
Yuval Mintz29502192015-10-26 11:02:29 +02001553 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
1554 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
Yuval Mintze712d522015-10-26 11:02:27 +02001555
1556 DP_INFO(edev, "Allocated netdev with 64 tx queues and 64 rx queues\n");
1557
1558 SET_NETDEV_DEV(ndev, &pdev->dev);
1559
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001560 memset(&edev->stats, 0, sizeof(edev->stats));
Yuval Mintze712d522015-10-26 11:02:27 +02001561 memcpy(&edev->dev_info, info, sizeof(*info));
1562
1563 edev->num_tc = edev->dev_info.num_tc;
1564
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001565 INIT_LIST_HEAD(&edev->vlan_list);
1566
Yuval Mintze712d522015-10-26 11:02:27 +02001567 return edev;
1568}
1569
1570static void qede_init_ndev(struct qede_dev *edev)
1571{
1572 struct net_device *ndev = edev->ndev;
1573 struct pci_dev *pdev = edev->pdev;
1574 u32 hw_features;
1575
1576 pci_set_drvdata(pdev, ndev);
1577
1578 ndev->mem_start = edev->dev_info.common.pci_mem_start;
1579 ndev->base_addr = ndev->mem_start;
1580 ndev->mem_end = edev->dev_info.common.pci_mem_end;
1581 ndev->irq = edev->dev_info.common.pci_irq;
1582
1583 ndev->watchdog_timeo = TX_TIMEOUT;
1584
Yuval Mintz29502192015-10-26 11:02:29 +02001585 ndev->netdev_ops = &qede_netdev_ops;
1586
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001587 qede_set_ethtool_ops(ndev);
1588
Yuval Mintze712d522015-10-26 11:02:27 +02001589 /* user-changeble features */
1590 hw_features = NETIF_F_GRO | NETIF_F_SG |
1591 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1592 NETIF_F_TSO | NETIF_F_TSO6;
1593
1594 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1595 NETIF_F_HIGHDMA;
1596 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1597 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001598 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
Yuval Mintze712d522015-10-26 11:02:27 +02001599
1600 ndev->hw_features = hw_features;
1601
1602 /* Set network device HW mac */
1603 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
1604}
1605
1606/* This function converts from 32b param to two params of level and module
1607 * Input 32b decoding:
1608 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
1609 * 'happy' flow, e.g. memory allocation failed.
1610 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
1611 * and provide important parameters.
1612 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
1613 * module. VERBOSE prints are for tracking the specific flow in low level.
1614 *
1615 * Notice that the level should be that of the lowest required logs.
1616 */
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001617void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02001618{
1619 *p_dp_level = QED_LEVEL_NOTICE;
1620 *p_dp_module = 0;
1621
1622 if (debug & QED_LOG_VERBOSE_MASK) {
1623 *p_dp_level = QED_LEVEL_VERBOSE;
1624 *p_dp_module = (debug & 0x3FFFFFFF);
1625 } else if (debug & QED_LOG_INFO_MASK) {
1626 *p_dp_level = QED_LEVEL_INFO;
1627 } else if (debug & QED_LOG_NOTICE_MASK) {
1628 *p_dp_level = QED_LEVEL_NOTICE;
1629 }
1630}
1631
Yuval Mintz29502192015-10-26 11:02:29 +02001632static void qede_free_fp_array(struct qede_dev *edev)
1633{
1634 if (edev->fp_array) {
1635 struct qede_fastpath *fp;
1636 int i;
1637
1638 for_each_rss(i) {
1639 fp = &edev->fp_array[i];
1640
1641 kfree(fp->sb_info);
1642 kfree(fp->rxq);
1643 kfree(fp->txqs);
1644 }
1645 kfree(edev->fp_array);
1646 }
1647 edev->num_rss = 0;
1648}
1649
1650static int qede_alloc_fp_array(struct qede_dev *edev)
1651{
1652 struct qede_fastpath *fp;
1653 int i;
1654
1655 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
1656 sizeof(*edev->fp_array), GFP_KERNEL);
1657 if (!edev->fp_array) {
1658 DP_NOTICE(edev, "fp array allocation failed\n");
1659 goto err;
1660 }
1661
1662 for_each_rss(i) {
1663 fp = &edev->fp_array[i];
1664
1665 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
1666 if (!fp->sb_info) {
1667 DP_NOTICE(edev, "sb info struct allocation failed\n");
1668 goto err;
1669 }
1670
1671 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
1672 if (!fp->rxq) {
1673 DP_NOTICE(edev, "RXQ struct allocation failed\n");
1674 goto err;
1675 }
1676
1677 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
1678 if (!fp->txqs) {
1679 DP_NOTICE(edev, "TXQ array allocation failed\n");
1680 goto err;
1681 }
1682 }
1683
1684 return 0;
1685err:
1686 qede_free_fp_array(edev);
1687 return -ENOMEM;
1688}
1689
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001690static void qede_sp_task(struct work_struct *work)
1691{
1692 struct qede_dev *edev = container_of(work, struct qede_dev,
1693 sp_task.work);
1694 mutex_lock(&edev->qede_lock);
1695
1696 if (edev->state == QEDE_STATE_OPEN) {
1697 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1698 qede_config_rx_mode(edev->ndev);
1699 }
1700
1701 mutex_unlock(&edev->qede_lock);
1702}
1703
Yuval Mintze712d522015-10-26 11:02:27 +02001704static void qede_update_pf_params(struct qed_dev *cdev)
1705{
1706 struct qed_pf_params pf_params;
1707
1708 /* 16 rx + 16 tx */
1709 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1710 pf_params.eth_pf_params.num_cons = 32;
1711 qed_ops->common->update_pf_params(cdev, &pf_params);
1712}
1713
1714enum qede_probe_mode {
1715 QEDE_PROBE_NORMAL,
1716};
1717
1718static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1719 enum qede_probe_mode mode)
1720{
1721 struct qed_slowpath_params params;
1722 struct qed_dev_eth_info dev_info;
1723 struct qede_dev *edev;
1724 struct qed_dev *cdev;
1725 int rc;
1726
1727 if (unlikely(dp_level & QED_LEVEL_INFO))
1728 pr_notice("Starting qede probe\n");
1729
1730 cdev = qed_ops->common->probe(pdev, QED_PROTOCOL_ETH,
1731 dp_module, dp_level);
1732 if (!cdev) {
1733 rc = -ENODEV;
1734 goto err0;
1735 }
1736
1737 qede_update_pf_params(cdev);
1738
1739 /* Start the Slowpath-process */
1740 memset(&params, 0, sizeof(struct qed_slowpath_params));
1741 params.int_mode = QED_INT_MODE_MSIX;
1742 params.drv_major = QEDE_MAJOR_VERSION;
1743 params.drv_minor = QEDE_MINOR_VERSION;
1744 params.drv_rev = QEDE_REVISION_VERSION;
1745 params.drv_eng = QEDE_ENGINEERING_VERSION;
1746 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1747 rc = qed_ops->common->slowpath_start(cdev, &params);
1748 if (rc) {
1749 pr_notice("Cannot start slowpath\n");
1750 goto err1;
1751 }
1752
1753 /* Learn information crucial for qede to progress */
1754 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1755 if (rc)
1756 goto err2;
1757
1758 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1759 dp_level);
1760 if (!edev) {
1761 rc = -ENOMEM;
1762 goto err2;
1763 }
1764
1765 qede_init_ndev(edev);
1766
Yuval Mintz29502192015-10-26 11:02:29 +02001767 rc = register_netdev(edev->ndev);
1768 if (rc) {
1769 DP_NOTICE(edev, "Cannot register net-device\n");
1770 goto err3;
1771 }
1772
Yuval Mintze712d522015-10-26 11:02:27 +02001773 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
1774
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02001775 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1776
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001777 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1778 mutex_init(&edev->qede_lock);
1779
Yuval Mintze712d522015-10-26 11:02:27 +02001780 DP_INFO(edev, "Ending successfully qede probe\n");
1781
1782 return 0;
1783
Yuval Mintz29502192015-10-26 11:02:29 +02001784err3:
1785 free_netdev(edev->ndev);
Yuval Mintze712d522015-10-26 11:02:27 +02001786err2:
1787 qed_ops->common->slowpath_stop(cdev);
1788err1:
1789 qed_ops->common->remove(cdev);
1790err0:
1791 return rc;
1792}
1793
1794static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1795{
1796 u32 dp_module = 0;
1797 u8 dp_level = 0;
1798
1799 qede_config_debug(debug, &dp_module, &dp_level);
1800
1801 return __qede_probe(pdev, dp_module, dp_level,
1802 QEDE_PROBE_NORMAL);
1803}
1804
1805enum qede_remove_mode {
1806 QEDE_REMOVE_NORMAL,
1807};
1808
1809static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1810{
1811 struct net_device *ndev = pci_get_drvdata(pdev);
1812 struct qede_dev *edev = netdev_priv(ndev);
1813 struct qed_dev *cdev = edev->cdev;
1814
1815 DP_INFO(edev, "Starting qede_remove\n");
1816
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001817 cancel_delayed_work_sync(&edev->sp_task);
Yuval Mintz29502192015-10-26 11:02:29 +02001818 unregister_netdev(ndev);
1819
Yuval Mintze712d522015-10-26 11:02:27 +02001820 edev->ops->common->set_power_state(cdev, PCI_D0);
1821
1822 pci_set_drvdata(pdev, NULL);
1823
1824 free_netdev(ndev);
1825
1826 /* Use global ops since we've freed edev */
1827 qed_ops->common->slowpath_stop(cdev);
1828 qed_ops->common->remove(cdev);
1829
1830 pr_notice("Ending successfully qede_remove\n");
1831}
1832
1833static void qede_remove(struct pci_dev *pdev)
1834{
1835 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1836}
Yuval Mintz29502192015-10-26 11:02:29 +02001837
1838/* -------------------------------------------------------------------------
1839 * START OF LOAD / UNLOAD
1840 * -------------------------------------------------------------------------
1841 */
1842
1843static int qede_set_num_queues(struct qede_dev *edev)
1844{
1845 int rc;
1846 u16 rss_num;
1847
1848 /* Setup queues according to possible resources*/
Sudarsana Kalluru8edf0492015-11-30 12:25:01 +02001849 if (edev->req_rss)
1850 rss_num = edev->req_rss;
1851 else
1852 rss_num = netif_get_num_default_rss_queues() *
1853 edev->dev_info.common.num_hwfns;
Yuval Mintz29502192015-10-26 11:02:29 +02001854
1855 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1856
1857 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1858 if (rc > 0) {
1859 /* Managed to request interrupts for our queues */
1860 edev->num_rss = rc;
1861 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1862 QEDE_RSS_CNT(edev), rss_num);
1863 rc = 0;
1864 }
1865 return rc;
1866}
1867
1868static void qede_free_mem_sb(struct qede_dev *edev,
1869 struct qed_sb_info *sb_info)
1870{
1871 if (sb_info->sb_virt)
1872 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1873 (void *)sb_info->sb_virt, sb_info->sb_phys);
1874}
1875
1876/* This function allocates fast-path status block memory */
1877static int qede_alloc_mem_sb(struct qede_dev *edev,
1878 struct qed_sb_info *sb_info,
1879 u16 sb_id)
1880{
1881 struct status_block *sb_virt;
1882 dma_addr_t sb_phys;
1883 int rc;
1884
1885 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1886 sizeof(*sb_virt),
1887 &sb_phys, GFP_KERNEL);
1888 if (!sb_virt) {
1889 DP_ERR(edev, "Status block allocation failed\n");
1890 return -ENOMEM;
1891 }
1892
1893 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1894 sb_virt, sb_phys, sb_id,
1895 QED_SB_TYPE_L2_QUEUE);
1896 if (rc) {
1897 DP_ERR(edev, "Status block initialization failed\n");
1898 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1899 sb_virt, sb_phys);
1900 return rc;
1901 }
1902
1903 return 0;
1904}
1905
1906static void qede_free_rx_buffers(struct qede_dev *edev,
1907 struct qede_rx_queue *rxq)
1908{
1909 u16 i;
1910
1911 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1912 struct sw_rx_data *rx_buf;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001913 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02001914
1915 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1916 data = rx_buf->data;
1917
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001918 dma_unmap_page(&edev->pdev->dev,
1919 rx_buf->mapping,
1920 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02001921
1922 rx_buf->data = NULL;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001923 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02001924 }
1925}
1926
1927static void qede_free_mem_rxq(struct qede_dev *edev,
1928 struct qede_rx_queue *rxq)
1929{
1930 /* Free rx buffers */
1931 qede_free_rx_buffers(edev, rxq);
1932
1933 /* Free the parallel SW ring */
1934 kfree(rxq->sw_rx_ring);
1935
1936 /* Free the real RQ ring used by FW */
1937 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1938 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1939}
1940
1941static int qede_alloc_rx_buffer(struct qede_dev *edev,
1942 struct qede_rx_queue *rxq)
1943{
1944 struct sw_rx_data *sw_rx_data;
1945 struct eth_rx_bd *rx_bd;
1946 dma_addr_t mapping;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001947 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02001948 u16 rx_buf_size;
Yuval Mintz29502192015-10-26 11:02:29 +02001949
1950 rx_buf_size = rxq->rx_buf_size;
1951
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001952 data = alloc_pages(GFP_ATOMIC, 0);
Yuval Mintz29502192015-10-26 11:02:29 +02001953 if (unlikely(!data)) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001954 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
Yuval Mintz29502192015-10-26 11:02:29 +02001955 return -ENOMEM;
1956 }
1957
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001958 /* Map the entire page as it would be used
1959 * for multiple RX buffer segment size mapping.
1960 */
1961 mapping = dma_map_page(&edev->pdev->dev, data, 0,
1962 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02001963 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001964 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02001965 DP_NOTICE(edev, "Failed to map Rx buffer\n");
1966 return -ENOMEM;
1967 }
1968
1969 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001970 sw_rx_data->page_offset = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02001971 sw_rx_data->data = data;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001972 sw_rx_data->mapping = mapping;
Yuval Mintz29502192015-10-26 11:02:29 +02001973
1974 /* Advance PROD and get BD pointer */
1975 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
1976 WARN_ON(!rx_bd);
1977 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1978 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1979
1980 rxq->sw_rx_prod++;
1981
1982 return 0;
1983}
1984
1985/* This function allocates all memory needed per Rx queue */
1986static int qede_alloc_mem_rxq(struct qede_dev *edev,
1987 struct qede_rx_queue *rxq)
1988{
1989 int i, rc, size, num_allocated;
1990
1991 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1992
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001993 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
1994 edev->ndev->mtu;
1995 if (rxq->rx_buf_size > PAGE_SIZE)
1996 rxq->rx_buf_size = PAGE_SIZE;
1997
1998 /* Segment size to spilt a page in multiple equal parts */
1999 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
Yuval Mintz29502192015-10-26 11:02:29 +02002000
2001 /* Allocate the parallel driver ring for Rx buffers */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002002 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
Yuval Mintz29502192015-10-26 11:02:29 +02002003 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2004 if (!rxq->sw_rx_ring) {
2005 DP_ERR(edev, "Rx buffers ring allocation failed\n");
2006 goto err;
2007 }
2008
2009 /* Allocate FW Rx ring */
2010 rc = edev->ops->common->chain_alloc(edev->cdev,
2011 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2012 QED_CHAIN_MODE_NEXT_PTR,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002013 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002014 sizeof(struct eth_rx_bd),
2015 &rxq->rx_bd_ring);
2016
2017 if (rc)
2018 goto err;
2019
2020 /* Allocate FW completion ring */
2021 rc = edev->ops->common->chain_alloc(edev->cdev,
2022 QED_CHAIN_USE_TO_CONSUME,
2023 QED_CHAIN_MODE_PBL,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002024 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002025 sizeof(union eth_rx_cqe),
2026 &rxq->rx_comp_ring);
2027 if (rc)
2028 goto err;
2029
2030 /* Allocate buffers for the Rx ring */
2031 for (i = 0; i < rxq->num_rx_buffers; i++) {
2032 rc = qede_alloc_rx_buffer(edev, rxq);
2033 if (rc)
2034 break;
2035 }
2036 num_allocated = i;
2037 if (!num_allocated) {
2038 DP_ERR(edev, "Rx buffers allocation failed\n");
2039 goto err;
2040 } else if (num_allocated < rxq->num_rx_buffers) {
2041 DP_NOTICE(edev,
2042 "Allocated less buffers than desired (%d allocated)\n",
2043 num_allocated);
2044 }
2045
2046 return 0;
2047
2048err:
2049 qede_free_mem_rxq(edev, rxq);
2050 return -ENOMEM;
2051}
2052
2053static void qede_free_mem_txq(struct qede_dev *edev,
2054 struct qede_tx_queue *txq)
2055{
2056 /* Free the parallel SW ring */
2057 kfree(txq->sw_tx_ring);
2058
2059 /* Free the real RQ ring used by FW */
2060 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2061}
2062
2063/* This function allocates all memory needed per Tx queue */
2064static int qede_alloc_mem_txq(struct qede_dev *edev,
2065 struct qede_tx_queue *txq)
2066{
2067 int size, rc;
2068 union eth_tx_bd_types *p_virt;
2069
2070 txq->num_tx_buffers = edev->q_num_tx_buffers;
2071
2072 /* Allocate the parallel driver ring for Tx buffers */
2073 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2074 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2075 if (!txq->sw_tx_ring) {
2076 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2077 goto err;
2078 }
2079
2080 rc = edev->ops->common->chain_alloc(edev->cdev,
2081 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2082 QED_CHAIN_MODE_PBL,
2083 NUM_TX_BDS_MAX,
2084 sizeof(*p_virt),
2085 &txq->tx_pbl);
2086 if (rc)
2087 goto err;
2088
2089 return 0;
2090
2091err:
2092 qede_free_mem_txq(edev, txq);
2093 return -ENOMEM;
2094}
2095
2096/* This function frees all memory of a single fp */
2097static void qede_free_mem_fp(struct qede_dev *edev,
2098 struct qede_fastpath *fp)
2099{
2100 int tc;
2101
2102 qede_free_mem_sb(edev, fp->sb_info);
2103
2104 qede_free_mem_rxq(edev, fp->rxq);
2105
2106 for (tc = 0; tc < edev->num_tc; tc++)
2107 qede_free_mem_txq(edev, &fp->txqs[tc]);
2108}
2109
2110/* This function allocates all memory needed for a single fp (i.e. an entity
2111 * which contains status block, one rx queue and multiple per-TC tx queues.
2112 */
2113static int qede_alloc_mem_fp(struct qede_dev *edev,
2114 struct qede_fastpath *fp)
2115{
2116 int rc, tc;
2117
2118 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2119 if (rc)
2120 goto err;
2121
2122 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2123 if (rc)
2124 goto err;
2125
2126 for (tc = 0; tc < edev->num_tc; tc++) {
2127 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2128 if (rc)
2129 goto err;
2130 }
2131
2132 return 0;
2133
2134err:
2135 qede_free_mem_fp(edev, fp);
2136 return -ENOMEM;
2137}
2138
2139static void qede_free_mem_load(struct qede_dev *edev)
2140{
2141 int i;
2142
2143 for_each_rss(i) {
2144 struct qede_fastpath *fp = &edev->fp_array[i];
2145
2146 qede_free_mem_fp(edev, fp);
2147 }
2148}
2149
2150/* This function allocates all qede memory at NIC load. */
2151static int qede_alloc_mem_load(struct qede_dev *edev)
2152{
2153 int rc = 0, rss_id;
2154
2155 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2156 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2157
2158 rc = qede_alloc_mem_fp(edev, fp);
2159 if (rc)
2160 break;
2161 }
2162
2163 if (rss_id != QEDE_RSS_CNT(edev)) {
2164 /* Failed allocating memory for all the queues */
2165 if (!rss_id) {
2166 DP_ERR(edev,
2167 "Failed to allocate memory for the leading queue\n");
2168 rc = -ENOMEM;
2169 } else {
2170 DP_NOTICE(edev,
2171 "Failed to allocate memory for all of RSS queues\n Desired: %d queues, allocated: %d queues\n",
2172 QEDE_RSS_CNT(edev), rss_id);
2173 }
2174 edev->num_rss = rss_id;
2175 }
2176
2177 return 0;
2178}
2179
2180/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2181static void qede_init_fp(struct qede_dev *edev)
2182{
2183 int rss_id, txq_index, tc;
2184 struct qede_fastpath *fp;
2185
2186 for_each_rss(rss_id) {
2187 fp = &edev->fp_array[rss_id];
2188
2189 fp->edev = edev;
2190 fp->rss_id = rss_id;
2191
2192 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2193
2194 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2195
2196 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2197 fp->rxq->rxq_id = rss_id;
2198
2199 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2200 for (tc = 0; tc < edev->num_tc; tc++) {
2201 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2202 fp->txqs[tc].index = txq_index;
2203 }
2204
2205 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2206 edev->ndev->name, rss_id);
2207 }
2208}
2209
2210static int qede_set_real_num_queues(struct qede_dev *edev)
2211{
2212 int rc = 0;
2213
2214 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
2215 if (rc) {
2216 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
2217 return rc;
2218 }
2219 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
2220 if (rc) {
2221 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
2222 return rc;
2223 }
2224
2225 return 0;
2226}
2227
2228static void qede_napi_disable_remove(struct qede_dev *edev)
2229{
2230 int i;
2231
2232 for_each_rss(i) {
2233 napi_disable(&edev->fp_array[i].napi);
2234
2235 netif_napi_del(&edev->fp_array[i].napi);
2236 }
2237}
2238
2239static void qede_napi_add_enable(struct qede_dev *edev)
2240{
2241 int i;
2242
2243 /* Add NAPI objects */
2244 for_each_rss(i) {
2245 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
2246 qede_poll, NAPI_POLL_WEIGHT);
2247 napi_enable(&edev->fp_array[i].napi);
2248 }
2249}
2250
2251static void qede_sync_free_irqs(struct qede_dev *edev)
2252{
2253 int i;
2254
2255 for (i = 0; i < edev->int_info.used_cnt; i++) {
2256 if (edev->int_info.msix_cnt) {
2257 synchronize_irq(edev->int_info.msix[i].vector);
2258 free_irq(edev->int_info.msix[i].vector,
2259 &edev->fp_array[i]);
2260 } else {
2261 edev->ops->common->simd_handler_clean(edev->cdev, i);
2262 }
2263 }
2264
2265 edev->int_info.used_cnt = 0;
2266}
2267
2268static int qede_req_msix_irqs(struct qede_dev *edev)
2269{
2270 int i, rc;
2271
2272 /* Sanitize number of interrupts == number of prepared RSS queues */
2273 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
2274 DP_ERR(edev,
2275 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
2276 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
2277 return -EINVAL;
2278 }
2279
2280 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
2281 rc = request_irq(edev->int_info.msix[i].vector,
2282 qede_msix_fp_int, 0, edev->fp_array[i].name,
2283 &edev->fp_array[i]);
2284 if (rc) {
2285 DP_ERR(edev, "Request fp %d irq failed\n", i);
2286 qede_sync_free_irqs(edev);
2287 return rc;
2288 }
2289 DP_VERBOSE(edev, NETIF_MSG_INTR,
2290 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2291 edev->fp_array[i].name, i,
2292 &edev->fp_array[i]);
2293 edev->int_info.used_cnt++;
2294 }
2295
2296 return 0;
2297}
2298
2299static void qede_simd_fp_handler(void *cookie)
2300{
2301 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2302
2303 napi_schedule_irqoff(&fp->napi);
2304}
2305
2306static int qede_setup_irqs(struct qede_dev *edev)
2307{
2308 int i, rc = 0;
2309
2310 /* Learn Interrupt configuration */
2311 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2312 if (rc)
2313 return rc;
2314
2315 if (edev->int_info.msix_cnt) {
2316 rc = qede_req_msix_irqs(edev);
2317 if (rc)
2318 return rc;
2319 edev->ndev->irq = edev->int_info.msix[0].vector;
2320 } else {
2321 const struct qed_common_ops *ops;
2322
2323 /* qed should learn receive the RSS ids and callbacks */
2324 ops = edev->ops->common;
2325 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
2326 ops->simd_handler_config(edev->cdev,
2327 &edev->fp_array[i], i,
2328 qede_simd_fp_handler);
2329 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
2330 }
2331 return 0;
2332}
2333
2334static int qede_drain_txq(struct qede_dev *edev,
2335 struct qede_tx_queue *txq,
2336 bool allow_drain)
2337{
2338 int rc, cnt = 1000;
2339
2340 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2341 if (!cnt) {
2342 if (allow_drain) {
2343 DP_NOTICE(edev,
2344 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2345 txq->index);
2346 rc = edev->ops->common->drain(edev->cdev);
2347 if (rc)
2348 return rc;
2349 return qede_drain_txq(edev, txq, false);
2350 }
2351 DP_NOTICE(edev,
2352 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2353 txq->index, txq->sw_tx_prod,
2354 txq->sw_tx_cons);
2355 return -ENODEV;
2356 }
2357 cnt--;
2358 usleep_range(1000, 2000);
2359 barrier();
2360 }
2361
2362 /* FW finished processing, wait for HW to transmit all tx packets */
2363 usleep_range(1000, 2000);
2364
2365 return 0;
2366}
2367
2368static int qede_stop_queues(struct qede_dev *edev)
2369{
2370 struct qed_update_vport_params vport_update_params;
2371 struct qed_dev *cdev = edev->cdev;
2372 int rc, tc, i;
2373
2374 /* Disable the vport */
2375 memset(&vport_update_params, 0, sizeof(vport_update_params));
2376 vport_update_params.vport_id = 0;
2377 vport_update_params.update_vport_active_flg = 1;
2378 vport_update_params.vport_active_flg = 0;
2379 vport_update_params.update_rss_flg = 0;
2380
2381 rc = edev->ops->vport_update(cdev, &vport_update_params);
2382 if (rc) {
2383 DP_ERR(edev, "Failed to update vport\n");
2384 return rc;
2385 }
2386
2387 /* Flush Tx queues. If needed, request drain from MCP */
2388 for_each_rss(i) {
2389 struct qede_fastpath *fp = &edev->fp_array[i];
2390
2391 for (tc = 0; tc < edev->num_tc; tc++) {
2392 struct qede_tx_queue *txq = &fp->txqs[tc];
2393
2394 rc = qede_drain_txq(edev, txq, true);
2395 if (rc)
2396 return rc;
2397 }
2398 }
2399
2400 /* Stop all Queues in reverse order*/
2401 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
2402 struct qed_stop_rxq_params rx_params;
2403
2404 /* Stop the Tx Queue(s)*/
2405 for (tc = 0; tc < edev->num_tc; tc++) {
2406 struct qed_stop_txq_params tx_params;
2407
2408 tx_params.rss_id = i;
2409 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
2410 rc = edev->ops->q_tx_stop(cdev, &tx_params);
2411 if (rc) {
2412 DP_ERR(edev, "Failed to stop TXQ #%d\n",
2413 tx_params.tx_queue_id);
2414 return rc;
2415 }
2416 }
2417
2418 /* Stop the Rx Queue*/
2419 memset(&rx_params, 0, sizeof(rx_params));
2420 rx_params.rss_id = i;
2421 rx_params.rx_queue_id = i;
2422
2423 rc = edev->ops->q_rx_stop(cdev, &rx_params);
2424 if (rc) {
2425 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2426 return rc;
2427 }
2428 }
2429
2430 /* Stop the vport */
2431 rc = edev->ops->vport_stop(cdev, 0);
2432 if (rc)
2433 DP_ERR(edev, "Failed to stop VPORT\n");
2434
2435 return rc;
2436}
2437
2438static int qede_start_queues(struct qede_dev *edev)
2439{
2440 int rc, tc, i;
2441 int vport_id = 0, drop_ttl0_flg = 1, vlan_removal_en = 1;
2442 struct qed_dev *cdev = edev->cdev;
2443 struct qed_update_vport_rss_params *rss_params = &edev->rss_params;
2444 struct qed_update_vport_params vport_update_params;
2445 struct qed_queue_start_common_params q_params;
2446
2447 if (!edev->num_rss) {
2448 DP_ERR(edev,
2449 "Cannot update V-VPORT as active as there are no Rx queues\n");
2450 return -EINVAL;
2451 }
2452
2453 rc = edev->ops->vport_start(cdev, vport_id,
2454 edev->ndev->mtu,
2455 drop_ttl0_flg,
2456 vlan_removal_en);
2457
2458 if (rc) {
2459 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2460 return rc;
2461 }
2462
2463 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2464 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2465 vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2466
2467 for_each_rss(i) {
2468 struct qede_fastpath *fp = &edev->fp_array[i];
2469 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
2470
2471 memset(&q_params, 0, sizeof(q_params));
2472 q_params.rss_id = i;
2473 q_params.queue_id = i;
2474 q_params.vport_id = 0;
2475 q_params.sb = fp->sb_info->igu_sb_id;
2476 q_params.sb_idx = RX_PI;
2477
2478 rc = edev->ops->q_rx_start(cdev, &q_params,
2479 fp->rxq->rx_buf_size,
2480 fp->rxq->rx_bd_ring.p_phys_addr,
2481 phys_table,
2482 fp->rxq->rx_comp_ring.page_cnt,
2483 &fp->rxq->hw_rxq_prod_addr);
2484 if (rc) {
2485 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
2486 return rc;
2487 }
2488
2489 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
2490
2491 qede_update_rx_prod(edev, fp->rxq);
2492
2493 for (tc = 0; tc < edev->num_tc; tc++) {
2494 struct qede_tx_queue *txq = &fp->txqs[tc];
2495 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
2496
2497 memset(&q_params, 0, sizeof(q_params));
2498 q_params.rss_id = i;
2499 q_params.queue_id = txq_index;
2500 q_params.vport_id = 0;
2501 q_params.sb = fp->sb_info->igu_sb_id;
2502 q_params.sb_idx = TX_PI(tc);
2503
2504 rc = edev->ops->q_tx_start(cdev, &q_params,
2505 txq->tx_pbl.pbl.p_phys_table,
2506 txq->tx_pbl.page_cnt,
2507 &txq->doorbell_addr);
2508 if (rc) {
2509 DP_ERR(edev, "Start TXQ #%d failed %d\n",
2510 txq_index, rc);
2511 return rc;
2512 }
2513
2514 txq->hw_cons_ptr =
2515 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
2516 SET_FIELD(txq->tx_db.data.params,
2517 ETH_DB_DATA_DEST, DB_DEST_XCM);
2518 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
2519 DB_AGG_CMD_SET);
2520 SET_FIELD(txq->tx_db.data.params,
2521 ETH_DB_DATA_AGG_VAL_SEL,
2522 DQ_XCM_ETH_TX_BD_PROD_CMD);
2523
2524 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2525 }
2526 }
2527
2528 /* Prepare and send the vport enable */
2529 memset(&vport_update_params, 0, sizeof(vport_update_params));
2530 vport_update_params.vport_id = vport_id;
2531 vport_update_params.update_vport_active_flg = 1;
2532 vport_update_params.vport_active_flg = 1;
2533
2534 /* Fill struct with RSS params */
2535 if (QEDE_RSS_CNT(edev) > 1) {
2536 vport_update_params.update_rss_flg = 1;
2537 for (i = 0; i < 128; i++)
2538 rss_params->rss_ind_table[i] =
2539 ethtool_rxfh_indir_default(i, QEDE_RSS_CNT(edev));
2540 netdev_rss_key_fill(rss_params->rss_key,
2541 sizeof(rss_params->rss_key));
2542 } else {
2543 memset(rss_params, 0, sizeof(*rss_params));
2544 }
2545 memcpy(&vport_update_params.rss_params, rss_params,
2546 sizeof(*rss_params));
2547
2548 rc = edev->ops->vport_update(cdev, &vport_update_params);
2549 if (rc) {
2550 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2551 return rc;
2552 }
2553
2554 return 0;
2555}
2556
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002557static int qede_set_mcast_rx_mac(struct qede_dev *edev,
2558 enum qed_filter_xcast_params_type opcode,
2559 unsigned char *mac, int num_macs)
2560{
2561 struct qed_filter_params filter_cmd;
2562 int i;
2563
2564 memset(&filter_cmd, 0, sizeof(filter_cmd));
2565 filter_cmd.type = QED_FILTER_TYPE_MCAST;
2566 filter_cmd.filter.mcast.type = opcode;
2567 filter_cmd.filter.mcast.num = num_macs;
2568
2569 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
2570 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
2571
2572 return edev->ops->filter_config(edev->cdev, &filter_cmd);
2573}
2574
Yuval Mintz29502192015-10-26 11:02:29 +02002575enum qede_unload_mode {
2576 QEDE_UNLOAD_NORMAL,
2577};
2578
2579static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
2580{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002581 struct qed_link_params link_params;
Yuval Mintz29502192015-10-26 11:02:29 +02002582 int rc;
2583
2584 DP_INFO(edev, "Starting qede unload\n");
2585
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002586 mutex_lock(&edev->qede_lock);
2587 edev->state = QEDE_STATE_CLOSED;
2588
Yuval Mintz29502192015-10-26 11:02:29 +02002589 /* Close OS Tx */
2590 netif_tx_disable(edev->ndev);
2591 netif_carrier_off(edev->ndev);
2592
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002593 /* Reset the link */
2594 memset(&link_params, 0, sizeof(link_params));
2595 link_params.link_up = false;
2596 edev->ops->common->set_link(edev->cdev, &link_params);
Yuval Mintz29502192015-10-26 11:02:29 +02002597 rc = qede_stop_queues(edev);
2598 if (rc) {
2599 qede_sync_free_irqs(edev);
2600 goto out;
2601 }
2602
2603 DP_INFO(edev, "Stopped Queues\n");
2604
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002605 qede_vlan_mark_nonconfigured(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02002606 edev->ops->fastpath_stop(edev->cdev);
2607
2608 /* Release the interrupts */
2609 qede_sync_free_irqs(edev);
2610 edev->ops->common->set_fp_int(edev->cdev, 0);
2611
2612 qede_napi_disable_remove(edev);
2613
2614 qede_free_mem_load(edev);
2615 qede_free_fp_array(edev);
2616
2617out:
2618 mutex_unlock(&edev->qede_lock);
2619 DP_INFO(edev, "Ending qede unload\n");
2620}
2621
2622enum qede_load_mode {
2623 QEDE_LOAD_NORMAL,
2624};
2625
2626static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
2627{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002628 struct qed_link_params link_params;
2629 struct qed_link_output link_output;
Yuval Mintz29502192015-10-26 11:02:29 +02002630 int rc;
2631
2632 DP_INFO(edev, "Starting qede load\n");
2633
2634 rc = qede_set_num_queues(edev);
2635 if (rc)
2636 goto err0;
2637
2638 rc = qede_alloc_fp_array(edev);
2639 if (rc)
2640 goto err0;
2641
2642 qede_init_fp(edev);
2643
2644 rc = qede_alloc_mem_load(edev);
2645 if (rc)
2646 goto err1;
2647 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
2648 QEDE_RSS_CNT(edev), edev->num_tc);
2649
2650 rc = qede_set_real_num_queues(edev);
2651 if (rc)
2652 goto err2;
2653
2654 qede_napi_add_enable(edev);
2655 DP_INFO(edev, "Napi added and enabled\n");
2656
2657 rc = qede_setup_irqs(edev);
2658 if (rc)
2659 goto err3;
2660 DP_INFO(edev, "Setup IRQs succeeded\n");
2661
2662 rc = qede_start_queues(edev);
2663 if (rc)
2664 goto err4;
2665 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2666
2667 /* Add primary mac and set Rx filters */
2668 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
2669
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002670 mutex_lock(&edev->qede_lock);
2671 edev->state = QEDE_STATE_OPEN;
2672 mutex_unlock(&edev->qede_lock);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002673
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002674 /* Program un-configured VLANs */
2675 qede_configure_vlan_filters(edev);
2676
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002677 /* Ask for link-up using current configuration */
2678 memset(&link_params, 0, sizeof(link_params));
2679 link_params.link_up = true;
2680 edev->ops->common->set_link(edev->cdev, &link_params);
2681
2682 /* Query whether link is already-up */
2683 memset(&link_output, 0, sizeof(link_output));
2684 edev->ops->common->get_link(edev->cdev, &link_output);
2685 qede_link_update(edev, &link_output);
2686
Yuval Mintz29502192015-10-26 11:02:29 +02002687 DP_INFO(edev, "Ending successfully qede load\n");
2688
2689 return 0;
2690
2691err4:
2692 qede_sync_free_irqs(edev);
2693 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
2694err3:
2695 qede_napi_disable_remove(edev);
2696err2:
2697 qede_free_mem_load(edev);
2698err1:
2699 edev->ops->common->set_fp_int(edev->cdev, 0);
2700 qede_free_fp_array(edev);
2701 edev->num_rss = 0;
2702err0:
2703 return rc;
2704}
2705
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002706void qede_reload(struct qede_dev *edev,
2707 void (*func)(struct qede_dev *, union qede_reload_args *),
2708 union qede_reload_args *args)
2709{
2710 qede_unload(edev, QEDE_UNLOAD_NORMAL);
2711 /* Call function handler to update parameters
2712 * needed for function load.
2713 */
2714 if (func)
2715 func(edev, args);
2716
2717 qede_load(edev, QEDE_LOAD_NORMAL);
2718
2719 mutex_lock(&edev->qede_lock);
2720 qede_config_rx_mode(edev->ndev);
2721 mutex_unlock(&edev->qede_lock);
2722}
2723
Yuval Mintz29502192015-10-26 11:02:29 +02002724/* called with rtnl_lock */
2725static int qede_open(struct net_device *ndev)
2726{
2727 struct qede_dev *edev = netdev_priv(ndev);
2728
2729 netif_carrier_off(ndev);
2730
2731 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2732
2733 return qede_load(edev, QEDE_LOAD_NORMAL);
2734}
2735
2736static int qede_close(struct net_device *ndev)
2737{
2738 struct qede_dev *edev = netdev_priv(ndev);
2739
2740 qede_unload(edev, QEDE_UNLOAD_NORMAL);
2741
2742 return 0;
2743}
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002744
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002745static void qede_link_update(void *dev, struct qed_link_output *link)
2746{
2747 struct qede_dev *edev = dev;
2748
2749 if (!netif_running(edev->ndev)) {
2750 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
2751 return;
2752 }
2753
2754 if (link->link_up) {
2755 DP_NOTICE(edev, "Link is up\n");
2756 netif_tx_start_all_queues(edev->ndev);
2757 netif_carrier_on(edev->ndev);
2758 } else {
2759 DP_NOTICE(edev, "Link is down\n");
2760 netif_tx_disable(edev->ndev);
2761 netif_carrier_off(edev->ndev);
2762 }
2763}
2764
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002765static int qede_set_mac_addr(struct net_device *ndev, void *p)
2766{
2767 struct qede_dev *edev = netdev_priv(ndev);
2768 struct sockaddr *addr = p;
2769 int rc;
2770
2771 ASSERT_RTNL(); /* @@@TBD To be removed */
2772
2773 DP_INFO(edev, "Set_mac_addr called\n");
2774
2775 if (!is_valid_ether_addr(addr->sa_data)) {
2776 DP_NOTICE(edev, "The MAC address is not valid\n");
2777 return -EFAULT;
2778 }
2779
2780 ether_addr_copy(ndev->dev_addr, addr->sa_data);
2781
2782 if (!netif_running(ndev)) {
2783 DP_NOTICE(edev, "The device is currently down\n");
2784 return 0;
2785 }
2786
2787 /* Remove the previous primary mac */
2788 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
2789 edev->primary_mac);
2790 if (rc)
2791 return rc;
2792
2793 /* Add MAC filter according to the new unicast HW MAC address */
2794 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
2795 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
2796 edev->primary_mac);
2797}
2798
2799static int
2800qede_configure_mcast_filtering(struct net_device *ndev,
2801 enum qed_filter_rx_mode_type *accept_flags)
2802{
2803 struct qede_dev *edev = netdev_priv(ndev);
2804 unsigned char *mc_macs, *temp;
2805 struct netdev_hw_addr *ha;
2806 int rc = 0, mc_count;
2807 size_t size;
2808
2809 size = 64 * ETH_ALEN;
2810
2811 mc_macs = kzalloc(size, GFP_KERNEL);
2812 if (!mc_macs) {
2813 DP_NOTICE(edev,
2814 "Failed to allocate memory for multicast MACs\n");
2815 rc = -ENOMEM;
2816 goto exit;
2817 }
2818
2819 temp = mc_macs;
2820
2821 /* Remove all previously configured MAC filters */
2822 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
2823 mc_macs, 1);
2824 if (rc)
2825 goto exit;
2826
2827 netif_addr_lock_bh(ndev);
2828
2829 mc_count = netdev_mc_count(ndev);
2830 if (mc_count < 64) {
2831 netdev_for_each_mc_addr(ha, ndev) {
2832 ether_addr_copy(temp, ha->addr);
2833 temp += ETH_ALEN;
2834 }
2835 }
2836
2837 netif_addr_unlock_bh(ndev);
2838
2839 /* Check for all multicast @@@TBD resource allocation */
2840 if ((ndev->flags & IFF_ALLMULTI) ||
2841 (mc_count > 64)) {
2842 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
2843 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
2844 } else {
2845 /* Add all multicast MAC filters */
2846 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
2847 mc_macs, mc_count);
2848 }
2849
2850exit:
2851 kfree(mc_macs);
2852 return rc;
2853}
2854
2855static void qede_set_rx_mode(struct net_device *ndev)
2856{
2857 struct qede_dev *edev = netdev_priv(ndev);
2858
2859 DP_INFO(edev, "qede_set_rx_mode called\n");
2860
2861 if (edev->state != QEDE_STATE_OPEN) {
2862 DP_INFO(edev,
2863 "qede_set_rx_mode called while interface is down\n");
2864 } else {
2865 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
2866 schedule_delayed_work(&edev->sp_task, 0);
2867 }
2868}
2869
2870/* Must be called with qede_lock held */
2871static void qede_config_rx_mode(struct net_device *ndev)
2872{
2873 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
2874 struct qede_dev *edev = netdev_priv(ndev);
2875 struct qed_filter_params rx_mode;
2876 unsigned char *uc_macs, *temp;
2877 struct netdev_hw_addr *ha;
2878 int rc, uc_count;
2879 size_t size;
2880
2881 netif_addr_lock_bh(ndev);
2882
2883 uc_count = netdev_uc_count(ndev);
2884 size = uc_count * ETH_ALEN;
2885
2886 uc_macs = kzalloc(size, GFP_ATOMIC);
2887 if (!uc_macs) {
2888 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
2889 netif_addr_unlock_bh(ndev);
2890 return;
2891 }
2892
2893 temp = uc_macs;
2894 netdev_for_each_uc_addr(ha, ndev) {
2895 ether_addr_copy(temp, ha->addr);
2896 temp += ETH_ALEN;
2897 }
2898
2899 netif_addr_unlock_bh(ndev);
2900
2901 /* Configure the struct for the Rx mode */
2902 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
2903 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
2904
2905 /* Remove all previous unicast secondary macs and multicast macs
2906 * (configrue / leave the primary mac)
2907 */
2908 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
2909 edev->primary_mac);
2910 if (rc)
2911 goto out;
2912
2913 /* Check for promiscuous */
2914 if ((ndev->flags & IFF_PROMISC) ||
2915 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
2916 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
2917 } else {
2918 /* Add MAC filters according to the unicast secondary macs */
2919 int i;
2920
2921 temp = uc_macs;
2922 for (i = 0; i < uc_count; i++) {
2923 rc = qede_set_ucast_rx_mac(edev,
2924 QED_FILTER_XCAST_TYPE_ADD,
2925 temp);
2926 if (rc)
2927 goto out;
2928
2929 temp += ETH_ALEN;
2930 }
2931
2932 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
2933 if (rc)
2934 goto out;
2935 }
2936
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002937 /* take care of VLAN mode */
2938 if (ndev->flags & IFF_PROMISC) {
2939 qede_config_accept_any_vlan(edev, true);
2940 } else if (!edev->non_configured_vlans) {
2941 /* It's possible that accept_any_vlan mode is set due to a
2942 * previous setting of IFF_PROMISC. If vlan credits are
2943 * sufficient, disable accept_any_vlan.
2944 */
2945 qede_config_accept_any_vlan(edev, false);
2946 }
2947
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002948 rx_mode.filter.accept_flags = accept_flags;
2949 edev->ops->filter_config(edev->cdev, &rx_mode);
2950out:
2951 kfree(uc_macs);
2952}