| Alexander Shishkin | 39f4034 | 2015-09-22 15:47:14 +0300 | [diff] [blame] | 1 | config INTEL_TH |
| 2 | tristate "Intel(R) Trace Hub controller" |
| Alexander Shishkin | 993c7f1 | 2016-02-15 19:11:53 +0200 | [diff] [blame] | 3 | depends on HAS_DMA && HAS_IOMEM |
| Alexander Shishkin | 39f4034 | 2015-09-22 15:47:14 +0300 | [diff] [blame] | 4 | help |
| 5 | Intel(R) Trace Hub (TH) is a set of hardware blocks (subdevices) that |
| 6 | produce, switch and output trace data from multiple hardware and |
| 7 | software sources over several types of trace output ports encoded |
| 8 | in System Trace Protocol (MIPI STPv2) and is intended to perform |
| 9 | full system debugging. |
| 10 | |
| 11 | This option enables intel_th bus and common code used by TH |
| 12 | subdevices to interact with each other and hardware and for |
| 13 | platform glue layers to drive Intel TH devices. |
| 14 | |
| 15 | Say Y here to enable Intel(R) Trace Hub controller support. |
| 16 | |
| 17 | if INTEL_TH |
| 18 | |
| Alexander Shishkin | 2b0b16d | 2015-09-22 15:47:15 +0300 | [diff] [blame] | 19 | config INTEL_TH_PCI |
| 20 | tristate "Intel(R) Trace Hub PCI controller" |
| 21 | depends on PCI |
| 22 | help |
| 23 | Intel(R) Trace Hub may exist as a PCI device. This option enables |
| 24 | support glue layer for PCI-based Intel TH. |
| 25 | |
| 26 | Say Y here to enable PCI Intel TH support. |
| 27 | |
| Alexander Shishkin | b27a6a3 | 2015-09-22 15:47:16 +0300 | [diff] [blame] | 28 | config INTEL_TH_GTH |
| 29 | tristate "Intel(R) Trace Hub Global Trace Hub" |
| 30 | help |
| 31 | Global Trace Hub (GTH) is the central component of the |
| 32 | Intel TH infrastructure and acts as a switch for source |
| 33 | and output devices. This driver is required for other |
| 34 | Intel TH subdevices to initialize. |
| 35 | |
| 36 | Say Y here to enable GTH subdevice of Intel(R) Trace Hub. |
| 37 | |
| Alexander Shishkin | f04e449 | 2015-09-22 15:47:17 +0300 | [diff] [blame] | 38 | config INTEL_TH_STH |
| 39 | tristate "Intel(R) Trace Hub Software Trace Hub support" |
| 40 | depends on STM |
| 41 | help |
| 42 | Software Trace Hub (STH) enables trace data from software |
| 43 | trace sources to be sent out via Intel(R) Trace Hub. It |
| 44 | uses stm class device to interface with its sources. |
| 45 | |
| 46 | Say Y here to enable STH subdevice of Intel(R) Trace Hub. |
| 47 | |
| Alexander Shishkin | ba82664 | 2015-09-22 15:47:18 +0300 | [diff] [blame] | 48 | config INTEL_TH_MSU |
| 49 | tristate "Intel(R) Trace Hub Memory Storage Unit" |
| 50 | help |
| 51 | Memory Storage Unit (MSU) trace output device enables |
| 52 | storing STP traces to system memory. It supports single |
| 53 | and multiblock modes of operation and provides read() |
| 54 | and mmap() access to the collected data. |
| 55 | |
| 56 | Say Y here to enable MSU output device for Intel TH. |
| 57 | |
| Alexander Shishkin | 14cdbf0 | 2015-09-22 15:47:19 +0300 | [diff] [blame] | 58 | config INTEL_TH_PTI |
| 59 | tristate "Intel(R) Trace Hub PTI output" |
| 60 | help |
| 61 | Parallel Trace Interface unit (PTI) is a trace output device |
| 62 | of Intel TH architecture that facilitates STP trace output via |
| 63 | a PTI port. |
| 64 | |
| 65 | Say Y to enable PTI output of Intel TH data. |
| 66 | |
| Alexander Shishkin | 39f4034 | 2015-09-22 15:47:14 +0300 | [diff] [blame] | 67 | config INTEL_TH_DEBUG |
| 68 | bool "Intel(R) Trace Hub debugging" |
| 69 | depends on DEBUG_FS |
| 70 | help |
| 71 | Say Y here to enable debugging. |
| 72 | |
| 73 | endif |