Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef _SPARC64_TTABLE_H |
| 2 | #define _SPARC64_TTABLE_H |
| 3 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | #include <asm/utrap.h> |
| 5 | |
| 6 | #ifdef __ASSEMBLY__ |
| 7 | #include <asm/thread_info.h> |
| 8 | #endif |
| 9 | |
| 10 | #define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop; |
| 11 | |
| 12 | /* We need a "cleaned" instruction... */ |
| 13 | #define CLEAN_WINDOW \ |
| 14 | rdpr %cleanwin, %l0; add %l0, 1, %l0; \ |
| 15 | wrpr %l0, 0x0, %cleanwin; \ |
| 16 | clr %o0; clr %o1; clr %o2; clr %o3; \ |
| 17 | clr %o4; clr %o5; clr %o6; clr %o7; \ |
| 18 | clr %l0; clr %l1; clr %l2; clr %l3; \ |
| 19 | clr %l4; clr %l5; clr %l6; clr %l7; \ |
| 20 | retry; \ |
| 21 | nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop; |
| 22 | |
| 23 | #define TRAP(routine) \ |
| 24 | sethi %hi(109f), %g7; \ |
| 25 | ba,pt %xcc, etrap; \ |
| 26 | 109: or %g7, %lo(109b), %g7; \ |
| 27 | call routine; \ |
| 28 | add %sp, PTREGS_OFF, %o0; \ |
| 29 | ba,pt %xcc, rtrap; \ |
David S. Miller | 7697daa | 2008-04-24 03:15:22 -0700 | [diff] [blame] | 30 | nop; \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | nop; |
| 32 | |
| 33 | #define TRAP_7INSNS(routine) \ |
| 34 | sethi %hi(109f), %g7; \ |
| 35 | ba,pt %xcc, etrap; \ |
| 36 | 109: or %g7, %lo(109b), %g7; \ |
| 37 | call routine; \ |
| 38 | add %sp, PTREGS_OFF, %o0; \ |
| 39 | ba,pt %xcc, rtrap; \ |
David S. Miller | 7697daa | 2008-04-24 03:15:22 -0700 | [diff] [blame] | 40 | nop; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | |
| 42 | #define TRAP_SAVEFPU(routine) \ |
| 43 | sethi %hi(109f), %g7; \ |
| 44 | ba,pt %xcc, do_fptrap; \ |
| 45 | 109: or %g7, %lo(109b), %g7; \ |
| 46 | call routine; \ |
| 47 | add %sp, PTREGS_OFF, %o0; \ |
| 48 | ba,pt %xcc, rtrap; \ |
David S. Miller | 7697daa | 2008-04-24 03:15:22 -0700 | [diff] [blame] | 49 | nop; \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | nop; |
| 51 | |
| 52 | #define TRAP_NOSAVE(routine) \ |
| 53 | ba,pt %xcc, routine; \ |
| 54 | nop; \ |
| 55 | nop; nop; nop; nop; nop; nop; |
| 56 | |
| 57 | #define TRAP_NOSAVE_7INSNS(routine) \ |
| 58 | ba,pt %xcc, routine; \ |
| 59 | nop; \ |
| 60 | nop; nop; nop; nop; nop; |
| 61 | |
| 62 | #define TRAPTL1(routine) \ |
| 63 | sethi %hi(109f), %g7; \ |
| 64 | ba,pt %xcc, etraptl1; \ |
| 65 | 109: or %g7, %lo(109b), %g7; \ |
| 66 | call routine; \ |
| 67 | add %sp, PTREGS_OFF, %o0; \ |
| 68 | ba,pt %xcc, rtrap; \ |
David S. Miller | 7697daa | 2008-04-24 03:15:22 -0700 | [diff] [blame] | 69 | nop; \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | nop; |
| 71 | |
| 72 | #define TRAP_ARG(routine, arg) \ |
| 73 | sethi %hi(109f), %g7; \ |
| 74 | ba,pt %xcc, etrap; \ |
| 75 | 109: or %g7, %lo(109b), %g7; \ |
| 76 | add %sp, PTREGS_OFF, %o0; \ |
| 77 | call routine; \ |
| 78 | mov arg, %o1; \ |
| 79 | ba,pt %xcc, rtrap; \ |
David S. Miller | 7697daa | 2008-04-24 03:15:22 -0700 | [diff] [blame] | 80 | nop; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | |
| 82 | #define TRAPTL1_ARG(routine, arg) \ |
| 83 | sethi %hi(109f), %g7; \ |
| 84 | ba,pt %xcc, etraptl1; \ |
| 85 | 109: or %g7, %lo(109b), %g7; \ |
| 86 | add %sp, PTREGS_OFF, %o0; \ |
| 87 | call routine; \ |
| 88 | mov arg, %o1; \ |
| 89 | ba,pt %xcc, rtrap; \ |
David S. Miller | 7697daa | 2008-04-24 03:15:22 -0700 | [diff] [blame] | 90 | nop; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | |
| 92 | #define SYSCALL_TRAP(routine, systbl) \ |
David S. Miller | 28e6103 | 2008-05-11 02:07:19 -0700 | [diff] [blame] | 93 | rdpr %pil, %g2; \ |
| 94 | mov TSTATE_SYSCALL, %g3; \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 | sethi %hi(109f), %g7; \ |
David S. Miller | 28e6103 | 2008-05-11 02:07:19 -0700 | [diff] [blame] | 96 | ba,pt %xcc, etrap_syscall; \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | 109: or %g7, %lo(109b), %g7; \ |
| 98 | sethi %hi(systbl), %l7; \ |
| 99 | ba,pt %xcc, routine; \ |
David S. Miller | 28e6103 | 2008-05-11 02:07:19 -0700 | [diff] [blame] | 100 | or %l7, %lo(systbl), %l7; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | #define TRAP_UTRAP(handler,lvl) \ |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 103 | mov handler, %g3; \ |
| 104 | ba,pt %xcc, utrap_trap; \ |
| 105 | mov lvl, %g4; \ |
| 106 | nop; \ |
| 107 | nop; \ |
| 108 | nop; \ |
| 109 | nop; \ |
| 110 | nop; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 111 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | #ifdef CONFIG_COMPAT |
| 113 | #define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32) |
| 114 | #else |
| 115 | #define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110) |
| 116 | #endif |
| 117 | #define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64) |
| 118 | #define GETCC_TRAP TRAP(getcc) |
| 119 | #define SETCC_TRAP TRAP(setcc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | #define BREAKPOINT_TRAP TRAP(breakpoint_trap) |
| 121 | |
David S. Miller | 10e2672 | 2006-11-16 13:38:57 -0800 | [diff] [blame] | 122 | #ifdef CONFIG_TRACE_IRQFLAGS |
| 123 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | #define TRAP_IRQ(routine, level) \ |
| 125 | rdpr %pil, %g2; \ |
| 126 | wrpr %g0, 15, %pil; \ |
David S. Miller | 10e2672 | 2006-11-16 13:38:57 -0800 | [diff] [blame] | 127 | sethi %hi(1f-4), %g7; \ |
| 128 | ba,pt %xcc, etrap_irq; \ |
| 129 | or %g7, %lo(1f-4), %g7; \ |
| 130 | nop; \ |
| 131 | nop; \ |
| 132 | nop; \ |
| 133 | .subsection 2; \ |
| 134 | 1: call trace_hardirqs_off; \ |
| 135 | nop; \ |
| 136 | mov level, %o0; \ |
| 137 | call routine; \ |
| 138 | add %sp, PTREGS_OFF, %o1; \ |
| 139 | ba,a,pt %xcc, rtrap_irq; \ |
| 140 | .previous; |
| 141 | |
David S. Miller | 10e2672 | 2006-11-16 13:38:57 -0800 | [diff] [blame] | 142 | #else |
| 143 | |
| 144 | #define TRAP_IRQ(routine, level) \ |
| 145 | rdpr %pil, %g2; \ |
| 146 | wrpr %g0, 15, %pil; \ |
| 147 | ba,pt %xcc, etrap_irq; \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | rd %pc, %g7; \ |
| 149 | mov level, %o0; \ |
| 150 | call routine; \ |
| 151 | add %sp, PTREGS_OFF, %o1; \ |
| 152 | ba,a,pt %xcc, rtrap_irq; |
| 153 | |
David S. Miller | 10e2672 | 2006-11-16 13:38:57 -0800 | [diff] [blame] | 154 | #endif |
| 155 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | #define TRAP_IVEC TRAP_NOSAVE(do_ivec) |
| 157 | |
| 158 | #define BTRAP(lvl) TRAP_ARG(bad_trap, lvl) |
| 159 | |
| 160 | #define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl) |
| 161 | |
| 162 | #define FLUSH_WINDOW_TRAP \ |
| 163 | ba,pt %xcc, etrap; \ |
| 164 | rd %pc, %g7; \ |
| 165 | flushw; \ |
| 166 | ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \ |
| 167 | add %l1, 4, %l2; \ |
| 168 | stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \ |
David S. Miller | 7697daa | 2008-04-24 03:15:22 -0700 | [diff] [blame] | 169 | ba,pt %xcc, rtrap; \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]; |
| 171 | |
| 172 | #ifdef CONFIG_KPROBES |
| 173 | #define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl) |
| 174 | #else |
| 175 | #define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl) |
| 176 | #endif |
| 177 | |
David S. Miller | e2fdd7f | 2008-04-29 02:38:50 -0700 | [diff] [blame] | 178 | #ifdef CONFIG_KGDB |
| 179 | #define KGDB_TRAP(lvl) TRAP_IRQ(kgdb_trap, lvl) |
| 180 | #else |
| 181 | #define KGDB_TRAP(lvl) TRAP_ARG(bad_trap, lvl) |
| 182 | #endif |
| 183 | |
David S. Miller | 12eaa32 | 2006-02-10 15:39:51 -0800 | [diff] [blame] | 184 | #define SUN4V_ITSB_MISS \ |
| 185 | ldxa [%g0] ASI_SCRATCHPAD, %g2; \ |
| 186 | ldx [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4; \ |
| 187 | ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5; \ |
David S. Miller | 8b23427 | 2006-02-17 18:01:02 -0800 | [diff] [blame] | 188 | srlx %g4, 22, %g6; \ |
David S. Miller | 459b6e6 | 2006-02-11 12:21:20 -0800 | [diff] [blame] | 189 | ba,pt %xcc, sun4v_itsb_miss; \ |
David S. Miller | 8b23427 | 2006-02-17 18:01:02 -0800 | [diff] [blame] | 190 | nop; \ |
| 191 | nop; \ |
David S. Miller | 459b6e6 | 2006-02-11 12:21:20 -0800 | [diff] [blame] | 192 | nop; |
David S. Miller | aa9143b | 2006-02-09 16:12:22 -0800 | [diff] [blame] | 193 | |
David S. Miller | 459b6e6 | 2006-02-11 12:21:20 -0800 | [diff] [blame] | 194 | #define SUN4V_DTSB_MISS \ |
David S. Miller | 12eaa32 | 2006-02-10 15:39:51 -0800 | [diff] [blame] | 195 | ldxa [%g0] ASI_SCRATCHPAD, %g2; \ |
| 196 | ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \ |
| 197 | ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \ |
David S. Miller | 8b23427 | 2006-02-17 18:01:02 -0800 | [diff] [blame] | 198 | srlx %g4, 22, %g6; \ |
David S. Miller | 459b6e6 | 2006-02-11 12:21:20 -0800 | [diff] [blame] | 199 | ba,pt %xcc, sun4v_dtsb_miss; \ |
David S. Miller | 8b23427 | 2006-02-17 18:01:02 -0800 | [diff] [blame] | 200 | nop; \ |
| 201 | nop; \ |
David S. Miller | 459b6e6 | 2006-02-11 12:21:20 -0800 | [diff] [blame] | 202 | nop; |
David S. Miller | aa9143b | 2006-02-09 16:12:22 -0800 | [diff] [blame] | 203 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | /* Before touching these macros, you owe it to yourself to go and |
| 205 | * see how arch/sparc64/kernel/winfixup.S works... -DaveM |
| 206 | * |
| 207 | * For the user cases we used to use the %asi register, but |
| 208 | * it turns out that the "wr xxx, %asi" costs ~5 cycles, so |
| 209 | * now we use immediate ASI loads and stores instead. Kudos |
| 210 | * to Greg Onufer for pointing out this performance anomaly. |
| 211 | * |
| 212 | * Further note that we cannot use the g2, g4, g5, and g7 alternate |
| 213 | * globals in the spill routines, check out the save instruction in |
| 214 | * arch/sparc64/kernel/etrap.S to see what I mean about g2, and |
| 215 | * g4/g5 are the globals which are preserved by etrap processing |
| 216 | * for the caller of it. The g7 register is the return pc for |
| 217 | * etrap. Finally, g6 is the current thread register so we cannot |
| 218 | * us it in the spill handlers either. Most of these rules do not |
| 219 | * apply to fill processing, only g6 is not usable. |
| 220 | */ |
| 221 | |
| 222 | /* Normal kernel spill */ |
| 223 | #define SPILL_0_NORMAL \ |
| 224 | stx %l0, [%sp + STACK_BIAS + 0x00]; \ |
| 225 | stx %l1, [%sp + STACK_BIAS + 0x08]; \ |
| 226 | stx %l2, [%sp + STACK_BIAS + 0x10]; \ |
| 227 | stx %l3, [%sp + STACK_BIAS + 0x18]; \ |
| 228 | stx %l4, [%sp + STACK_BIAS + 0x20]; \ |
| 229 | stx %l5, [%sp + STACK_BIAS + 0x28]; \ |
| 230 | stx %l6, [%sp + STACK_BIAS + 0x30]; \ |
| 231 | stx %l7, [%sp + STACK_BIAS + 0x38]; \ |
| 232 | stx %i0, [%sp + STACK_BIAS + 0x40]; \ |
| 233 | stx %i1, [%sp + STACK_BIAS + 0x48]; \ |
| 234 | stx %i2, [%sp + STACK_BIAS + 0x50]; \ |
| 235 | stx %i3, [%sp + STACK_BIAS + 0x58]; \ |
| 236 | stx %i4, [%sp + STACK_BIAS + 0x60]; \ |
| 237 | stx %i5, [%sp + STACK_BIAS + 0x68]; \ |
| 238 | stx %i6, [%sp + STACK_BIAS + 0x70]; \ |
| 239 | stx %i7, [%sp + STACK_BIAS + 0x78]; \ |
| 240 | saved; retry; nop; nop; nop; nop; nop; nop; \ |
| 241 | nop; nop; nop; nop; nop; nop; nop; nop; |
| 242 | |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 243 | #define SPILL_0_NORMAL_ETRAP \ |
| 244 | etrap_kernel_spill: \ |
| 245 | stx %l0, [%sp + STACK_BIAS + 0x00]; \ |
| 246 | stx %l1, [%sp + STACK_BIAS + 0x08]; \ |
| 247 | stx %l2, [%sp + STACK_BIAS + 0x10]; \ |
| 248 | stx %l3, [%sp + STACK_BIAS + 0x18]; \ |
| 249 | stx %l4, [%sp + STACK_BIAS + 0x20]; \ |
| 250 | stx %l5, [%sp + STACK_BIAS + 0x28]; \ |
| 251 | stx %l6, [%sp + STACK_BIAS + 0x30]; \ |
| 252 | stx %l7, [%sp + STACK_BIAS + 0x38]; \ |
| 253 | stx %i0, [%sp + STACK_BIAS + 0x40]; \ |
| 254 | stx %i1, [%sp + STACK_BIAS + 0x48]; \ |
| 255 | stx %i2, [%sp + STACK_BIAS + 0x50]; \ |
| 256 | stx %i3, [%sp + STACK_BIAS + 0x58]; \ |
| 257 | stx %i4, [%sp + STACK_BIAS + 0x60]; \ |
| 258 | stx %i5, [%sp + STACK_BIAS + 0x68]; \ |
| 259 | stx %i6, [%sp + STACK_BIAS + 0x70]; \ |
| 260 | stx %i7, [%sp + STACK_BIAS + 0x78]; \ |
| 261 | saved; \ |
| 262 | sub %g1, 2, %g1; \ |
| 263 | ba,pt %xcc, etrap_save; \ |
| 264 | wrpr %g1, %cwp; \ |
| 265 | nop; nop; nop; nop; nop; nop; nop; nop; \ |
| 266 | nop; nop; nop; nop; |
| 267 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | /* Normal 64bit spill */ |
| 269 | #define SPILL_1_GENERIC(ASI) \ |
| 270 | add %sp, STACK_BIAS + 0x00, %g1; \ |
| 271 | stxa %l0, [%g1 + %g0] ASI; \ |
| 272 | mov 0x08, %g3; \ |
| 273 | stxa %l1, [%g1 + %g3] ASI; \ |
| 274 | add %g1, 0x10, %g1; \ |
| 275 | stxa %l2, [%g1 + %g0] ASI; \ |
| 276 | stxa %l3, [%g1 + %g3] ASI; \ |
| 277 | add %g1, 0x10, %g1; \ |
| 278 | stxa %l4, [%g1 + %g0] ASI; \ |
| 279 | stxa %l5, [%g1 + %g3] ASI; \ |
| 280 | add %g1, 0x10, %g1; \ |
| 281 | stxa %l6, [%g1 + %g0] ASI; \ |
| 282 | stxa %l7, [%g1 + %g3] ASI; \ |
| 283 | add %g1, 0x10, %g1; \ |
| 284 | stxa %i0, [%g1 + %g0] ASI; \ |
| 285 | stxa %i1, [%g1 + %g3] ASI; \ |
| 286 | add %g1, 0x10, %g1; \ |
| 287 | stxa %i2, [%g1 + %g0] ASI; \ |
| 288 | stxa %i3, [%g1 + %g3] ASI; \ |
| 289 | add %g1, 0x10, %g1; \ |
| 290 | stxa %i4, [%g1 + %g0] ASI; \ |
| 291 | stxa %i5, [%g1 + %g3] ASI; \ |
| 292 | add %g1, 0x10, %g1; \ |
| 293 | stxa %i6, [%g1 + %g0] ASI; \ |
| 294 | stxa %i7, [%g1 + %g3] ASI; \ |
| 295 | saved; \ |
| 296 | retry; nop; nop; \ |
| 297 | b,a,pt %xcc, spill_fixup_dax; \ |
| 298 | b,a,pt %xcc, spill_fixup_mna; \ |
| 299 | b,a,pt %xcc, spill_fixup; |
| 300 | |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 301 | #define SPILL_1_GENERIC_ETRAP \ |
| 302 | etrap_user_spill_64bit: \ |
| 303 | stxa %l0, [%sp + STACK_BIAS + 0x00] %asi; \ |
| 304 | stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \ |
| 305 | stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \ |
| 306 | stxa %l3, [%sp + STACK_BIAS + 0x18] %asi; \ |
| 307 | stxa %l4, [%sp + STACK_BIAS + 0x20] %asi; \ |
| 308 | stxa %l5, [%sp + STACK_BIAS + 0x28] %asi; \ |
| 309 | stxa %l6, [%sp + STACK_BIAS + 0x30] %asi; \ |
| 310 | stxa %l7, [%sp + STACK_BIAS + 0x38] %asi; \ |
| 311 | stxa %i0, [%sp + STACK_BIAS + 0x40] %asi; \ |
| 312 | stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \ |
| 313 | stxa %i2, [%sp + STACK_BIAS + 0x50] %asi; \ |
| 314 | stxa %i3, [%sp + STACK_BIAS + 0x58] %asi; \ |
| 315 | stxa %i4, [%sp + STACK_BIAS + 0x60] %asi; \ |
| 316 | stxa %i5, [%sp + STACK_BIAS + 0x68] %asi; \ |
| 317 | stxa %i6, [%sp + STACK_BIAS + 0x70] %asi; \ |
| 318 | stxa %i7, [%sp + STACK_BIAS + 0x78] %asi; \ |
| 319 | saved; \ |
| 320 | sub %g1, 2, %g1; \ |
| 321 | ba,pt %xcc, etrap_save; \ |
| 322 | wrpr %g1, %cwp; \ |
| 323 | nop; nop; nop; nop; nop; \ |
| 324 | nop; nop; nop; nop; \ |
| 325 | ba,a,pt %xcc, etrap_spill_fixup_64bit; \ |
| 326 | ba,a,pt %xcc, etrap_spill_fixup_64bit; \ |
| 327 | ba,a,pt %xcc, etrap_spill_fixup_64bit; |
| 328 | |
| 329 | #define SPILL_1_GENERIC_ETRAP_FIXUP \ |
| 330 | etrap_spill_fixup_64bit: \ |
| 331 | ldub [%g6 + TI_WSAVED], %g1; \ |
| 332 | sll %g1, 3, %g3; \ |
| 333 | add %g6, %g3, %g3; \ |
| 334 | stx %sp, [%g3 + TI_RWIN_SPTRS]; \ |
| 335 | sll %g1, 7, %g3; \ |
| 336 | add %g6, %g3, %g3; \ |
| 337 | stx %l0, [%g3 + TI_REG_WINDOW + 0x00]; \ |
| 338 | stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \ |
| 339 | stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \ |
| 340 | stx %l3, [%g3 + TI_REG_WINDOW + 0x18]; \ |
| 341 | stx %l4, [%g3 + TI_REG_WINDOW + 0x20]; \ |
| 342 | stx %l5, [%g3 + TI_REG_WINDOW + 0x28]; \ |
| 343 | stx %l6, [%g3 + TI_REG_WINDOW + 0x30]; \ |
| 344 | stx %l7, [%g3 + TI_REG_WINDOW + 0x38]; \ |
| 345 | stx %i0, [%g3 + TI_REG_WINDOW + 0x40]; \ |
| 346 | stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \ |
| 347 | stx %i2, [%g3 + TI_REG_WINDOW + 0x50]; \ |
| 348 | stx %i3, [%g3 + TI_REG_WINDOW + 0x58]; \ |
| 349 | stx %i4, [%g3 + TI_REG_WINDOW + 0x60]; \ |
| 350 | stx %i5, [%g3 + TI_REG_WINDOW + 0x68]; \ |
| 351 | stx %i6, [%g3 + TI_REG_WINDOW + 0x70]; \ |
| 352 | stx %i7, [%g3 + TI_REG_WINDOW + 0x78]; \ |
| 353 | add %g1, 1, %g1; \ |
| 354 | stb %g1, [%g6 + TI_WSAVED]; \ |
| 355 | saved; \ |
| 356 | rdpr %cwp, %g1; \ |
| 357 | sub %g1, 2, %g1; \ |
| 358 | ba,pt %xcc, etrap_save; \ |
| 359 | wrpr %g1, %cwp; \ |
| 360 | nop; nop; nop |
| 361 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 362 | /* Normal 32bit spill */ |
| 363 | #define SPILL_2_GENERIC(ASI) \ |
| 364 | srl %sp, 0, %sp; \ |
| 365 | stwa %l0, [%sp + %g0] ASI; \ |
| 366 | mov 0x04, %g3; \ |
| 367 | stwa %l1, [%sp + %g3] ASI; \ |
| 368 | add %sp, 0x08, %g1; \ |
| 369 | stwa %l2, [%g1 + %g0] ASI; \ |
| 370 | stwa %l3, [%g1 + %g3] ASI; \ |
| 371 | add %g1, 0x08, %g1; \ |
| 372 | stwa %l4, [%g1 + %g0] ASI; \ |
| 373 | stwa %l5, [%g1 + %g3] ASI; \ |
| 374 | add %g1, 0x08, %g1; \ |
| 375 | stwa %l6, [%g1 + %g0] ASI; \ |
| 376 | stwa %l7, [%g1 + %g3] ASI; \ |
| 377 | add %g1, 0x08, %g1; \ |
| 378 | stwa %i0, [%g1 + %g0] ASI; \ |
| 379 | stwa %i1, [%g1 + %g3] ASI; \ |
| 380 | add %g1, 0x08, %g1; \ |
| 381 | stwa %i2, [%g1 + %g0] ASI; \ |
| 382 | stwa %i3, [%g1 + %g3] ASI; \ |
| 383 | add %g1, 0x08, %g1; \ |
| 384 | stwa %i4, [%g1 + %g0] ASI; \ |
| 385 | stwa %i5, [%g1 + %g3] ASI; \ |
| 386 | add %g1, 0x08, %g1; \ |
| 387 | stwa %i6, [%g1 + %g0] ASI; \ |
| 388 | stwa %i7, [%g1 + %g3] ASI; \ |
| 389 | saved; \ |
| 390 | retry; nop; nop; \ |
| 391 | b,a,pt %xcc, spill_fixup_dax; \ |
| 392 | b,a,pt %xcc, spill_fixup_mna; \ |
| 393 | b,a,pt %xcc, spill_fixup; |
| 394 | |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 395 | #define SPILL_2_GENERIC_ETRAP \ |
| 396 | etrap_user_spill_32bit: \ |
| 397 | srl %sp, 0, %sp; \ |
| 398 | stwa %l0, [%sp + 0x00] %asi; \ |
| 399 | stwa %l1, [%sp + 0x04] %asi; \ |
| 400 | stwa %l2, [%sp + 0x08] %asi; \ |
| 401 | stwa %l3, [%sp + 0x0c] %asi; \ |
| 402 | stwa %l4, [%sp + 0x10] %asi; \ |
| 403 | stwa %l5, [%sp + 0x14] %asi; \ |
| 404 | stwa %l6, [%sp + 0x18] %asi; \ |
| 405 | stwa %l7, [%sp + 0x1c] %asi; \ |
| 406 | stwa %i0, [%sp + 0x20] %asi; \ |
| 407 | stwa %i1, [%sp + 0x24] %asi; \ |
| 408 | stwa %i2, [%sp + 0x28] %asi; \ |
| 409 | stwa %i3, [%sp + 0x2c] %asi; \ |
| 410 | stwa %i4, [%sp + 0x30] %asi; \ |
| 411 | stwa %i5, [%sp + 0x34] %asi; \ |
| 412 | stwa %i6, [%sp + 0x38] %asi; \ |
| 413 | stwa %i7, [%sp + 0x3c] %asi; \ |
| 414 | saved; \ |
| 415 | sub %g1, 2, %g1; \ |
| 416 | ba,pt %xcc, etrap_save; \ |
| 417 | wrpr %g1, %cwp; \ |
| 418 | nop; nop; nop; nop; \ |
| 419 | nop; nop; nop; nop; \ |
| 420 | ba,a,pt %xcc, etrap_spill_fixup_32bit; \ |
| 421 | ba,a,pt %xcc, etrap_spill_fixup_32bit; \ |
| 422 | ba,a,pt %xcc, etrap_spill_fixup_32bit; |
| 423 | |
| 424 | #define SPILL_2_GENERIC_ETRAP_FIXUP \ |
| 425 | etrap_spill_fixup_32bit: \ |
| 426 | ldub [%g6 + TI_WSAVED], %g1; \ |
| 427 | sll %g1, 3, %g3; \ |
| 428 | add %g6, %g3, %g3; \ |
| 429 | stx %sp, [%g3 + TI_RWIN_SPTRS]; \ |
| 430 | sll %g1, 7, %g3; \ |
| 431 | add %g6, %g3, %g3; \ |
| 432 | stw %l0, [%g3 + TI_REG_WINDOW + 0x00]; \ |
| 433 | stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \ |
| 434 | stw %l2, [%g3 + TI_REG_WINDOW + 0x08]; \ |
| 435 | stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]; \ |
| 436 | stw %l4, [%g3 + TI_REG_WINDOW + 0x10]; \ |
| 437 | stw %l5, [%g3 + TI_REG_WINDOW + 0x14]; \ |
| 438 | stw %l6, [%g3 + TI_REG_WINDOW + 0x18]; \ |
| 439 | stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]; \ |
| 440 | stw %i0, [%g3 + TI_REG_WINDOW + 0x20]; \ |
| 441 | stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \ |
| 442 | stw %i2, [%g3 + TI_REG_WINDOW + 0x28]; \ |
| 443 | stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]; \ |
| 444 | stw %i4, [%g3 + TI_REG_WINDOW + 0x30]; \ |
| 445 | stw %i5, [%g3 + TI_REG_WINDOW + 0x34]; \ |
| 446 | stw %i6, [%g3 + TI_REG_WINDOW + 0x38]; \ |
| 447 | stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]; \ |
| 448 | add %g1, 1, %g1; \ |
| 449 | stb %g1, [%g6 + TI_WSAVED]; \ |
| 450 | saved; \ |
| 451 | rdpr %cwp, %g1; \ |
| 452 | sub %g1, 2, %g1; \ |
| 453 | ba,pt %xcc, etrap_save; \ |
| 454 | wrpr %g1, %cwp; \ |
| 455 | nop; nop; nop |
| 456 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | #define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP) |
| 458 | #define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP) |
| 459 | #define SPILL_3_NORMAL SPILL_0_NORMAL |
| 460 | #define SPILL_4_NORMAL SPILL_0_NORMAL |
| 461 | #define SPILL_5_NORMAL SPILL_0_NORMAL |
| 462 | #define SPILL_6_NORMAL SPILL_0_NORMAL |
| 463 | #define SPILL_7_NORMAL SPILL_0_NORMAL |
| 464 | |
| 465 | #define SPILL_0_OTHER SPILL_0_NORMAL |
| 466 | #define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS) |
| 467 | #define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS) |
| 468 | #define SPILL_3_OTHER SPILL_3_NORMAL |
| 469 | #define SPILL_4_OTHER SPILL_4_NORMAL |
| 470 | #define SPILL_5_OTHER SPILL_5_NORMAL |
| 471 | #define SPILL_6_OTHER SPILL_6_NORMAL |
| 472 | #define SPILL_7_OTHER SPILL_7_NORMAL |
| 473 | |
| 474 | /* Normal kernel fill */ |
| 475 | #define FILL_0_NORMAL \ |
| 476 | ldx [%sp + STACK_BIAS + 0x00], %l0; \ |
| 477 | ldx [%sp + STACK_BIAS + 0x08], %l1; \ |
| 478 | ldx [%sp + STACK_BIAS + 0x10], %l2; \ |
| 479 | ldx [%sp + STACK_BIAS + 0x18], %l3; \ |
| 480 | ldx [%sp + STACK_BIAS + 0x20], %l4; \ |
| 481 | ldx [%sp + STACK_BIAS + 0x28], %l5; \ |
| 482 | ldx [%sp + STACK_BIAS + 0x30], %l6; \ |
| 483 | ldx [%sp + STACK_BIAS + 0x38], %l7; \ |
| 484 | ldx [%sp + STACK_BIAS + 0x40], %i0; \ |
| 485 | ldx [%sp + STACK_BIAS + 0x48], %i1; \ |
| 486 | ldx [%sp + STACK_BIAS + 0x50], %i2; \ |
| 487 | ldx [%sp + STACK_BIAS + 0x58], %i3; \ |
| 488 | ldx [%sp + STACK_BIAS + 0x60], %i4; \ |
| 489 | ldx [%sp + STACK_BIAS + 0x68], %i5; \ |
| 490 | ldx [%sp + STACK_BIAS + 0x70], %i6; \ |
| 491 | ldx [%sp + STACK_BIAS + 0x78], %i7; \ |
| 492 | restored; retry; nop; nop; nop; nop; nop; nop; \ |
| 493 | nop; nop; nop; nop; nop; nop; nop; nop; |
| 494 | |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 495 | #define FILL_0_NORMAL_RTRAP \ |
| 496 | kern_rtt_fill: \ |
| 497 | rdpr %cwp, %g1; \ |
| 498 | sub %g1, 1, %g1; \ |
| 499 | wrpr %g1, %cwp; \ |
| 500 | ldx [%sp + STACK_BIAS + 0x00], %l0; \ |
| 501 | ldx [%sp + STACK_BIAS + 0x08], %l1; \ |
| 502 | ldx [%sp + STACK_BIAS + 0x10], %l2; \ |
| 503 | ldx [%sp + STACK_BIAS + 0x18], %l3; \ |
| 504 | ldx [%sp + STACK_BIAS + 0x20], %l4; \ |
| 505 | ldx [%sp + STACK_BIAS + 0x28], %l5; \ |
| 506 | ldx [%sp + STACK_BIAS + 0x30], %l6; \ |
| 507 | ldx [%sp + STACK_BIAS + 0x38], %l7; \ |
| 508 | ldx [%sp + STACK_BIAS + 0x40], %i0; \ |
| 509 | ldx [%sp + STACK_BIAS + 0x48], %i1; \ |
| 510 | ldx [%sp + STACK_BIAS + 0x50], %i2; \ |
| 511 | ldx [%sp + STACK_BIAS + 0x58], %i3; \ |
| 512 | ldx [%sp + STACK_BIAS + 0x60], %i4; \ |
| 513 | ldx [%sp + STACK_BIAS + 0x68], %i5; \ |
| 514 | ldx [%sp + STACK_BIAS + 0x70], %i6; \ |
| 515 | ldx [%sp + STACK_BIAS + 0x78], %i7; \ |
| 516 | restored; \ |
| 517 | add %g1, 1, %g1; \ |
| 518 | ba,pt %xcc, kern_rtt_restore; \ |
| 519 | wrpr %g1, %cwp; \ |
| 520 | nop; nop; nop; nop; nop; \ |
| 521 | nop; nop; nop; nop; |
| 522 | |
| 523 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | /* Normal 64bit fill */ |
| 525 | #define FILL_1_GENERIC(ASI) \ |
| 526 | add %sp, STACK_BIAS + 0x00, %g1; \ |
| 527 | ldxa [%g1 + %g0] ASI, %l0; \ |
| 528 | mov 0x08, %g2; \ |
| 529 | mov 0x10, %g3; \ |
| 530 | ldxa [%g1 + %g2] ASI, %l1; \ |
| 531 | mov 0x18, %g5; \ |
| 532 | ldxa [%g1 + %g3] ASI, %l2; \ |
| 533 | ldxa [%g1 + %g5] ASI, %l3; \ |
| 534 | add %g1, 0x20, %g1; \ |
| 535 | ldxa [%g1 + %g0] ASI, %l4; \ |
| 536 | ldxa [%g1 + %g2] ASI, %l5; \ |
| 537 | ldxa [%g1 + %g3] ASI, %l6; \ |
| 538 | ldxa [%g1 + %g5] ASI, %l7; \ |
| 539 | add %g1, 0x20, %g1; \ |
| 540 | ldxa [%g1 + %g0] ASI, %i0; \ |
| 541 | ldxa [%g1 + %g2] ASI, %i1; \ |
| 542 | ldxa [%g1 + %g3] ASI, %i2; \ |
| 543 | ldxa [%g1 + %g5] ASI, %i3; \ |
| 544 | add %g1, 0x20, %g1; \ |
| 545 | ldxa [%g1 + %g0] ASI, %i4; \ |
| 546 | ldxa [%g1 + %g2] ASI, %i5; \ |
| 547 | ldxa [%g1 + %g3] ASI, %i6; \ |
| 548 | ldxa [%g1 + %g5] ASI, %i7; \ |
| 549 | restored; \ |
| 550 | retry; nop; nop; nop; nop; \ |
| 551 | b,a,pt %xcc, fill_fixup_dax; \ |
| 552 | b,a,pt %xcc, fill_fixup_mna; \ |
| 553 | b,a,pt %xcc, fill_fixup; |
| 554 | |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 555 | #define FILL_1_GENERIC_RTRAP \ |
| 556 | user_rtt_fill_64bit: \ |
| 557 | ldxa [%sp + STACK_BIAS + 0x00] %asi, %l0; \ |
| 558 | ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \ |
| 559 | ldxa [%sp + STACK_BIAS + 0x10] %asi, %l2; \ |
| 560 | ldxa [%sp + STACK_BIAS + 0x18] %asi, %l3; \ |
| 561 | ldxa [%sp + STACK_BIAS + 0x20] %asi, %l4; \ |
| 562 | ldxa [%sp + STACK_BIAS + 0x28] %asi, %l5; \ |
| 563 | ldxa [%sp + STACK_BIAS + 0x30] %asi, %l6; \ |
| 564 | ldxa [%sp + STACK_BIAS + 0x38] %asi, %l7; \ |
| 565 | ldxa [%sp + STACK_BIAS + 0x40] %asi, %i0; \ |
| 566 | ldxa [%sp + STACK_BIAS + 0x48] %asi, %i1; \ |
| 567 | ldxa [%sp + STACK_BIAS + 0x50] %asi, %i2; \ |
| 568 | ldxa [%sp + STACK_BIAS + 0x58] %asi, %i3; \ |
| 569 | ldxa [%sp + STACK_BIAS + 0x60] %asi, %i4; \ |
| 570 | ldxa [%sp + STACK_BIAS + 0x68] %asi, %i5; \ |
| 571 | ldxa [%sp + STACK_BIAS + 0x70] %asi, %i6; \ |
| 572 | ldxa [%sp + STACK_BIAS + 0x78] %asi, %i7; \ |
| 573 | ba,pt %xcc, user_rtt_pre_restore; \ |
| 574 | restored; \ |
| 575 | nop; nop; nop; nop; nop; nop; \ |
| 576 | nop; nop; nop; nop; nop; \ |
| 577 | ba,a,pt %xcc, user_rtt_fill_fixup; \ |
| 578 | ba,a,pt %xcc, user_rtt_fill_fixup; \ |
| 579 | ba,a,pt %xcc, user_rtt_fill_fixup; |
| 580 | |
| 581 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | /* Normal 32bit fill */ |
| 583 | #define FILL_2_GENERIC(ASI) \ |
| 584 | srl %sp, 0, %sp; \ |
| 585 | lduwa [%sp + %g0] ASI, %l0; \ |
| 586 | mov 0x04, %g2; \ |
| 587 | mov 0x08, %g3; \ |
| 588 | lduwa [%sp + %g2] ASI, %l1; \ |
| 589 | mov 0x0c, %g5; \ |
| 590 | lduwa [%sp + %g3] ASI, %l2; \ |
| 591 | lduwa [%sp + %g5] ASI, %l3; \ |
| 592 | add %sp, 0x10, %g1; \ |
| 593 | lduwa [%g1 + %g0] ASI, %l4; \ |
| 594 | lduwa [%g1 + %g2] ASI, %l5; \ |
| 595 | lduwa [%g1 + %g3] ASI, %l6; \ |
| 596 | lduwa [%g1 + %g5] ASI, %l7; \ |
| 597 | add %g1, 0x10, %g1; \ |
| 598 | lduwa [%g1 + %g0] ASI, %i0; \ |
| 599 | lduwa [%g1 + %g2] ASI, %i1; \ |
| 600 | lduwa [%g1 + %g3] ASI, %i2; \ |
| 601 | lduwa [%g1 + %g5] ASI, %i3; \ |
| 602 | add %g1, 0x10, %g1; \ |
| 603 | lduwa [%g1 + %g0] ASI, %i4; \ |
| 604 | lduwa [%g1 + %g2] ASI, %i5; \ |
| 605 | lduwa [%g1 + %g3] ASI, %i6; \ |
| 606 | lduwa [%g1 + %g5] ASI, %i7; \ |
| 607 | restored; \ |
| 608 | retry; nop; nop; nop; nop; \ |
| 609 | b,a,pt %xcc, fill_fixup_dax; \ |
| 610 | b,a,pt %xcc, fill_fixup_mna; \ |
| 611 | b,a,pt %xcc, fill_fixup; |
| 612 | |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 613 | #define FILL_2_GENERIC_RTRAP \ |
| 614 | user_rtt_fill_32bit: \ |
| 615 | srl %sp, 0, %sp; \ |
| 616 | lduwa [%sp + 0x00] %asi, %l0; \ |
| 617 | lduwa [%sp + 0x04] %asi, %l1; \ |
| 618 | lduwa [%sp + 0x08] %asi, %l2; \ |
| 619 | lduwa [%sp + 0x0c] %asi, %l3; \ |
| 620 | lduwa [%sp + 0x10] %asi, %l4; \ |
| 621 | lduwa [%sp + 0x14] %asi, %l5; \ |
| 622 | lduwa [%sp + 0x18] %asi, %l6; \ |
| 623 | lduwa [%sp + 0x1c] %asi, %l7; \ |
| 624 | lduwa [%sp + 0x20] %asi, %i0; \ |
| 625 | lduwa [%sp + 0x24] %asi, %i1; \ |
| 626 | lduwa [%sp + 0x28] %asi, %i2; \ |
| 627 | lduwa [%sp + 0x2c] %asi, %i3; \ |
| 628 | lduwa [%sp + 0x30] %asi, %i4; \ |
| 629 | lduwa [%sp + 0x34] %asi, %i5; \ |
| 630 | lduwa [%sp + 0x38] %asi, %i6; \ |
| 631 | lduwa [%sp + 0x3c] %asi, %i7; \ |
| 632 | ba,pt %xcc, user_rtt_pre_restore; \ |
| 633 | restored; \ |
| 634 | nop; nop; nop; nop; nop; \ |
| 635 | nop; nop; nop; nop; nop; \ |
| 636 | ba,a,pt %xcc, user_rtt_fill_fixup; \ |
| 637 | ba,a,pt %xcc, user_rtt_fill_fixup; \ |
| 638 | ba,a,pt %xcc, user_rtt_fill_fixup; |
| 639 | |
| 640 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 641 | #define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP) |
| 642 | #define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP) |
| 643 | #define FILL_3_NORMAL FILL_0_NORMAL |
| 644 | #define FILL_4_NORMAL FILL_0_NORMAL |
| 645 | #define FILL_5_NORMAL FILL_0_NORMAL |
| 646 | #define FILL_6_NORMAL FILL_0_NORMAL |
| 647 | #define FILL_7_NORMAL FILL_0_NORMAL |
| 648 | |
| 649 | #define FILL_0_OTHER FILL_0_NORMAL |
| 650 | #define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS) |
| 651 | #define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS) |
| 652 | #define FILL_3_OTHER FILL_3_NORMAL |
| 653 | #define FILL_4_OTHER FILL_4_NORMAL |
| 654 | #define FILL_5_OTHER FILL_5_NORMAL |
| 655 | #define FILL_6_OTHER FILL_6_NORMAL |
| 656 | #define FILL_7_OTHER FILL_7_NORMAL |
| 657 | |
| 658 | #endif /* !(_SPARC64_TTABLE_H) */ |