David S. Miller | d979f17 | 2007-10-27 00:13:04 -0700 | [diff] [blame] | 1 | /* mostek.h: Describes the various Mostek time of day clock registers. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * |
David S. Miller | d979f17 | 2007-10-27 00:13:04 -0700 | [diff] [blame] | 3 | * Copyright (C) 1995 David S. Miller (davem@davemloft.net) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) |
| 5 | */ |
| 6 | |
| 7 | #ifndef _SPARC64_MOSTEK_H |
| 8 | #define _SPARC64_MOSTEK_H |
| 9 | |
| 10 | #include <asm/idprom.h> |
| 11 | |
| 12 | /* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ) |
| 13 | * |
| 14 | * Data |
| 15 | * Address Function |
| 16 | * Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0 |
| 17 | * 7ff - - - - - - - - Year 00-99 |
| 18 | * 7fe 0 0 0 - - - - - Month 01-12 |
| 19 | * 7fd 0 0 - - - - - - Date 01-31 |
| 20 | * 7fc 0 FT 0 0 0 - - - Day 01-07 |
| 21 | * 7fb KS 0 - - - - - - Hours 00-23 |
| 22 | * 7fa 0 - - - - - - - Minutes 00-59 |
| 23 | * 7f9 ST - - - - - - - Seconds 00-59 |
| 24 | * 7f8 W R S - - - - - Control |
| 25 | * |
| 26 | * * ST is STOP BIT |
| 27 | * * W is WRITE BIT |
| 28 | * * R is READ BIT |
| 29 | * * S is SIGN BIT |
| 30 | * * FT is FREQ TEST BIT |
| 31 | * * KS is KICK START BIT |
| 32 | */ |
| 33 | |
| 34 | /* The Mostek 48t02 real time clock and NVRAM chip. The registers |
| 35 | * other than the control register are in binary coded decimal. Some |
| 36 | * control bits also live outside the control register. |
| 37 | * |
| 38 | * We now deal with physical addresses for I/O to the chip. -DaveM |
| 39 | */ |
David S. Miller | d979f17 | 2007-10-27 00:13:04 -0700 | [diff] [blame] | 40 | static inline u8 mostek_read(void __iomem *addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | { |
| 42 | u8 ret; |
| 43 | |
| 44 | __asm__ __volatile__("lduba [%1] %2, %0" |
| 45 | : "=r" (ret) |
| 46 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
| 47 | return ret; |
| 48 | } |
| 49 | |
David S. Miller | d979f17 | 2007-10-27 00:13:04 -0700 | [diff] [blame] | 50 | static inline void mostek_write(void __iomem *addr, u8 val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | { |
| 52 | __asm__ __volatile__("stba %0, [%1] %2" |
| 53 | : /* no outputs */ |
| 54 | : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); |
| 55 | } |
| 56 | |
| 57 | #define MOSTEK_EEPROM 0x0000UL |
| 58 | #define MOSTEK_IDPROM 0x07d8UL |
| 59 | #define MOSTEK_CREG 0x07f8UL |
| 60 | #define MOSTEK_SEC 0x07f9UL |
| 61 | #define MOSTEK_MIN 0x07faUL |
| 62 | #define MOSTEK_HOUR 0x07fbUL |
| 63 | #define MOSTEK_DOW 0x07fcUL |
| 64 | #define MOSTEK_DOM 0x07fdUL |
| 65 | #define MOSTEK_MONTH 0x07feUL |
| 66 | #define MOSTEK_YEAR 0x07ffUL |
| 67 | |
| 68 | extern spinlock_t mostek_lock; |
Al Viro | ef0299b | 2005-04-24 12:28:36 -0700 | [diff] [blame] | 69 | extern void __iomem *mstk48t02_regs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | |
| 71 | /* Control register values. */ |
| 72 | #define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */ |
| 73 | #define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */ |
| 74 | #define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */ |
| 75 | |
| 76 | /* Control bits that live in the other registers. */ |
| 77 | #define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */ |
| 78 | #define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */ |
| 79 | #define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */ |
| 80 | |
| 81 | #define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */ |
| 82 | #define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO) |
| 83 | |
| 84 | /* Masks that define how much space each value takes up. */ |
| 85 | #define MSTK_SEC_MASK 0x7f |
| 86 | #define MSTK_MIN_MASK 0x7f |
| 87 | #define MSTK_HOUR_MASK 0x3f |
| 88 | #define MSTK_DOW_MASK 0x07 |
| 89 | #define MSTK_DOM_MASK 0x3f |
| 90 | #define MSTK_MONTH_MASK 0x1f |
Mikael Pettersson | 7945d56 | 2007-03-27 01:13:55 -0700 | [diff] [blame] | 91 | #define MSTK_YEAR_MASK 0xffU |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | |
| 93 | /* Binary coded decimal conversion macros. */ |
| 94 | #define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04)) |
| 95 | #define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A)) |
| 96 | |
| 97 | /* Generic register set and get macros for internal use. */ |
| 98 | #define MSTK_GET(regs,name) \ |
| 99 | (MSTK_REGVAL_TO_DECIMAL(mostek_read(regs + MOSTEK_ ## name) & MSTK_ ## name ## _MASK)) |
| 100 | #define MSTK_SET(regs,name,value) \ |
| 101 | do { u8 __val = mostek_read(regs + MOSTEK_ ## name); \ |
| 102 | __val &= ~(MSTK_ ## name ## _MASK); \ |
| 103 | __val |= (MSTK_DECIMAL_TO_REGVAL(value) & \ |
| 104 | (MSTK_ ## name ## _MASK)); \ |
| 105 | mostek_write(regs + MOSTEK_ ## name, __val); \ |
| 106 | } while(0) |
| 107 | |
| 108 | /* Macros to make register access easier on our fingers. These give you |
| 109 | * the decimal value of the register requested if applicable. You pass |
| 110 | * the a pointer to a 'struct mostek48t02'. |
| 111 | */ |
| 112 | #define MSTK_REG_CREG(regs) (mostek_read((regs) + MOSTEK_CREG)) |
| 113 | #define MSTK_REG_SEC(regs) MSTK_GET(regs,SEC) |
| 114 | #define MSTK_REG_MIN(regs) MSTK_GET(regs,MIN) |
| 115 | #define MSTK_REG_HOUR(regs) MSTK_GET(regs,HOUR) |
| 116 | #define MSTK_REG_DOW(regs) MSTK_GET(regs,DOW) |
| 117 | #define MSTK_REG_DOM(regs) MSTK_GET(regs,DOM) |
| 118 | #define MSTK_REG_MONTH(regs) MSTK_GET(regs,MONTH) |
| 119 | #define MSTK_REG_YEAR(regs) MSTK_GET(regs,YEAR) |
| 120 | |
| 121 | #define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,SEC,value) |
| 122 | #define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,MIN,value) |
| 123 | #define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,HOUR,value) |
| 124 | #define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,DOW,value) |
| 125 | #define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,DOM,value) |
| 126 | #define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,MONTH,value) |
| 127 | #define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,YEAR,value) |
| 128 | |
| 129 | |
| 130 | /* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the |
| 131 | * same (basically) layout of the 48t02 chip except for the extra |
| 132 | * NVRAM on board (8 KB against the 48t02's 2 KB). |
| 133 | */ |
| 134 | #define MOSTEK_48T08_OFFSET 0x0000UL /* Lower NVRAM portions */ |
| 135 | #define MOSTEK_48T08_48T02 0x1800UL /* Offset to 48T02 chip */ |
| 136 | |
| 137 | /* SUN5 systems usually have 48t59 model clock chipsets. But we keep the older |
| 138 | * clock chip definitions around just in case. |
| 139 | */ |
| 140 | #define MOSTEK_48T59_OFFSET 0x0000UL /* Lower NVRAM portions */ |
| 141 | #define MOSTEK_48T59_48T02 0x1800UL /* Offset to 48T02 chip */ |
| 142 | |
| 143 | #endif /* !(_SPARC64_MOSTEK_H) */ |