Sascha Hauer | 025f272 | 2015-11-30 12:42:31 +0100 | [diff] [blame] | 1 | * Mediatek Thermal |
| 2 | |
| 3 | This describes the device tree binding for the Mediatek thermal controller |
| 4 | which measures the on-SoC temperatures. This device does not have its own ADC, |
| 5 | instead it directly controls the AUXADC via AHB bus accesses. For this reason |
| 6 | this device needs phandles to the AUXADC. Also it controls a mux in the |
| 7 | apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS |
| 8 | is also needed. |
| 9 | |
| 10 | Required properties: |
dawei.chien@mediatek.com | 77d6e72 | 2016-08-18 11:50:51 +0800 | [diff] [blame] | 11 | - compatible: |
| 12 | - "mediatek,mt8173-thermal" : For MT8173 family of SoCs |
| 13 | - "mediatek,mt2701-thermal" : For MT2701 family of SoCs |
Sascha Hauer | 025f272 | 2015-11-30 12:42:31 +0100 | [diff] [blame] | 14 | - reg: Address range of the thermal controller |
| 15 | - interrupts: IRQ for the thermal controller |
| 16 | - clocks, clock-names: Clocks needed for the thermal controller. required |
| 17 | clocks are: |
| 18 | "therm": Main clock needed for register access |
| 19 | "auxadc": The AUXADC clock |
| 20 | - resets: Reference to the reset controller controlling the thermal controller. |
| 21 | - mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses |
| 22 | - mediatek,apmixedsys: A phandle to the APMIXEDSYS controller. |
| 23 | - #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description. |
| 24 | |
| 25 | Optional properties: |
| 26 | - nvmem-cells: A phandle to the calibration data provided by a nvmem device. If |
| 27 | unspecified default values shall be used. |
| 28 | - nvmem-cell-names: Should be "calibration-data" |
| 29 | |
| 30 | Example: |
| 31 | |
| 32 | thermal: thermal@1100b000 { |
| 33 | #thermal-sensor-cells = <1>; |
| 34 | compatible = "mediatek,mt8173-thermal"; |
| 35 | reg = <0 0x1100b000 0 0x1000>; |
| 36 | interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>; |
| 37 | clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; |
| 38 | clock-names = "therm", "auxadc"; |
| 39 | resets = <&pericfg MT8173_PERI_THERM_SW_RST>; |
| 40 | reset-names = "therm"; |
| 41 | mediatek,auxadc = <&auxadc>; |
| 42 | mediatek,apmixedsys = <&apmixedsys>; |
| 43 | nvmem-cells = <&thermal_calibration_data>; |
| 44 | nvmem-cell-names = "calibration-data"; |
| 45 | }; |