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Sarah Sharp66d4ead2009-04-27 19:52:28 -07001/*
2 * xHCI host controller driver
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/irq.h>
24#include <linux/module.h>
25
26#include "xhci.h"
27
28#define DRIVER_AUTHOR "Sarah Sharp"
29#define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
30
31/* TODO: copied from ehci-hcd.c - can this be refactored? */
32/*
33 * handshake - spin reading hc until handshake completes or fails
34 * @ptr: address of hc register to be read
35 * @mask: bits to look at in result of read
36 * @done: value of those bits when handshake succeeds
37 * @usec: timeout in microseconds
38 *
39 * Returns negative errno, or zero on success
40 *
41 * Success happens when the "mask" bits have the specified value (hardware
42 * handshake done). There are two failure modes: "usec" have passed (major
43 * hardware flakeout), or the register reads as all-ones (hardware removed).
44 */
45static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
46 u32 mask, u32 done, int usec)
47{
48 u32 result;
49
50 do {
51 result = xhci_readl(xhci, ptr);
52 if (result == ~(u32)0) /* card removed */
53 return -ENODEV;
54 result &= mask;
55 if (result == done)
56 return 0;
57 udelay(1);
58 usec--;
59 } while (usec > 0);
60 return -ETIMEDOUT;
61}
62
63/*
64 * Force HC into halt state.
65 *
66 * Disable any IRQs and clear the run/stop bit.
67 * HC will complete any current and actively pipelined transactions, and
68 * should halt within 16 microframes of the run/stop bit being cleared.
69 * Read HC Halted bit in the status register to see when the HC is finished.
70 * XXX: shouldn't we set HC_STATE_HALT here somewhere?
71 */
72int xhci_halt(struct xhci_hcd *xhci)
73{
74 u32 halted;
75 u32 cmd;
76 u32 mask;
77
78 xhci_dbg(xhci, "// Halt the HC\n");
79 /* Disable all interrupts from the host controller */
80 mask = ~(XHCI_IRQS);
81 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
82 if (!halted)
83 mask &= ~CMD_RUN;
84
85 cmd = xhci_readl(xhci, &xhci->op_regs->command);
86 cmd &= mask;
87 xhci_writel(xhci, cmd, &xhci->op_regs->command);
88
89 return handshake(xhci, &xhci->op_regs->status,
90 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
91}
92
93/*
94 * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
95 *
96 * This resets pipelines, timers, counters, state machines, etc.
97 * Transactions will be terminated immediately, and operational registers
98 * will be set to their defaults.
99 */
100int xhci_reset(struct xhci_hcd *xhci)
101{
102 u32 command;
103 u32 state;
104
105 state = xhci_readl(xhci, &xhci->op_regs->status);
106 BUG_ON((state & STS_HALT) == 0);
107
108 xhci_dbg(xhci, "// Reset the HC\n");
109 command = xhci_readl(xhci, &xhci->op_regs->command);
110 command |= CMD_RESET;
111 xhci_writel(xhci, command, &xhci->op_regs->command);
112 /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
113 xhci_to_hcd(xhci)->state = HC_STATE_HALT;
114
115 return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
116}
117
118/*
119 * Stop the HC from processing the endpoint queues.
120 */
121static void xhci_quiesce(struct xhci_hcd *xhci)
122{
123 /*
124 * Queues are per endpoint, so we need to disable an endpoint or slot.
125 *
126 * To disable a slot, we need to insert a disable slot command on the
127 * command ring and ring the doorbell. This will also free any internal
128 * resources associated with the slot (which might not be what we want).
129 *
130 * A Release Endpoint command sounds better - doesn't free internal HC
131 * memory, but removes the endpoints from the schedule and releases the
132 * bandwidth, disables the doorbells, and clears the endpoint enable
133 * flag. Usually used prior to a set interface command.
134 *
135 * TODO: Implement after command ring code is done.
136 */
137 BUG_ON(!HC_IS_RUNNING(xhci_to_hcd(xhci)->state));
138 xhci_dbg(xhci, "Finished quiescing -- code not written yet\n");
139}
140
141#if 0
142/* Set up MSI-X table for entry 0 (may claim other entries later) */
143static int xhci_setup_msix(struct xhci_hcd *xhci)
144{
145 int ret;
146 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
147
148 xhci->msix_count = 0;
149 /* XXX: did I do this right? ixgbe does kcalloc for more than one */
150 xhci->msix_entries = kmalloc(sizeof(struct msix_entry), GFP_KERNEL);
151 if (!xhci->msix_entries) {
152 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
153 return -ENOMEM;
154 }
155 xhci->msix_entries[0].entry = 0;
156
157 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
158 if (ret) {
159 xhci_err(xhci, "Failed to enable MSI-X\n");
160 goto free_entries;
161 }
162
163 /*
164 * Pass the xhci pointer value as the request_irq "cookie".
165 * If more irqs are added, this will need to be unique for each one.
166 */
167 ret = request_irq(xhci->msix_entries[0].vector, &xhci_irq, 0,
168 "xHCI", xhci_to_hcd(xhci));
169 if (ret) {
170 xhci_err(xhci, "Failed to allocate MSI-X interrupt\n");
171 goto disable_msix;
172 }
173 xhci_dbg(xhci, "Finished setting up MSI-X\n");
174 return 0;
175
176disable_msix:
177 pci_disable_msix(pdev);
178free_entries:
179 kfree(xhci->msix_entries);
180 xhci->msix_entries = NULL;
181 return ret;
182}
183
184/* XXX: code duplication; can xhci_setup_msix call this? */
185/* Free any IRQs and disable MSI-X */
186static void xhci_cleanup_msix(struct xhci_hcd *xhci)
187{
188 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
189 if (!xhci->msix_entries)
190 return;
191
192 free_irq(xhci->msix_entries[0].vector, xhci);
193 pci_disable_msix(pdev);
194 kfree(xhci->msix_entries);
195 xhci->msix_entries = NULL;
196 xhci_dbg(xhci, "Finished cleaning up MSI-X\n");
197}
198#endif
199
200/*
201 * Initialize memory for HCD and xHC (one-time init).
202 *
203 * Program the PAGESIZE register, initialize the device context array, create
204 * device contexts (?), set up a command ring segment (or two?), create event
205 * ring (one for now).
206 */
207int xhci_init(struct usb_hcd *hcd)
208{
209 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
210 int retval = 0;
211
212 xhci_dbg(xhci, "xhci_init\n");
213 spin_lock_init(&xhci->lock);
214 retval = xhci_mem_init(xhci, GFP_KERNEL);
215 xhci_dbg(xhci, "Finished xhci_init\n");
216
217 return retval;
218}
219
220/*
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700221 * Called in interrupt context when there might be work
222 * queued on the event ring
223 *
224 * xhci->lock must be held by caller.
225 */
226static void xhci_work(struct xhci_hcd *xhci)
227{
228 u32 temp;
229
230 /*
231 * Clear the op reg interrupt status first,
232 * so we can receive interrupts from other MSI-X interrupters.
233 * Write 1 to clear the interrupt status.
234 */
235 temp = xhci_readl(xhci, &xhci->op_regs->status);
236 temp |= STS_EINT;
237 xhci_writel(xhci, temp, &xhci->op_regs->status);
238 /* FIXME when MSI-X is supported and there are multiple vectors */
239 /* Clear the MSI-X event interrupt status */
240
241 /* Acknowledge the interrupt */
242 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
243 temp |= 0x3;
244 xhci_writel(xhci, temp, &xhci->ir_set->irq_pending);
245 /* Flush posted writes */
246 xhci_readl(xhci, &xhci->ir_set->irq_pending);
247
248 /* FIXME this should be a delayed service routine that clears the EHB */
249 handle_event(xhci);
250
251 /* Clear the event handler busy flag; the event ring should be empty. */
252 temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
253 xhci_writel(xhci, temp & ~ERST_EHB, &xhci->ir_set->erst_dequeue[0]);
254 /* Flush posted writes -- FIXME is this necessary? */
255 xhci_readl(xhci, &xhci->ir_set->irq_pending);
256}
257
258/*-------------------------------------------------------------------------*/
259
260/*
261 * xHCI spec says we can get an interrupt, and if the HC has an error condition,
262 * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
263 * indicators of an event TRB error, but we check the status *first* to be safe.
264 */
265irqreturn_t xhci_irq(struct usb_hcd *hcd)
266{
267 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
268 u32 temp, temp2;
269
270 spin_lock(&xhci->lock);
271 /* Check if the xHC generated the interrupt, or the irq is shared */
272 temp = xhci_readl(xhci, &xhci->op_regs->status);
273 temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending);
274 if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) {
275 spin_unlock(&xhci->lock);
276 return IRQ_NONE;
277 }
278
279 temp = xhci_readl(xhci, &xhci->op_regs->status);
280 if (temp & STS_FATAL) {
281 xhci_warn(xhci, "WARNING: Host System Error\n");
282 xhci_halt(xhci);
283 xhci_to_hcd(xhci)->state = HC_STATE_HALT;
284 return -ESHUTDOWN;
285 }
286
287 xhci_work(xhci);
288 spin_unlock(&xhci->lock);
289
290 return IRQ_HANDLED;
291}
292
293#ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
294void event_ring_work(unsigned long arg)
295{
296 unsigned long flags;
297 int temp;
298 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
299 int i, j;
300
301 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
302
303 spin_lock_irqsave(&xhci->lock, flags);
304 temp = xhci_readl(xhci, &xhci->op_regs->status);
305 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
306 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
307 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
308 xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled);
309 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
310 xhci->error_bitmask = 0;
311 xhci_dbg(xhci, "Event ring:\n");
312 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
313 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
314 temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
315 temp &= ERST_PTR_MASK;
316 xhci_dbg(xhci, "ERST deq = 0x%x\n", temp);
317 xhci_dbg(xhci, "Command ring:\n");
318 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
319 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
320 xhci_dbg_cmd_ptrs(xhci);
321
322 if (xhci->noops_submitted != NUM_TEST_NOOPS)
323 if (setup_one_noop(xhci))
324 ring_cmd_db(xhci);
325 spin_unlock_irqrestore(&xhci->lock, flags);
326
327 if (!xhci->zombie)
328 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
329 else
330 xhci_dbg(xhci, "Quit polling the event ring.\n");
331}
332#endif
333
334/*
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700335 * Start the HC after it was halted.
336 *
337 * This function is called by the USB core when the HC driver is added.
338 * Its opposite is xhci_stop().
339 *
340 * xhci_init() must be called once before this function can be called.
341 * Reset the HC, enable device slot contexts, program DCBAAP, and
342 * set command ring pointer and event ring pointer.
343 *
344 * Setup MSI-X vectors and enable interrupts.
345 */
346int xhci_run(struct usb_hcd *hcd)
347{
348 u32 temp;
349 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700350 void (*doorbell)(struct xhci_hcd *) = NULL;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700351
Sarah Sharp0f2a7932009-04-27 19:57:12 -0700352 hcd->uses_new_polling = 1;
353 hcd->poll_rh = 0;
354
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700355 xhci_dbg(xhci, "xhci_run\n");
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700356#if 0 /* FIXME: MSI not setup yet */
357 /* Do this at the very last minute */
358 ret = xhci_setup_msix(xhci);
359 if (!ret)
360 return ret;
361
362 return -ENOSYS;
363#endif
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700364#ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
365 init_timer(&xhci->event_ring_timer);
366 xhci->event_ring_timer.data = (unsigned long) xhci;
367 xhci->event_ring_timer.function = event_ring_work;
368 /* Poll the event ring */
369 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
370 xhci->zombie = 0;
371 xhci_dbg(xhci, "Setting event ring polling timer\n");
372 add_timer(&xhci->event_ring_timer);
373#endif
374
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700375 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
376 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
377 temp &= 0xffff;
378 temp |= (u32) 160;
379 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
380
381 /* Set the HCD state before we enable the irqs */
382 hcd->state = HC_STATE_RUNNING;
383 temp = xhci_readl(xhci, &xhci->op_regs->command);
384 temp |= (CMD_EIE);
385 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
386 temp);
387 xhci_writel(xhci, temp, &xhci->op_regs->command);
388
389 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
390 xhci_dbg(xhci, "// Enabling event ring interrupter 0x%x"
391 " by writing 0x%x to irq_pending\n",
392 (unsigned int) xhci->ir_set,
393 (unsigned int) ER_IRQ_ENABLE(temp));
394 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
395 &xhci->ir_set->irq_pending);
396 xhci_print_ir_set(xhci, xhci->ir_set, 0);
397
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700398 if (NUM_TEST_NOOPS > 0)
399 doorbell = setup_one_noop(xhci);
400
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700401 xhci_dbg(xhci, "Command ring memory map follows:\n");
402 xhci_debug_ring(xhci, xhci->cmd_ring);
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700403 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
404 xhci_dbg_cmd_ptrs(xhci);
405
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700406 xhci_dbg(xhci, "ERST memory map follows:\n");
407 xhci_dbg_erst(xhci, &xhci->erst);
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700408 xhci_dbg(xhci, "Event ring:\n");
409 xhci_debug_ring(xhci, xhci->event_ring);
410 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
411 temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[1]);
412 xhci_dbg(xhci, "ERST deq upper = 0x%x\n", temp);
413 temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
414 temp &= ERST_PTR_MASK;
415 xhci_dbg(xhci, "ERST deq = 0x%x\n", temp);
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700416
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700417 temp = xhci_readl(xhci, &xhci->op_regs->command);
418 temp |= (CMD_RUN);
419 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
420 temp);
421 xhci_writel(xhci, temp, &xhci->op_regs->command);
422 /* Flush PCI posted writes */
423 temp = xhci_readl(xhci, &xhci->op_regs->command);
424 xhci_dbg(xhci, "// @%x = 0x%x\n",
425 (unsigned int) &xhci->op_regs->command, temp);
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700426 if (doorbell)
427 (*doorbell)(xhci);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700428
429 xhci_dbg(xhci, "Finished xhci_run\n");
430 return 0;
431}
432
433/*
434 * Stop xHCI driver.
435 *
436 * This function is called by the USB core when the HC driver is removed.
437 * Its opposite is xhci_run().
438 *
439 * Disable device contexts, disable IRQs, and quiesce the HC.
440 * Reset the HC, finish any completed transactions, and cleanup memory.
441 */
442void xhci_stop(struct usb_hcd *hcd)
443{
444 u32 temp;
445 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
446
447 spin_lock_irq(&xhci->lock);
448 if (HC_IS_RUNNING(hcd->state))
449 xhci_quiesce(xhci);
450 xhci_halt(xhci);
451 xhci_reset(xhci);
452 spin_unlock_irq(&xhci->lock);
453
454#if 0 /* No MSI yet */
455 xhci_cleanup_msix(xhci);
456#endif
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700457#ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
458 /* Tell the event ring poll function not to reschedule */
459 xhci->zombie = 1;
460 del_timer_sync(&xhci->event_ring_timer);
461#endif
462
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700463 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
464 temp = xhci_readl(xhci, &xhci->op_regs->status);
465 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
466 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
467 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
468 &xhci->ir_set->irq_pending);
469 xhci_print_ir_set(xhci, xhci->ir_set, 0);
470
471 xhci_dbg(xhci, "cleaning up memory\n");
472 xhci_mem_cleanup(xhci);
473 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
474 xhci_readl(xhci, &xhci->op_regs->status));
475}
476
477/*
478 * Shutdown HC (not bus-specific)
479 *
480 * This is called when the machine is rebooting or halting. We assume that the
481 * machine will be powered off, and the HC's internal state will be reset.
482 * Don't bother to free memory.
483 */
484void xhci_shutdown(struct usb_hcd *hcd)
485{
486 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
487
488 spin_lock_irq(&xhci->lock);
489 xhci_halt(xhci);
490 spin_unlock_irq(&xhci->lock);
491
492#if 0
493 xhci_cleanup_msix(xhci);
494#endif
495
496 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
497 xhci_readl(xhci, &xhci->op_regs->status));
498}
499
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700500/*-------------------------------------------------------------------------*/
501
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700502int xhci_get_frame(struct usb_hcd *hcd)
503{
504 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
505 /* EHCI mods by the periodic size. Why? */
506 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
507}
508
509MODULE_DESCRIPTION(DRIVER_DESC);
510MODULE_AUTHOR(DRIVER_AUTHOR);
511MODULE_LICENSE("GPL");
512
513static int __init xhci_hcd_init(void)
514{
515#ifdef CONFIG_PCI
516 int retval = 0;
517
518 retval = xhci_register_pci();
519
520 if (retval < 0) {
521 printk(KERN_DEBUG "Problem registering PCI driver.");
522 return retval;
523 }
524#endif
525 return 0;
526}
527module_init(xhci_hcd_init);
528
529static void __exit xhci_hcd_cleanup(void)
530{
531#ifdef CONFIG_PCI
532 xhci_unregister_pci();
533#endif
534}
535module_exit(xhci_hcd_cleanup);