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gerrit-public.fairphone.software / kernel / msm-4.9 / 0f48d34ec6a34e24b96708719fd6f3ba8fa828af / . / arch / mips / include / asm / asmmacro.h
blob: 6c8342ae74db88cd3187d1964274aa03c6031165 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Ralf Baechle
7 */
8#ifndef _ASM_ASMMACRO_H
9#define _ASM_ASMMACRO_H
Ralf Baechle42a3b4f2005-09-03 15:56:17 -0700[diff] [blame]10
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]11#include <asm/hazards.h>
Ralf Baechle42a3b4f2005-09-03 15:56:17 -0700[diff] [blame]12
Ralf Baechle875d43e2005-09-03 15:56:16 -0700[diff] [blame]13#ifdef CONFIG_32BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]14#include <asm/asmmacro-32.h>
15#endif
Ralf Baechle875d43e2005-09-03 15:56:16 -0700[diff] [blame]16#ifdef CONFIG_64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]17#include <asm/asmmacro-64.h>
18#endif
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]19#ifdef CONFIG_MIPS_MT_SMTC
20#include <asm/mipsmtregs.h>
21#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]22
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]23#ifdef CONFIG_MIPS_MT_SMTC
24 .macro local_irq_enable reg=t0
25 mfc0 \reg, CP0_TCSTATUS
26 ori \reg, \reg, TCSTATUS_IXMT
27 xori \reg, \reg, TCSTATUS_IXMT
28 mtc0 \reg, CP0_TCSTATUS
Ralf Baechle4277ff52006-06-03 22:40:15 +0100[diff] [blame]29 _ehb
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]30 .endm
31
32 .macro local_irq_disable reg=t0
33 mfc0 \reg, CP0_TCSTATUS
34 ori \reg, \reg, TCSTATUS_IXMT
35 mtc0 \reg, CP0_TCSTATUS
Ralf Baechle4277ff52006-06-03 22:40:15 +0100[diff] [blame]36 _ehb
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]37 .endm
David Daneyb6354db2008-12-10 08:37:25 -0800[diff] [blame]38#elif defined(CONFIG_CPU_MIPSR2)
39 .macro local_irq_enable reg=t0
40 ei
41 irq_enable_hazard
42 .endm
43
44 .macro local_irq_disable reg=t0
45 di
46 irq_disable_hazard
47 .endm
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]48#else
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]49 .macro local_irq_enable reg=t0
50 mfc0 \reg, CP0_STATUS
51 ori \reg, \reg, 1
52 mtc0 \reg, CP0_STATUS
53 irq_enable_hazard
54 .endm
55
56 .macro local_irq_disable reg=t0
57 mfc0 \reg, CP0_STATUS
58 ori \reg, \reg, 1
59 xori \reg, \reg, 1
60 mtc0 \reg, CP0_STATUS
61 irq_disable_hazard
62 .endm
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]63#endif /* CONFIG_MIPS_MT_SMTC */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]64
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]65/*
66 * Temporary until all gas have MT ASE support
67 */
68 .macro DMT reg=0
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100[diff] [blame]69 .word 0x41600bc1 | (\reg << 16)
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]70 .endm
71
72 .macro EMT reg=0
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100[diff] [blame]73 .word 0x41600be1 | (\reg << 16)
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]74 .endm
75
76 .macro DVPE reg=0
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100[diff] [blame]77 .word 0x41600001 | (\reg << 16)
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]78 .endm
79
80 .macro EVPE reg=0
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100[diff] [blame]81 .word 0x41600021 | (\reg << 16)
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]82 .endm
83
84 .macro MFTR rt=0, rd=0, u=0, sel=0
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100[diff] [blame]85 .word 0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]86 .endm
87
88 .macro MTTR rt=0, rd=0, u=0, sel=0
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100[diff] [blame]89 .word 0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
Ralf Baechle41c594a2006-04-05 09:45:45 +0100[diff] [blame]90 .endm
91
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]92#endif /* _ASM_ASMMACRO_H */