Forest Bond | 5449c68 | 2009-04-25 10:30:44 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. |
| 3 | * All rights reserved. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; either version 2 of the License, or |
| 8 | * (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License along |
| 16 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 17 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | * |
| 19 | * File: srom.c |
| 20 | * |
| 21 | * Purpose:Implement functions to access eeprom |
| 22 | * |
| 23 | * Author: Jerry Chen |
| 24 | * |
| 25 | * Date: Jan 29, 2003 |
| 26 | * |
| 27 | * Functions: |
| 28 | * SROMbyReadEmbedded - Embedded read eeprom via MAC |
| 29 | * SROMbWriteEmbedded - Embedded write eeprom via MAC |
| 30 | * SROMvRegBitsOn - Set Bits On in eeprom |
| 31 | * SROMvRegBitsOff - Clear Bits Off in eeprom |
| 32 | * SROMbIsRegBitsOn - Test if Bits On in eeprom |
| 33 | * SROMbIsRegBitsOff - Test if Bits Off in eeprom |
| 34 | * SROMvReadAllContents - Read all contents in eeprom |
| 35 | * SROMvWriteAllContents - Write all contents in eeprom |
| 36 | * SROMvReadEtherAddress - Read Ethernet Address in eeprom |
| 37 | * SROMvWriteEtherAddress - Write Ethernet Address in eeprom |
| 38 | * SROMvReadSubSysVenId - Read Sub_VID and Sub_SysId in eeprom |
| 39 | * SROMbAutoLoad - Auto Load eeprom to MAC register |
| 40 | * |
| 41 | * Revision History: |
| 42 | * |
| 43 | */ |
| 44 | |
| 45 | |
| 46 | #if !defined(__UPC_H__) |
| 47 | #include "upc.h" |
| 48 | #endif |
| 49 | #if !defined(__TMACRO_H__) |
| 50 | #include "tmacro.h" |
| 51 | #endif |
| 52 | #if !defined(__TBIT_H__) |
| 53 | #include "tbit.h" |
| 54 | #endif |
| 55 | #if !defined(__TETHER_H__) |
| 56 | #include "tether.h" |
| 57 | #endif |
| 58 | #if !defined(__MAC_H__) |
| 59 | #include "mac.h" |
| 60 | #endif |
| 61 | #if !defined(__SROM_H__) |
| 62 | #include "srom.h" |
| 63 | #endif |
| 64 | |
| 65 | |
| 66 | |
| 67 | |
| 68 | /*--------------------- Static Definitions -------------------------*/ |
| 69 | |
| 70 | /*--------------------- Static Classes ----------------------------*/ |
| 71 | |
| 72 | /*--------------------- Static Variables --------------------------*/ |
| 73 | |
| 74 | /*--------------------- Static Functions --------------------------*/ |
| 75 | |
| 76 | /*--------------------- Export Variables --------------------------*/ |
| 77 | |
| 78 | /*--------------------- Export Functions --------------------------*/ |
| 79 | |
| 80 | |
| 81 | |
| 82 | |
| 83 | /* |
| 84 | * Description: Read a byte from EEPROM, by MAC I2C |
| 85 | * |
| 86 | * Parameters: |
| 87 | * In: |
| 88 | * dwIoBase - I/O base address |
| 89 | * byContntOffset - address of EEPROM |
| 90 | * Out: |
| 91 | * none |
| 92 | * |
| 93 | * Return Value: data read |
| 94 | * |
| 95 | */ |
| 96 | BYTE SROMbyReadEmbedded(DWORD_PTR dwIoBase, BYTE byContntOffset) |
| 97 | { |
| 98 | WORD wDelay, wNoACK; |
| 99 | BYTE byWait; |
| 100 | BYTE byData; |
| 101 | BYTE byOrg; |
| 102 | |
| 103 | byData = 0xFF; |
| 104 | VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg); |
| 105 | // turn off hardware retry for getting NACK |
| 106 | VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY))); |
| 107 | for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) { |
| 108 | VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID); |
| 109 | VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset); |
| 110 | |
| 111 | // issue read command |
| 112 | VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMR); |
| 113 | // wait DONE be set |
| 114 | for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) { |
| 115 | VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait); |
| 116 | if (BITbIsAnyBitsOn(byWait, (I2MCSR_DONE | I2MCSR_NACK))) |
| 117 | break; |
| 118 | PCAvDelayByIO(CB_DELAY_LOOP_WAIT); |
| 119 | } |
| 120 | if ((wDelay < W_MAX_TIMEOUT) && |
| 121 | (BITbIsBitOff(byWait, I2MCSR_NACK))) { |
| 122 | break; |
| 123 | } |
| 124 | } |
| 125 | VNSvInPortB(dwIoBase + MAC_REG_I2MDIPT, &byData); |
| 126 | VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg); |
| 127 | return byData; |
| 128 | } |
| 129 | |
| 130 | |
| 131 | /* |
| 132 | * Description: Write a byte to EEPROM, by MAC I2C |
| 133 | * |
| 134 | * Parameters: |
| 135 | * In: |
| 136 | * dwIoBase - I/O base address |
| 137 | * byContntOffset - address of EEPROM |
| 138 | * wData - data to write |
| 139 | * Out: |
| 140 | * none |
| 141 | * |
| 142 | * Return Value: TRUE if succeeded; FALSE if failed. |
| 143 | * |
| 144 | */ |
| 145 | BOOL SROMbWriteEmbedded (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byData) |
| 146 | { |
| 147 | WORD wDelay, wNoACK; |
| 148 | BYTE byWait; |
| 149 | |
| 150 | BYTE byOrg; |
| 151 | |
| 152 | VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg); |
| 153 | // turn off hardware retry for getting NACK |
| 154 | VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY))); |
| 155 | for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) { |
| 156 | VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID); |
| 157 | VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset); |
| 158 | VNSvOutPortB(dwIoBase + MAC_REG_I2MDOPT, byData); |
| 159 | |
| 160 | // issue write command |
| 161 | VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMW); |
| 162 | // wait DONE be set |
| 163 | for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) { |
| 164 | VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait); |
| 165 | if (BITbIsAnyBitsOn(byWait, (I2MCSR_DONE | I2MCSR_NACK))) |
| 166 | break; |
| 167 | PCAvDelayByIO(CB_DELAY_LOOP_WAIT); |
| 168 | } |
| 169 | |
| 170 | if ((wDelay < W_MAX_TIMEOUT) && |
| 171 | (BITbIsBitOff(byWait, I2MCSR_NACK))) { |
| 172 | break; |
| 173 | } |
| 174 | } |
| 175 | if (wNoACK == W_MAX_I2CRETRY) { |
| 176 | VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg); |
| 177 | return FALSE; |
| 178 | } |
| 179 | VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg); |
| 180 | return TRUE; |
| 181 | } |
| 182 | |
| 183 | |
| 184 | /* |
| 185 | * Description: Turn bits on in eeprom |
| 186 | * |
| 187 | * Parameters: |
| 188 | * In: |
| 189 | * dwIoBase - I/O base address |
| 190 | * byContntOffset - address of EEPROM |
| 191 | * byBits - bits to turn on |
| 192 | * Out: |
| 193 | * none |
| 194 | * |
| 195 | * Return Value: none |
| 196 | * |
| 197 | */ |
| 198 | void SROMvRegBitsOn (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits) |
| 199 | { |
| 200 | BYTE byOrgData; |
| 201 | |
| 202 | byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset); |
| 203 | SROMbWriteEmbedded(dwIoBase, byContntOffset,(BYTE)(byOrgData | byBits)); |
| 204 | } |
| 205 | |
| 206 | |
| 207 | /* |
| 208 | * Description: Turn bits off in eeprom |
| 209 | * |
| 210 | * Parameters: |
| 211 | * In: |
| 212 | * dwIoBase - I/O base address |
| 213 | * byContntOffset - address of EEPROM |
| 214 | * byBits - bits to turn off |
| 215 | * Out: |
| 216 | * none |
| 217 | * |
| 218 | */ |
| 219 | void SROMvRegBitsOff (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits) |
| 220 | { |
| 221 | BYTE byOrgData; |
| 222 | |
| 223 | byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset); |
| 224 | SROMbWriteEmbedded(dwIoBase, byContntOffset,(BYTE)(byOrgData & (~byBits))); |
| 225 | } |
| 226 | |
| 227 | |
| 228 | /* |
| 229 | * Description: Test if bits on in eeprom |
| 230 | * |
| 231 | * Parameters: |
| 232 | * In: |
| 233 | * dwIoBase - I/O base address |
| 234 | * byContntOffset - address of EEPROM |
| 235 | * byTestBits - bits to test |
| 236 | * Out: |
| 237 | * none |
| 238 | * |
| 239 | * Return Value: TRUE if all test bits on; otherwise FALSE |
| 240 | * |
| 241 | */ |
| 242 | BOOL SROMbIsRegBitsOn (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits) |
| 243 | { |
| 244 | BYTE byOrgData; |
| 245 | |
| 246 | byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset); |
| 247 | return BITbIsAllBitsOn(byOrgData, byTestBits); |
| 248 | } |
| 249 | |
| 250 | |
| 251 | /* |
| 252 | * Description: Test if bits off in eeprom |
| 253 | * |
| 254 | * Parameters: |
| 255 | * In: |
| 256 | * dwIoBase - I/O base address |
| 257 | * byContntOffset - address of EEPROM |
| 258 | * byTestBits - bits to test |
| 259 | * Out: |
| 260 | * none |
| 261 | * |
| 262 | * Return Value: TRUE if all test bits off; otherwise FALSE |
| 263 | * |
| 264 | */ |
| 265 | BOOL SROMbIsRegBitsOff (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits) |
| 266 | { |
| 267 | BYTE byOrgData; |
| 268 | |
| 269 | byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset); |
| 270 | return BITbIsAllBitsOff(byOrgData, byTestBits); |
| 271 | } |
| 272 | |
| 273 | |
| 274 | /* |
| 275 | * Description: Read all contents of eeprom to buffer |
| 276 | * |
| 277 | * Parameters: |
| 278 | * In: |
| 279 | * dwIoBase - I/O base address |
| 280 | * Out: |
| 281 | * pbyEepromRegs - EEPROM content Buffer |
| 282 | * |
| 283 | * Return Value: none |
| 284 | * |
| 285 | */ |
| 286 | void SROMvReadAllContents (DWORD_PTR dwIoBase, PBYTE pbyEepromRegs) |
| 287 | { |
| 288 | int ii; |
| 289 | |
| 290 | // ii = Rom Address |
| 291 | for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) { |
| 292 | *pbyEepromRegs = SROMbyReadEmbedded(dwIoBase,(BYTE) ii); |
| 293 | pbyEepromRegs++; |
| 294 | } |
| 295 | } |
| 296 | |
| 297 | |
| 298 | /* |
| 299 | * Description: Write all contents of buffer to eeprom |
| 300 | * |
| 301 | * Parameters: |
| 302 | * In: |
| 303 | * dwIoBase - I/O base address |
| 304 | * pbyEepromRegs - EEPROM content Buffer |
| 305 | * Out: |
| 306 | * none |
| 307 | * |
| 308 | * Return Value: none |
| 309 | * |
| 310 | */ |
| 311 | void SROMvWriteAllContents (DWORD_PTR dwIoBase, PBYTE pbyEepromRegs) |
| 312 | { |
| 313 | int ii; |
| 314 | |
| 315 | // ii = Rom Address |
| 316 | for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) { |
| 317 | SROMbWriteEmbedded(dwIoBase,(BYTE) ii, *pbyEepromRegs); |
| 318 | pbyEepromRegs++; |
| 319 | } |
| 320 | } |
| 321 | |
| 322 | |
| 323 | /* |
| 324 | * Description: Read Ethernet Address from eeprom to buffer |
| 325 | * |
| 326 | * Parameters: |
| 327 | * In: |
| 328 | * dwIoBase - I/O base address |
| 329 | * Out: |
| 330 | * pbyEtherAddress - Ethernet Address buffer |
| 331 | * |
| 332 | * Return Value: none |
| 333 | * |
| 334 | */ |
| 335 | void SROMvReadEtherAddress (DWORD_PTR dwIoBase, PBYTE pbyEtherAddress) |
| 336 | { |
| 337 | BYTE ii; |
| 338 | |
| 339 | // ii = Rom Address |
| 340 | for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++) { |
| 341 | *pbyEtherAddress = SROMbyReadEmbedded(dwIoBase, ii); |
| 342 | pbyEtherAddress++; |
| 343 | } |
| 344 | } |
| 345 | |
| 346 | |
| 347 | /* |
| 348 | * Description: Write Ethernet Address from buffer to eeprom |
| 349 | * |
| 350 | * Parameters: |
| 351 | * In: |
| 352 | * dwIoBase - I/O base address |
| 353 | * pbyEtherAddress - Ethernet Address buffer |
| 354 | * Out: |
| 355 | * none |
| 356 | * |
| 357 | * Return Value: none |
| 358 | * |
| 359 | */ |
| 360 | void SROMvWriteEtherAddress (DWORD_PTR dwIoBase, PBYTE pbyEtherAddress) |
| 361 | { |
| 362 | BYTE ii; |
| 363 | |
| 364 | // ii = Rom Address |
| 365 | for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++) { |
| 366 | SROMbWriteEmbedded(dwIoBase, ii, *pbyEtherAddress); |
| 367 | pbyEtherAddress++; |
| 368 | } |
| 369 | } |
| 370 | |
| 371 | |
| 372 | /* |
| 373 | * Description: Read Sub_VID and Sub_SysId from eeprom to buffer |
| 374 | * |
| 375 | * Parameters: |
| 376 | * In: |
| 377 | * dwIoBase - I/O base address |
| 378 | * Out: |
| 379 | * pdwSubSysVenId - Sub_VID and Sub_SysId read |
| 380 | * |
| 381 | * Return Value: none |
| 382 | * |
| 383 | */ |
| 384 | void SROMvReadSubSysVenId (DWORD_PTR dwIoBase, PDWORD pdwSubSysVenId) |
| 385 | { |
| 386 | PBYTE pbyData; |
| 387 | |
| 388 | pbyData = (PBYTE)pdwSubSysVenId; |
| 389 | // sub vendor |
| 390 | *pbyData = SROMbyReadEmbedded(dwIoBase, 6); |
| 391 | *(pbyData+1) = SROMbyReadEmbedded(dwIoBase, 7); |
| 392 | // sub system |
| 393 | *(pbyData+2) = SROMbyReadEmbedded(dwIoBase, 8); |
| 394 | *(pbyData+3) = SROMbyReadEmbedded(dwIoBase, 9); |
| 395 | } |
| 396 | |
| 397 | /* |
| 398 | * Description: Auto Load EEPROM to MAC register |
| 399 | * |
| 400 | * Parameters: |
| 401 | * In: |
| 402 | * dwIoBase - I/O base address |
| 403 | * Out: |
| 404 | * none |
| 405 | * |
| 406 | * Return Value: TRUE if success; otherwise FALSE |
| 407 | * |
| 408 | */ |
| 409 | BOOL SROMbAutoLoad (DWORD_PTR dwIoBase) |
| 410 | { |
| 411 | BYTE byWait; |
| 412 | int ii; |
| 413 | |
| 414 | BYTE byOrg; |
| 415 | |
| 416 | VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg); |
| 417 | // turn on hardware retry |
| 418 | VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg | I2MCFG_NORETRY)); |
| 419 | |
| 420 | MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD); |
| 421 | |
| 422 | // ii = Rom Address |
| 423 | for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) { |
| 424 | MACvTimer0MicroSDelay(dwIoBase, CB_EEPROM_READBYTE_WAIT); |
| 425 | VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait); |
| 426 | if (BITbIsBitOff(byWait, I2MCSR_AUTOLD)) |
| 427 | break; |
| 428 | } |
| 429 | |
| 430 | VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg); |
| 431 | |
| 432 | if (ii == EEP_MAX_CONTEXT_SIZE) |
| 433 | return FALSE; |
| 434 | return TRUE; |
| 435 | } |
| 436 | |
| 437 | |