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Greg Rose92915f72010-01-09 02:24:10 +00001/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
Mark Rustad2e7cfbd2014-03-04 03:02:13 +00004 Copyright(c) 1999 - 2014 Intel Corporation.
Greg Rose92915f72010-01-09 02:24:10 +00005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#ifndef _IXGBEVF_H_
29#define _IXGBEVF_H_
30
31#include <linux/types.h>
Jiri Pirkodadcd652011-07-21 03:25:09 +000032#include <linux/bitops.h>
Greg Rose92915f72010-01-09 02:24:10 +000033#include <linux/timer.h>
34#include <linux/io.h>
35#include <linux/netdevice.h>
Jiri Pirkodadcd652011-07-21 03:25:09 +000036#include <linux/if_vlan.h>
Eric Dumazet4197aa72011-06-22 05:01:35 +000037#include <linux/u64_stats_sync.h>
Greg Rose92915f72010-01-09 02:24:10 +000038
39#include "vf.h"
40
Jacob Kellerc777cdf2013-09-21 06:24:20 +000041#ifdef CONFIG_NET_RX_BUSY_POLL
42#include <net/busy_poll.h>
Jacob Keller3b5dca22013-09-21 06:24:25 +000043#define BP_EXTENDED_STATS
Jacob Kellerc777cdf2013-09-21 06:24:20 +000044#endif
45
Greg Rose92915f72010-01-09 02:24:10 +000046/* wrapper around a pointer to a socket buffer,
47 * so a DMA handle can be stored along with the buffer */
48struct ixgbevf_tx_buffer {
Alexander Duycke757e3e2013-01-31 07:43:22 +000049 union ixgbe_adv_tx_desc *next_to_watch;
Emil Tantilov7ad1a092014-01-17 18:30:03 -080050 unsigned long time_stamp;
51 struct sk_buff *skb;
52 unsigned int bytecount;
53 unsigned short gso_segs;
54 __be16 protocol;
Emil Tantilov9bdfefd2014-01-17 18:30:04 -080055 DEFINE_DMA_UNMAP_ADDR(dma);
56 DEFINE_DMA_UNMAP_LEN(len);
Emil Tantilov7ad1a092014-01-17 18:30:03 -080057 u32 tx_flags;
Greg Rose92915f72010-01-09 02:24:10 +000058};
59
60struct ixgbevf_rx_buffer {
61 struct sk_buff *skb;
62 dma_addr_t dma;
Greg Rose92915f72010-01-09 02:24:10 +000063};
64
Emil Tantilov095e2612014-01-17 18:30:00 -080065struct ixgbevf_stats {
66 u64 packets;
67 u64 bytes;
68#ifdef BP_EXTENDED_STATS
69 u64 yields;
70 u64 misses;
71 u64 cleaned;
72#endif
73};
74
75struct ixgbevf_tx_queue_stats {
76 u64 restart_queue;
77 u64 tx_busy;
78 u64 tx_done_old;
79};
80
81struct ixgbevf_rx_queue_stats {
82 u64 non_eop_descs;
83 u64 alloc_rx_page_failed;
84 u64 alloc_rx_buff_failed;
85 u64 csum_err;
86};
87
Greg Rose92915f72010-01-09 02:24:10 +000088struct ixgbevf_ring {
Alexander Duyck6b43c442012-05-11 08:32:45 +000089 struct ixgbevf_ring *next;
Alexander Duyckfb401952012-05-11 08:33:16 +000090 struct net_device *netdev;
91 struct device *dev;
Greg Rose92915f72010-01-09 02:24:10 +000092 void *desc; /* descriptor ring memory */
93 dma_addr_t dma; /* phys. address of descriptor ring */
94 unsigned int size; /* length in bytes */
95 unsigned int count; /* amount of descriptors */
96 unsigned int next_to_use;
97 unsigned int next_to_clean;
98
Greg Rose92915f72010-01-09 02:24:10 +000099 union {
100 struct ixgbevf_tx_buffer *tx_buffer_info;
101 struct ixgbevf_rx_buffer *rx_buffer_info;
102 };
103
Emil Tantilov095e2612014-01-17 18:30:00 -0800104 struct ixgbevf_stats stats;
105 struct u64_stats_sync syncp;
106 union {
107 struct ixgbevf_tx_queue_stats tx_stats;
108 struct ixgbevf_rx_queue_stats rx_stats;
109 };
110
Greg Rose55fb2772012-11-06 05:53:32 +0000111 u64 hw_csum_rx_error;
Don Skidmore5cdab2f2013-10-30 07:45:39 +0000112 u8 __iomem *tail;
Greg Rose92915f72010-01-09 02:24:10 +0000113
Greg Rose92915f72010-01-09 02:24:10 +0000114 u16 reg_idx; /* holds the special value that gets the hardware register
115 * offset associated with this ring, which is different
116 * for DCB and RSS modes */
117
Greg Rose92915f72010-01-09 02:24:10 +0000118 u16 rx_buf_len;
Emil Tantilov095e2612014-01-17 18:30:00 -0800119 int queue_index; /* needed for multiqueue queue management */
Greg Rose92915f72010-01-09 02:24:10 +0000120};
121
Greg Rose92915f72010-01-09 02:24:10 +0000122/* How many Rx Buffers do we bundle into one write to the hardware ? */
123#define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */
124
Alexander Duyck56e94092012-07-20 08:10:03 +0000125#define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES
126#define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES
Greg Rose92915f72010-01-09 02:24:10 +0000127
128#define IXGBEVF_DEFAULT_TXD 1024
129#define IXGBEVF_DEFAULT_RXD 512
130#define IXGBEVF_MAX_TXD 4096
131#define IXGBEVF_MIN_TXD 64
132#define IXGBEVF_MAX_RXD 4096
133#define IXGBEVF_MIN_RXD 64
134
135/* Supported Rx Buffer Sizes */
Greg Rose92915f72010-01-09 02:24:10 +0000136#define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */
Greg Rose85624ca2012-11-13 04:03:19 +0000137#define IXGBEVF_RXBUFFER_2K 2048
138#define IXGBEVF_RXBUFFER_4K 4096
139#define IXGBEVF_RXBUFFER_8K 8192
140#define IXGBEVF_RXBUFFER_10K 10240
Greg Rose92915f72010-01-09 02:24:10 +0000141
142#define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256
143
144#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
145
146#define IXGBE_TX_FLAGS_CSUM (u32)(1)
147#define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1)
148#define IXGBE_TX_FLAGS_TSO (u32)(1 << 2)
149#define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3)
Greg Rose92915f72010-01-09 02:24:10 +0000150#define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000
151#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
152#define IXGBE_TX_FLAGS_VLAN_SHIFT 16
153
Alexander Duyck6b43c442012-05-11 08:32:45 +0000154struct ixgbevf_ring_container {
155 struct ixgbevf_ring *ring; /* pointer to linked list of rings */
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000156 unsigned int total_bytes; /* total bytes processed this int */
157 unsigned int total_packets; /* total packets processed this int */
Alexander Duyck6b43c442012-05-11 08:32:45 +0000158 u8 count; /* total number of rings in vector */
159 u8 itr; /* current ITR setting for ring */
160};
161
162/* iterator for handling rings in ring container */
163#define ixgbevf_for_each_ring(pos, head) \
164 for (pos = (head).ring; pos != NULL; pos = pos->next)
165
Greg Rose92915f72010-01-09 02:24:10 +0000166/* MAX_MSIX_Q_VECTORS of these are allocated,
167 * but we only use one per queue-specific vector.
168 */
169struct ixgbevf_q_vector {
170 struct ixgbevf_adapter *adapter;
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000171 u16 v_idx; /* index of q_vector within array, also used for
172 * finding the bit in EICR and friends that
173 * represents the vector for this ring */
174 u16 itr; /* Interrupt throttle rate written to EITR */
Greg Rose92915f72010-01-09 02:24:10 +0000175 struct napi_struct napi;
Alexander Duyck6b43c442012-05-11 08:32:45 +0000176 struct ixgbevf_ring_container rx, tx;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000177 char name[IFNAMSIZ + 9];
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000178#ifdef CONFIG_NET_RX_BUSY_POLL
179 unsigned int state;
180#define IXGBEVF_QV_STATE_IDLE 0
181#define IXGBEVF_QV_STATE_NAPI 1 /* NAPI owns this QV */
182#define IXGBEVF_QV_STATE_POLL 2 /* poll owns this QV */
183#define IXGBEVF_QV_STATE_DISABLED 4 /* QV is disabled */
184#define IXGBEVF_QV_OWNED (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL)
185#define IXGBEVF_QV_LOCKED (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED)
186#define IXGBEVF_QV_STATE_NAPI_YIELD 8 /* NAPI yielded this QV */
187#define IXGBEVF_QV_STATE_POLL_YIELD 16 /* poll yielded this QV */
188#define IXGBEVF_QV_YIELD (IXGBEVF_QV_STATE_NAPI_YIELD | IXGBEVF_QV_STATE_POLL_YIELD)
189#define IXGBEVF_QV_USER_PEND (IXGBEVF_QV_STATE_POLL | IXGBEVF_QV_STATE_POLL_YIELD)
190 spinlock_t lock;
191#endif /* CONFIG_NET_RX_BUSY_POLL */
Greg Rose92915f72010-01-09 02:24:10 +0000192};
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000193#ifdef CONFIG_NET_RX_BUSY_POLL
194static inline void ixgbevf_qv_init_lock(struct ixgbevf_q_vector *q_vector)
195{
196
197 spin_lock_init(&q_vector->lock);
198 q_vector->state = IXGBEVF_QV_STATE_IDLE;
199}
200
201/* called from the device poll routine to get ownership of a q_vector */
202static inline bool ixgbevf_qv_lock_napi(struct ixgbevf_q_vector *q_vector)
203{
204 int rc = true;
205 spin_lock_bh(&q_vector->lock);
206 if (q_vector->state & IXGBEVF_QV_LOCKED) {
207 WARN_ON(q_vector->state & IXGBEVF_QV_STATE_NAPI);
208 q_vector->state |= IXGBEVF_QV_STATE_NAPI_YIELD;
209 rc = false;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000210#ifdef BP_EXTENDED_STATS
Emil Tantilov095e2612014-01-17 18:30:00 -0800211 q_vector->tx.ring->stats.yields++;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000212#endif
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000213 } else {
214 /* we don't care if someone yielded */
215 q_vector->state = IXGBEVF_QV_STATE_NAPI;
216 }
217 spin_unlock_bh(&q_vector->lock);
218 return rc;
219}
220
221/* returns true is someone tried to get the qv while napi had it */
222static inline bool ixgbevf_qv_unlock_napi(struct ixgbevf_q_vector *q_vector)
223{
224 int rc = false;
225 spin_lock_bh(&q_vector->lock);
226 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_POLL |
227 IXGBEVF_QV_STATE_NAPI_YIELD));
228
229 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD)
230 rc = true;
231 /* reset state to idle, unless QV is disabled */
232 q_vector->state &= IXGBEVF_QV_STATE_DISABLED;
233 spin_unlock_bh(&q_vector->lock);
234 return rc;
235}
236
237/* called from ixgbevf_low_latency_poll() */
238static inline bool ixgbevf_qv_lock_poll(struct ixgbevf_q_vector *q_vector)
239{
240 int rc = true;
241 spin_lock_bh(&q_vector->lock);
242 if ((q_vector->state & IXGBEVF_QV_LOCKED)) {
243 q_vector->state |= IXGBEVF_QV_STATE_POLL_YIELD;
244 rc = false;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000245#ifdef BP_EXTENDED_STATS
Emil Tantilov095e2612014-01-17 18:30:00 -0800246 q_vector->rx.ring->stats.yields++;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000247#endif
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000248 } else {
249 /* preserve yield marks */
250 q_vector->state |= IXGBEVF_QV_STATE_POLL;
251 }
252 spin_unlock_bh(&q_vector->lock);
253 return rc;
254}
255
256/* returns true if someone tried to get the qv while it was locked */
257static inline bool ixgbevf_qv_unlock_poll(struct ixgbevf_q_vector *q_vector)
258{
259 int rc = false;
260 spin_lock_bh(&q_vector->lock);
261 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_NAPI));
262
263 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD)
264 rc = true;
265 /* reset state to idle, unless QV is disabled */
266 q_vector->state &= IXGBEVF_QV_STATE_DISABLED;
267 spin_unlock_bh(&q_vector->lock);
268 return rc;
269}
270
271/* true if a socket is polling, even if it did not get the lock */
272static inline bool ixgbevf_qv_busy_polling(struct ixgbevf_q_vector *q_vector)
273{
274 WARN_ON(!(q_vector->state & IXGBEVF_QV_OWNED));
275 return q_vector->state & IXGBEVF_QV_USER_PEND;
276}
277
278/* false if QV is currently owned */
279static inline bool ixgbevf_qv_disable(struct ixgbevf_q_vector *q_vector)
280{
281 int rc = true;
282 spin_lock_bh(&q_vector->lock);
283 if (q_vector->state & IXGBEVF_QV_OWNED)
284 rc = false;
Jacob Kellere689e722014-01-16 02:30:06 -0800285 q_vector->state |= IXGBEVF_QV_STATE_DISABLED;
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000286 spin_unlock_bh(&q_vector->lock);
287 return rc;
288}
289
290#endif /* CONFIG_NET_RX_BUSY_POLL */
Greg Rose92915f72010-01-09 02:24:10 +0000291
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000292/*
293 * microsecond values for various ITR rates shifted by 2 to fit itr register
294 * with the first 3 bits reserved 0
295 */
296#define IXGBE_MIN_RSC_ITR 24
297#define IXGBE_100K_ITR 40
298#define IXGBE_20K_ITR 200
299#define IXGBE_10K_ITR 400
300#define IXGBE_8K_ITR 500
301
Greg Rose92915f72010-01-09 02:24:10 +0000302/* Helper macros to switch between ints/sec and what the register uses.
303 * And yes, it's the same math going both ways. The lowest value
304 * supported by all of the ixgbe hardware is 8.
305 */
306#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
307 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
308#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
309
Don Skidmoref880d072013-10-23 02:17:52 +0000310static inline u16 ixgbevf_desc_unused(struct ixgbevf_ring *ring)
311{
312 u16 ntc = ring->next_to_clean;
313 u16 ntu = ring->next_to_use;
314
315 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1;
316}
Greg Rose92915f72010-01-09 02:24:10 +0000317
Mark Rustad06380db2014-03-04 03:02:23 +0000318static inline void ixgbevf_write_tail(struct ixgbevf_ring *ring, u32 value)
319{
320 writel(value, ring->tail);
321}
322
Alexander Duyck908421f2012-05-11 08:33:00 +0000323#define IXGBEVF_RX_DESC(R, i) \
324 (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i]))
325#define IXGBEVF_TX_DESC(R, i) \
326 (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i]))
327#define IXGBEVF_TX_CTXTDESC(R, i) \
328 (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i]))
Greg Rose92915f72010-01-09 02:24:10 +0000329
Alexander Duyckc88887e2012-08-22 02:04:37 +0000330#define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 /* Maximum Supported Size 9.5KB */
Greg Rose92915f72010-01-09 02:24:10 +0000331
332#define OTHER_VECTOR 1
333#define NON_Q_VECTORS (OTHER_VECTOR)
334
335#define MAX_MSIX_Q_VECTORS 2
Greg Rose92915f72010-01-09 02:24:10 +0000336
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000337#define MIN_MSIX_Q_VECTORS 1
Greg Rose92915f72010-01-09 02:24:10 +0000338#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
339
340/* board specific private data structure */
341struct ixgbevf_adapter {
342 struct timer_list watchdog_timer;
Jiri Pirkodadcd652011-07-21 03:25:09 +0000343 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
Greg Rose92915f72010-01-09 02:24:10 +0000344 struct work_struct reset_task;
345 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
Greg Rose92915f72010-01-09 02:24:10 +0000346
347 /* Interrupt Throttle Rate */
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000348 u16 rx_itr_setting;
349 u16 tx_itr_setting;
350
351 /* interrupt masks */
352 u32 eims_enable_mask;
353 u32 eims_other;
Greg Rose92915f72010-01-09 02:24:10 +0000354
355 /* TX */
Greg Rose92915f72010-01-09 02:24:10 +0000356 int num_tx_queues;
Emil Tantilov97031922014-01-17 18:30:01 -0800357 struct ixgbevf_ring *tx_ring[MAX_TX_QUEUES]; /* One per active queue */
Greg Rose92915f72010-01-09 02:24:10 +0000358 u64 restart_queue;
Greg Rose92915f72010-01-09 02:24:10 +0000359 u32 tx_timeout_count;
Greg Rose92915f72010-01-09 02:24:10 +0000360
361 /* RX */
Greg Rose92915f72010-01-09 02:24:10 +0000362 int num_rx_queues;
Emil Tantilov97031922014-01-17 18:30:01 -0800363 struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */
Greg Rose92915f72010-01-09 02:24:10 +0000364 u64 hw_csum_rx_error;
365 u64 hw_rx_no_dma_resources;
Greg Rose92915f72010-01-09 02:24:10 +0000366 u64 non_eop_descs;
367 int num_msix_vectors;
Greg Rose92915f72010-01-09 02:24:10 +0000368 u32 alloc_rx_page_failed;
369 u32 alloc_rx_buff_failed;
370
371 /* Some features need tri-state capability,
372 * thus the additional *_CAPABLE flags.
373 */
374 u32 flags;
Alexander Duyck525a9402012-05-11 08:32:29 +0000375#define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1)
Greg Rose366c1092012-11-13 04:03:18 +0000376#define IXGBE_FLAG_IN_NETPOLL (u32)(1 << 1)
Don Skidmore220fe052013-09-21 01:40:49 +0000377#define IXGBEVF_FLAG_QUEUE_RESET_REQUESTED (u32)(1 << 2)
Alexander Duyck77d5dfc2012-05-11 08:32:19 +0000378
Emil Tantilov97031922014-01-17 18:30:01 -0800379 struct msix_entry *msix_entries;
380
Greg Rose92915f72010-01-09 02:24:10 +0000381 /* OS defined structs */
382 struct net_device *netdev;
383 struct pci_dev *pdev;
Greg Rose92915f72010-01-09 02:24:10 +0000384
385 /* structs defined in ixgbe_vf.h */
386 struct ixgbe_hw hw;
387 u16 msg_enable;
Emil Tantilov97031922014-01-17 18:30:01 -0800388 u16 bd_number;
Greg Rose92915f72010-01-09 02:24:10 +0000389 /* Interrupt Throttle Rate */
390 u32 eitr_param;
391
Emil Tantilov97031922014-01-17 18:30:01 -0800392 struct ixgbevf_hw_stats stats;
393
Greg Rose92915f72010-01-09 02:24:10 +0000394 unsigned long state;
Greg Rose92915f72010-01-09 02:24:10 +0000395 u64 tx_busy;
396 unsigned int tx_ring_count;
397 unsigned int rx_ring_count;
398
Jacob Keller3b5dca22013-09-21 06:24:25 +0000399#ifdef BP_EXTENDED_STATS
400 u64 bp_rx_yields;
401 u64 bp_rx_cleaned;
402 u64 bp_rx_missed;
403
404 u64 bp_tx_yields;
405 u64 bp_tx_cleaned;
406 u64 bp_tx_missed;
407#endif
408
Mark Rustaddbf8b0d2014-03-04 03:02:34 +0000409 u8 __iomem *io_addr; /* Mainly for iounmap use */
Greg Rose92915f72010-01-09 02:24:10 +0000410 u32 link_speed;
411 bool link_up;
Greg Rose92915f72010-01-09 02:24:10 +0000412
Alexander Duyck1c55ed72012-05-11 08:33:06 +0000413 spinlock_t mbx_lock;
Emil Tantilov97031922014-01-17 18:30:01 -0800414
415 struct work_struct watchdog_task;
Greg Rose92915f72010-01-09 02:24:10 +0000416};
417
418enum ixbgevf_state_t {
419 __IXGBEVF_TESTING,
420 __IXGBEVF_RESETTING,
Mark Rustad2e7cfbd2014-03-04 03:02:13 +0000421 __IXGBEVF_DOWN,
Mark Rustadbc0c7152014-03-12 00:38:45 +0000422 __IXGBEVF_DISABLED,
Mark Rustad2e7cfbd2014-03-04 03:02:13 +0000423 __IXGBEVF_REMOVING,
Mark Rustadea699562014-03-12 00:38:51 +0000424 __IXGBEVF_WORK_INIT,
Greg Rose92915f72010-01-09 02:24:10 +0000425};
426
Alexander Duyck5c60f812012-09-01 05:12:38 +0000427struct ixgbevf_cb {
428 struct sk_buff *prev;
429};
430#define IXGBE_CB(skb) ((struct ixgbevf_cb *)(skb)->cb)
431
Greg Rose92915f72010-01-09 02:24:10 +0000432enum ixgbevf_boards {
433 board_82599_vf,
Greg Rose2316aa22010-12-02 07:12:26 +0000434 board_X540_vf,
Greg Rose92915f72010-01-09 02:24:10 +0000435};
436
Stephen Hemminger3d8fe982012-01-18 22:13:34 +0000437extern const struct ixgbevf_info ixgbevf_82599_vf_info;
438extern const struct ixgbevf_info ixgbevf_X540_vf_info;
Stephen Hemmingerb5417bf2012-01-18 22:13:33 +0000439extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;
Greg Rose92915f72010-01-09 02:24:10 +0000440
441/* needed by ethtool.c */
Stephen Hemminger3d8fe982012-01-18 22:13:34 +0000442extern const char ixgbevf_driver_name[];
Greg Rose92915f72010-01-09 02:24:10 +0000443extern const char ixgbevf_driver_version[];
444
Joe Perches5ccc9212013-09-23 11:37:59 -0700445void ixgbevf_up(struct ixgbevf_adapter *adapter);
446void ixgbevf_down(struct ixgbevf_adapter *adapter);
447void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
448void ixgbevf_reset(struct ixgbevf_adapter *adapter);
449void ixgbevf_set_ethtool_ops(struct net_device *netdev);
Emil Tantilov05d063a2014-01-17 18:29:59 -0800450int ixgbevf_setup_rx_resources(struct ixgbevf_ring *);
451int ixgbevf_setup_tx_resources(struct ixgbevf_ring *);
452void ixgbevf_free_rx_resources(struct ixgbevf_ring *);
453void ixgbevf_free_tx_resources(struct ixgbevf_ring *);
Joe Perches5ccc9212013-09-23 11:37:59 -0700454void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
455int ethtool_ioctl(struct ifreq *ifr);
Greg Rose92915f72010-01-09 02:24:10 +0000456
Jacob Keller38496232013-10-22 06:19:18 +0000457extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector);
458
Joe Perches5ccc9212013-09-23 11:37:59 -0700459void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
460void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
Greg Rose92915f72010-01-09 02:24:10 +0000461
462#ifdef DEBUG
Joe Perches5ccc9212013-09-23 11:37:59 -0700463char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw);
Greg Rose92915f72010-01-09 02:24:10 +0000464#define hw_dbg(hw, format, arg...) \
465 printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg)
466#else
467#define hw_dbg(hw, format, arg...) do {} while (0)
468#endif
469
470#endif /* _IXGBEVF_H_ */