| Ludovic Desroches | ca79522 | 2013-06-13 10:39:38 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This header provides macros for at91 dma bindings. |
| 3 | * |
| 4 | * Copyright (C) 2013 Ludovic Desroches <ludovic.desroches@atmel.com> |
| 5 | * |
| 6 | * GPLv2 only |
| 7 | */ |
| 8 | |
| 9 | #ifndef __DT_BINDINGS_AT91_DMA_H__ |
| 10 | #define __DT_BINDINGS_AT91_DMA_H__ |
| 11 | |
| 12 | /* |
| 13 | * Source and/or destination peripheral ID |
| 14 | */ |
| 15 | #define AT91_DMA_CFG_PER_ID_MASK (0xff) |
| 16 | #define AT91_DMA_CFG_PER_ID(id) (id & AT91_DMA_CFG_PER_ID_MASK) |
| 17 | |
| 18 | /* |
| 19 | * FIFO configuration: it defines when a request is serviced. |
| 20 | */ |
| 21 | #define AT91_DMA_CFG_FIFOCFG_OFFSET (8) |
| 22 | #define AT91_DMA_CFG_FIFOCFG_MASK (0xf << AT91_DMA_CFG_FIFOCFG_OFFSET) |
| 23 | #define AT91_DMA_CFG_FIFOCFG_HALF (0x0 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* half FIFO (default behavior) */ |
| 24 | #define AT91_DMA_CFG_FIFOCFG_ALAP (0x1 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* largest defined AHB burst */ |
| 25 | #define AT91_DMA_CFG_FIFOCFG_ASAP (0x2 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* single AHB access */ |
| 26 | |
| 27 | #endif /* __DT_BINDINGS_AT91_DMA_H__ */ |